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公开(公告)号：US11545889B2
公开(公告)日：2023-01-03
申请号：US17536542
申请日：2021-11-29
申请人： GaN Systems Inc.
发明人： Yajie Qiu , Larry Spaziani
IPC分类号： H02M1/38
摘要： Disclosed is a method for deadtime optimization in a half-bridge switch or full-bridge switch wherein high-side and low-side switches comprise GaN transistors; a circuit for implementing the method; and a power switching system comprising a GaN half-bridge or a GaN full-bridge and a deadtime optimization system. The circuit comprises a drain current bump filter for generating a current charge output; and circuit elements for comparing the current charge output to a reference current charge Coss and generating a deadtime adjust signal. The deadtime adjust signal may be used to adjust deadtime to reduce or minimize deadtime, and deadtime losses, while avoiding cross-conduction.
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公开(公告)号：US20220399805A1
公开(公告)日：2022-12-15
申请号：US17304149
申请日：2021-06-15
申请人： Atieva, Inc.
发明人： Richard J. Biskup , Miaosen Shen
IPC分类号： H02M1/38 , H02P27/08 , H02M7/5387 , H02M1/00
摘要： A half-bridge power supply comprises: a first switch electrically connected to an energy source and to a load; a second switch electrically connected to the energy source and to the load; and circuitry electrically connected to the first and second switches and configured to provide a dynamic dead time for the half-bridge power supply based on one of the first and second switches being turned off having forward current.
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公开(公告)号：US11451138B2
公开(公告)日：2022-09-20
申请号：US15953733
申请日：2018-04-16
摘要： Driver circuits are disclosed having a high-side switch and a low-side switch. A pre-charging circuit is provided to pre-charge the low-side switch. In other implementations, methods are disclosed which involve precharging a low-side switch.
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公开(公告)号：US20220286062A1
公开(公告)日：2022-09-08
申请号：US17631722
申请日：2019-09-13
发明人： Ryoji TSURUTA , Hiroshi MASUNAGA , Tomohiro TANAKA
IPC分类号： H02M7/5387 , H02M1/00 , H02M1/08 , H02M1/38
摘要： A power conversion device includes: a dead time application unit which applies a dead time to only one of a pair of pulse signals; a current polarity detection unit which detects a polarity of an output current; and a gate signal selection unit which, if the polarity of the output current is positive, selects the one pulse signal, to which the dead time has been applied, as a gate signal for a positive arm and selects the other pulse signal as a gate signal for a negative arm, and, if the polarity of the output current is negative, selects the one pulse signal, to which the dead time has been applied, as the gate signal for the negative arm and selects the other pulse signal as the gate signal for the positive arm.
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公开(公告)号：US20220286043A1
公开(公告)日：2022-09-08
申请号：US17519517
申请日：2021-11-04
发明人： Hyunseok NAM
摘要： A dead time controller includes a phase detector, a filter circuit and an amplifying circuit. The phase detector generates a detection signal by detecting a phase difference between a first driving control signal applied to a first power transistor and a second driving control signal applied to a second power transistor, the detection signal being associated with a dead time corresponding to an overlapped deactivation interval between the first and second driving control signals. The filter circuit generates a DC voltage signal by filtering and averaging the detection signal based on a pulse-width modulation (PWM) signal. The PWM signal is generated by performing a PWM on an output voltage provided at an output node coupled to a second terminal of the inductor. The amplifying circuit generates an amplified voltage signal having a voltage level proportional to the dead time by amplifying the DC voltage signal.
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公开(公告)号：US20220263415A1
公开(公告)日：2022-08-18
申请号：US17308076
申请日：2021-05-05
发明人： Chih-Chi Chang , Meng-Jen Tsai , Yao-Tsung Chen , Ming-Chang Tsou
摘要： A controller applied to a primary side of an inductor-inductor-capacitor (LLC) resonant converter includes a common-mode voltage generation circuit and a control signal generation circuit. The common-mode voltage generation circuit is used for generating a common-mode voltage. The control signal generation circuit is used for generating an upper bridge switch control signal and a lower bridge switch control signal according to a compensation voltage corresponding to an output voltage of the LLC resonant converter, a sensing voltage corresponding to an input voltage of the LLC resonant converter, and the common-mode voltage, wherein the upper bridge switch control signal and the lower bridge switch control signal control an upper bridge switch and a lower bridge switch of the primary side of the LLC resonant converter, respectively.
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公开(公告)号：US11381157B1
公开(公告)日：2022-07-05
申请号：US17117246
申请日：2020-12-10
摘要： A motor drive is provided, which includes a control circuit, a first transistor, a first comparison circuit, a second transistor and a load. The control circuit includes a first output terminal and a second output terminal; the first output terminal outputs a first control signal; the second output terminal outputs a second control signal whose phase is inverse to the phase of the first control signal. The gate of the first transistor receives the first control signal. The first comparison circuit compares the gate-source voltage with a reference voltage to generate a first comparison signal. When the first comparison signal shows that the first control signal is reduced to be lower than the reference voltage, the second control signal generated by the second output terminal is transmitted to the gate of the second transistor.
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公开(公告)号：US20220166344A1
公开(公告)日：2022-05-26
申请号：US17387667
申请日：2021-07-28
发明人： Kai-Wei Hu , Mitradatta Misra , Ping-Heng Wu
IPC分类号： H02M7/5395 , H02M1/08 , H02M1/38
摘要： A power system includes a pulse width modulation device. The pulse width modulation device outputs first, second, third and fourth driving signals. The pulse width modulation device receives a control signal. The control signal is divided into a positive periodic signal and a negative periodic signal. A portion of the positive periodic signal higher than or equal to a maximum threshold voltage is clamped as the maximum threshold voltage to generate a first comparison waveform. The positive periodic signal is clamped as the reference voltage level to generate a second comparison waveform. According to the first comparison waveform, a first ramp signal is generated. According to the second comparison waveform, a first pulse width modulation signal is generated. The first, second, third and fourth driving signals are adjusted according to the first ramp signal and the first pulse width modulation signal.
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公开(公告)号：US20220158563A1
公开(公告)日：2022-05-19
申请号：US17438936
申请日：2019-05-07
发明人： Takaharu ISHIBASHI
摘要： A first bridge circuit executes power conversion between a first DC voltage and a first alternating current voltage of a primary-side winding of a transformer. A second bridge circuit executes the power conversion between a second DC voltage and a second AC voltage of a secondary winding of the transformer. A control circuit controls on and off of switching elements so that a zero voltage period is provided in only one of the first AC voltage and the second AC voltage. A length of the zero voltage period is determined so that charging and discharging of a snubber capacitor is completed during a dead time in which the on and off of a positive-side switching element and a negative-side switching element of each switching arm are switched in a bridge circuit on a side outputting an AC voltage in which the zero voltage period is not provided.
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公开(公告)号：US11251700B2
公开(公告)日：2022-02-15
申请号：US16426126
申请日：2019-05-30
发明人： Kailang Hang , Liangwei Sun
摘要： A voltage regulation circuit can include: a power stage circuit with a single inductor and a plurality of output circuits; each output circuit having an output control switch configured to control a duration of an on time of the output circuit, and an output switch control circuit configured to control the output control switch in accordance with an output voltage sampling signal, a reference current signal that represents an output current of the output circuit, and a clock signal, in order to maintain an output voltage of the output circuit as constant and to decrease interference from load variations of any other of the plurality of output circuits; and where the output control switches are controlled to be on in sequence in each switching period.
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