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公开(公告)号：US11290104B2
公开(公告)日：2022-03-29
申请号：US17374999
申请日：2021-07-14
发明人： Yinchuan Gu
IPC分类号： H03B1/00 , H03K3/00 , H03K17/567 , G11C11/4076
摘要： A driving circuit includes: a primary driving module configured to receive a first signal and generate a second signal based on the first signal, driving capability of the second signal being greater than that of the first signal; and an auxiliary driving module connected to an output terminal of the primary driving module and configured to receive the first signal and generate an auxiliary driving signal based on the first signal, the auxiliary driving signal being configured to shorten a rise time of the second signal.
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公开(公告)号：US11277129B2
公开(公告)日：2022-03-15
申请号：US17314917
申请日：2021-05-07
发明人： Axel Thomsen , Eric J. King , Anthony S. Doy , Thomas H. Hoff , John L. Melanson
IPC分类号： H03B1/00 , H03K3/00 , H03K17/687 , H02N2/00 , H02M3/158
摘要： This application relates to methods and apparatus for driving a transducer with switching drivers. A switching driver has first and second supply node for receiving supply voltages and includes an output bridge stage, a capacitor and a network of switches. The network of switches is operable in different switch states to provide different switching voltages to the output bridge stage. A controller is configured to control the switch state of the network of switches and a duty cycle of output switches of the output bridge stage based on an input signal to generate an output signal for driving the transducer.
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公开(公告)号：US11257853B2
公开(公告)日：2022-02-22
申请号：US17169602
申请日：2021-02-08
发明人： Atsushi Umezaki
IPC分类号： H01L27/12 , H01L29/786 , G09G3/14 , H03B1/00 , H03K3/00 , G09G3/32 , G09G3/36 , H03K17/687 , G11C19/00
摘要： Provided is a semiconductor device exemplified by an inverter circuit and a shift register circuit, which is characterized by a reduced number of transistors. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is electrically connected to a first wiring, and the other thereof is electrically connected to a second wiring. One of a source and a drain of the second transistor is electrically connected to the first wiring, a gate of the second transistor is electrically connected to a gate of the first transistor, and the other of the source and the drain of the second transistor is electrically connected to one electrode of the capacitor, while the other electrode of the capacitor is electrically connected to a third wiring. The first and second transistors have the same conductivity type.
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公开(公告)号：US20220027549A1
公开(公告)日：2022-01-27
申请号：US17492809
申请日：2021-10-04
IPC分类号： G06F30/398 , H03B1/00
摘要： An oscillation circuit design support method is provided for designing an oscillation circuit condition in a circuit board equipped with an integrated circuit (IC) chip for oscillation and an oscillator. The method includes receiving an input of IC chip information about an IC chip for oscillation, providing sample oscillator data and sample oscillation circuit condition data that are determined in accordance with the IC chip information, receiving an input of frequency measurement information measured based on the sample oscillation circuit condition data when an oscillator corresponding to the sample oscillator data is installed at a circuit board, and a providing information relating to matched oscillation circuit condition data determined based on at least the frequency measurement information.
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公开(公告)号：US11233505B2
公开(公告)日：2022-01-25
申请号：US17181339
申请日：2021-02-22
申请人： DENSO CORPORATION
发明人： Yohei Kondo
摘要： A switch drive circuit is provided with a surge detecting unit that detects a surge voltage produced in response to a change in a switching state of the switch; an adjusting unit that adjusts, based on the surge voltage detected by the surge detecting unit, a switching speed of the switch when changing the switching state of the switch; and a mask processing unit that prevents a voltage, detected by the surge voltage detecting unit in a period other than a period where the surge voltage is assumed to be produced in response to a change in the switching state of the switch, from being used by the adjusting unit for adjusting the switching speed.
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公开(公告)号：US11184988B2
公开(公告)日：2021-11-23
申请号：US17030406
申请日：2020-09-24
发明人： Tomonori Abe
摘要： A pedestal on which a beveled blank is mounted is provided with a recess portion and an edge portion. The recess portion is provided in a central part of a surface of a pedestal body of the pedestal. The edge portion is adjacent to the recess portion to which the blank is fixed. The recess portion has a length in the short side direction of the pedestal body longer than that of the short side of the blank.
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公开(公告)号：US11159154B2
公开(公告)日：2021-10-26
申请号：US15466688
申请日：2017-03-22
申请人： Intel Corporation
IPC分类号： H03B1/00 , H03K3/00 , H03K17/14 , H03K19/0175 , G11C5/14 , H03K17/16 , H03K19/00 , H03K17/10 , G06F1/3287
摘要： An apparatus is provided which comprises: a power gate device coupled to a gated power supply node and an ungated power supply node; and a control circuitry coupled to the power gate device, wherein the control circuitry is to turn on the power gate device by providing at least two bias voltages separated in time to gradually turn on the power gate device.
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公开(公告)号：US11152934B2
公开(公告)日：2021-10-19
申请号：US16325093
申请日：2017-09-19
发明人： Nicolas Degrenne , Stefan Mollov
摘要： The present invention concerns a device for controlling the switching of a first and a second power semiconductor switches providing current to a load in a half bridge configuration. The device comprises: means for obtaining a first current value through the first switch or the load just before the switching of the first switch from conducting to non-conducting state, means for limiting the current through the second switch during the switching of the second switch from non-conducting to conducting state using the obtained first current value, by modifying the gate signal of the second switch, means for obtaining a second current value through the second switch or the load just before the switching of the second switch from conducting to non-conducting state, means for limiting the current through the first switch during the switching of the first switch from non-conducting to conducting state using the obtained second current value by modifying the gate signal of the first switch.
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公开(公告)号：US11050419B2
公开(公告)日：2021-06-29
申请号：US15388726
申请日：2016-12-22
发明人： Roderick McLachlan , Fergus Downey
IPC分类号： H03B1/00 , H03K3/00 , H03K17/687 , H03F3/45 , H03F3/50
摘要： Described are various techniques that can minimize the use of high-voltage devices in a unity-gain buffer that can be used in a high voltage application, while providing a circuit that generates an output that is an accurately buffered version of the input.
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公开(公告)号：US10911026B2
公开(公告)日：2021-02-02
申请号：US16579877
申请日：2019-09-24
发明人： Ting-Yuan Cheng
摘要： A capacitor circuit includes a first terminal, a first to a third transistor and a first capacitor. The first transistor includes a first terminal configured to be coupled to a first current source and the first terminal of the capacitor circuit, and a second terminal coupled to a reference voltage terminal. The second transistor includes a first terminal configured to be coupled to a second current source, a second terminal coupled to the reference voltage terminal, and a control terminal coupled to the first terminal of the second transistor and a control terminal of the first transistor. The third transistor includes a first terminal configured to be coupled to a third current source and the first terminal of the first transistor, a second terminal coupled to the reference voltage terminal, and a control terminal coupled to the control terminal of the second transistor. The first capacitor includes a first terminal coupled to the first terminal of the capacitor circuit, and a second terminal coupled to the control terminal of the first transistor.
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