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公开(公告)号：US12132450B2
公开(公告)日：2024-10-29
申请号：US17695500
申请日：2022-03-15
发明人： Wen-Sheng Chen , En-Hsiang Yeh , Tzu-Jin Yeh
CPC分类号： H03F1/30 , H03F3/245 , H04B1/1607 , H04B1/18
摘要： A power amplifier structure includes at least one power amplifier circuit. The power amplifier circuit includes a transistor of a first type connected in series with a transistor of a second type connected between the same voltage supply. In a non-limiting nonexclusive example, an n-type transistor is connected in series with a p-type transistor connected between Vdd. The power amplifier structure can include two amplifier circuits configured in a differential amplifier structure. The differential amplifier structure includes two amplifier circuits operably connected in parallel between the same voltage supply.
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公开(公告)号：US12126309B2
公开(公告)日：2024-10-22
申请号：US16557571
申请日：2019-08-30
发明人： Siraj Akhtar , Swaminathan Sankaran
CPC分类号： H03F1/26 , H03F3/183 , H03H11/28 , H03F1/306 , H03F3/505 , H03F2200/03 , H03F2200/318
摘要： In an example apparatus, a first transistor has a base terminal, a first current terminal and a second current terminal. The base terminal is coupled to an input voltage node. A second transistor has a control terminal, a third current terminal and a fourth current terminal. The third current terminal is coupled to the second current terminal. The fourth current terminal is coupled to a first resistor. A second resistor is coupled to the control terminal. An inductor is coupled between the first resistor and a ground terminal.
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公开(公告)号：US20240348211A1
公开(公告)日：2024-10-17
申请号：US18624973
申请日：2024-04-02
申请人： pSemi Corporation
发明人： Jonathan James Klaren , David Kovac , Eric S. Shapiro , Christopher C. Murphy , Robert Mark Englekirk , Keith Bargroff , Tero Tapio Ranta
CPC分类号： H03F1/223 , H03F1/301 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/213 , H03F3/245 , H03F2200/102 , H03F2200/105 , H03F2200/165 , H03F2200/18 , H03F2200/21 , H03F2200/222 , H03F2200/225 , H03F2200/243 , H03F2200/294 , H03F2200/297 , H03F2200/301 , H03F2200/306 , H03F2200/387 , H03F2200/391 , H03F2200/399 , H03F2200/42 , H03F2200/451 , H03F2200/48 , H03F2200/489 , H03F2200/492 , H03F2200/498 , H03F2200/555 , H03F2200/61 , H03F2200/78
摘要： Bias circuits and methods for silicon-based amplifier architectures that are tolerant of supply and bias voltage variations, bias current variations, and transistor stack height, and compensate for poor output resistance characteristics. Embodiments include power amplifiers and low-noise amplifiers that utilize a cascode reference circuit to bias the final stages of a cascode amplifier under the control of a closed loop bias control circuit. The closed loop bias control circuit ensures that the current in the cascode reference circuit is approximately equal to a selected multiple of a known current value by adjusting the gate bias voltage to the final stage of the cascode amplifier. The final current through the cascode amplifier is a multiple of the current in the cascode reference circuit, based on a device scaling factor representing the relative sizes of the transistor devices in the cascode amplifier and in the cascode reference circuit.
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公开(公告)号：US20240333230A1
公开(公告)日：2024-10-03
申请号：US18192916
申请日：2023-03-30
发明人： TOLGA DINC , SWAMINATHAN SANKARAN
CPC分类号： H03F1/302 , H03F3/195 , H03F3/245 , H03F2200/105 , H03F2200/294 , H03F2200/451 , H03F2200/465 , H03F2200/84
摘要： A circuit includes a radio frequency (RF) detector having an RF detector input and an RF detector output. The RF detector is configured to provide a first signal at the RF detector output responsive to a second signal at the RF detector input. The circuit further includes a processing circuit having a processing terminal coupled to the RF detector output. The processing circuit is configured to provide a third signal at the terminal based on scaling the first signal by a factor that is proportional to temperature.
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公开(公告)号：US20240291441A1
公开(公告)日：2024-08-29
申请号：US18421997
申请日：2024-01-25
发明人： YU-JIU WANG , HAO-CHUNG CHOU , YUE MING WU , TA-SHUN CHU
摘要： A bias voltage generating circuit includes an amplifier circuit and a negative feedback circuit. The amplifier circuit is configured to generate a bias voltage according to a first voltage input and a second voltage input. The negative feedback circuit is coupled to the amplifier circuit, and configured to control the first voltage input. The negative feedback circuit includes a first voltage generator and a second voltage generator. The first voltage generator, coupled to the amplifier circuit, is biased by the bias voltage and configured to amplify a third voltage input to generate the first voltage input. The second voltage generator, coupled to the first voltage generator, is configured to generate the third voltage input. A ratio of the first voltage input to the third voltage input is locked according to a ratio of the second voltage input to the third voltage input.
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公开(公告)号：US20240283409A1
公开(公告)日：2024-08-22
申请号：US18581919
申请日：2024-02-20
申请人： Analog Devices, Inc.
发明人： Petrus M. Stroet , Daniel J. Linebarger , John P. Myers , Michael Hendrikus Laurentius Kouwenhoven
CPC分类号： H03F1/302 , H03F3/45085 , H03M1/72 , H03F2200/261 , H03F2200/462
摘要： A device may include an analog signal chain that adjusts a slope-temperature drift of the signal-strength detector by adjusting a delta proportional to absolute temperature of the analog signal chain. The device may further include an intercept-temperature drift input to receive an intercept-temperature drift value. Additionally, the device may include a reference current generator that generates a reference current based at least in part on the intercept-temperature drift value.
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公开(公告)号：US20240250647A1
公开(公告)日：2024-07-25
申请号：US18410182
申请日：2024-01-11
申请人： Analog Devices, Inc.
发明人： Petrus M. Stroet
CPC分类号： H03F3/3432 , H03F1/302 , H03F3/45085 , H03F3/456
摘要： Logarithmic current-to-voltage converters with emitter resistance compensation are disclosed herein. In certain embodiments, a logarithmic current-to-voltage converter includes a logarithmic bipolar transistor that converts an input current to a logarithmic voltage, and an emitter resistance compensation circuit that includes a replica of the logarithmic bipolar transistor. The emitter resistance compensation circuit processes a copy of the input current to generate an emitter resistance compensation signal that adjusts the logarithmic voltage to correct for an error introduced by an emitter resistance of the logarithmic bipolar transistor. By providing emitter resistance compensation in this matter, logarithmic current-to-voltage conversion with high accuracy and low log error is achieved.
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公开(公告)号：US20240223133A1
公开(公告)日：2024-07-04
申请号：US18202963
申请日：2023-05-29
发明人： Chang-Heng Chen , Tien-Yun Peng , Chih-Sheng Chen
CPC分类号： H03F1/30 , H03F3/245 , H03F2200/451
摘要： A radio-frequency circuit can include a power amplifier, a first bias circuit and a second bias circuit. The power amplifier can include an input terminal used to receive a radio-frequency signal, and an output terminal used to output an amplified radio-frequency signal. The first bias circuit can include a first output terminal coupled to the input terminal of the power amplifier through a common node. The second bias circuit can include a second output terminal and a current adjustment circuit, where the second output terminal can be coupled to the common node, and the current adjustment circuit can include a transistor. The transistor can include a first terminal coupled to the second output terminal, a second terminal used to receive a reference voltage, and a control terminal.
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公开(公告)号：US12021493B1
公开(公告)日：2024-06-25
申请号：US17505409
申请日：2021-10-19
发明人： Huafen Ouyang , Hualiang Li , Dongxin Jin
CPC分类号： H03F3/26 , H03F1/307 , H03F1/52 , H03F3/245 , H03F2200/351
摘要： The present invention provides a driving circuit for a switching transistor and a driving device including the same. The driving circuit includes: a power amplifier, including a first power transistor and a second power transistor that are connected between a first direct current voltage terminal and a second direct current voltage terminal and are arranged in a push-pull circuit; a first voltage regulating device, connected between an input terminal of the power amplifier and a control terminal of the first power transistor; a third power transistor, connected between an output terminal of the power amplifier and the second direct current voltage terminal or a grounding terminal; a first voltage dividing device, connected between the input terminal and the output terminal of the power amplifier; and a transistor control circuit, configured to: control the third power transistor to be turned on when the switching transistor is located in a short-circuit path, and control the third power transistor to be turned off when the switching transistor is controlled to be turned on and is not located in the short-circuit path. The driving circuit of the present invention reduces the power consumption of the switching transistor and extends the time for short-circuit protection.
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公开(公告)号：US20240171133A1
公开(公告)日：2024-05-23
申请号：US18461050
申请日：2023-09-05
申请人： INVENSENSE, INC.
CPC分类号： H03F3/005 , H03F1/303 , H03F3/45475 , H03F2200/261
摘要： A sensor driver providing high power supply rejection ratio is provided herein. A circuit can include a charge pump that comprises an input terminal and an output terminal, wherein the input terminal is operatively connected to a voltage supply. The charge pump further comprises circuitry that decouples an input voltage from the voltage supply from an output voltage of the charge pump and mixes defined frequency disturbances back to baseband. The circuit also includes an error amplifier configured to provide high power supply rejection ratio at baseband, wherein the output terminal of the charge pump is operatively connected to an input node of the error amplifier. Further, the circuit includes a capacitive micro-electromechanical system sensor operatively connected to an output node of the error amplifier.
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