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公开(公告)号：US11791808B1
公开(公告)日：2023-10-17
申请号：US18097335
申请日：2023-01-16
Applicant: Chengdu Sicore Semiconductor Corp. Ltd.
Inventor： Cemin Zhang
Abstract: Various NLTL frequency comb generator embodiments are disclosed for broadband impedance matching to generate an output signal comprising broadband harmonics of an input signal. The NLTL frequency comb generator comprises a plurality of segments cascaded in series, with each segment comprising a series inductor and a non-linear shunt capacitor. The non-linear shunt capacitor may couple to corresponding series inductors in the same polarity. A broadband biasing circuit feeds a DC bias or DC ground to the non-linear shunt capacitors for broadband input and output impedance matching. The broadband biasing circuit may be a low pass filter to prevent RF signal from leaking through the biasing circuit. The NLTL frequency comb generator, the broadband biasing circuit, and an output DC blocking capacitor may be integrated in a single chip in a compact packaging to achieve a broadband input/output impedance matching without relying on external lumped matching components.
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公开(公告)号：US11627273B2
公开(公告)日：2023-04-11
申请号：US17217950
申请日：2021-03-30
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Tao Sun
Abstract: A ramp generator includes a plurality of switched current sources coupled in parallel between a resistor and ground. A digital ramp control signal generator includes a counter to generate a ramp control signal in response to a clock signal. Each bit of the ramp control signal is coupled to control switching of a respective one of the plurality of switched current sources to generate a ramp signal at an output of the ramp generator. The digital ramp control signal generator is coupled to receive a reset signal to zero the ramp control signal. The digital ramp control signal generator is further coupled to receive a set bits signal to initialize the ramp signal to a preset value after every reset of the ramp control signal to add a DC offset compensation current determined by the preset value to the ramp signal.
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公开(公告)号：US11552624B1
公开(公告)日：2023-01-10
申请号：US17491343
申请日：2021-09-30
Applicant: Texas Instruments Incorporated
Inventor： Taisuke Kazama , Saurav Bandyopadhyay , Tianyu Chang , Huy Le Nhat Nguyen
IPC: H03K4/06 , H03K4/94 , H03K5/1252
Abstract: In described examples of a ramp circuit, a first terminal of a capacitor is coupled to a ramp terminal and a second capacitor terminal is coupled to a return terminal. A charge source has an input terminal coupled to a supply terminal and a charge output terminal. A resistor has a first terminal coupled to the return terminal. A first switch is coupled between the ramp terminal and a second terminal of the resistor. A second switch is coupled between the charge output terminal and the ramp terminal.
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公开(公告)号：US11362584B2
公开(公告)日：2022-06-14
申请号：US16711200
申请日：2019-12-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Wei Zhao , Jianzhang Xie
Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first charging path including a first capacitor coupled to a first output node. The circuit further includes a second charging path comprising a first switch and a second capacitor. The circuit further includes a third charging path comprising a second switch and a third capacitor. The circuit further includes a first discharging path comprising the second capacitor, a third switch coupled between the second charging path and a second output node, and a fourth switch coupled between the second charging path and a fourth node. The circuit further includes a second discharging path comprising the third capacitor, a fifth switch coupled between the third charging path and the second output node, and a sixth switch coupled between the third node and the fourth node.
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5.发明申请公开(公告)号：US20220158597A1
公开(公告)日：2022-05-19
申请号：US17667234
申请日：2022-02-08
Inventor： Ramin ZANBAGHI , Cory J. PETERSON , Eric KIMBALL
Abstract: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a sense resistor, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the sense resistor. The system may additionally include a modulator for generating a differential pulse-width modulation driving signal to the first high-side switch, the second high-side switch, the first low-side switch, and the second low-side switch and pilot tone injection circuitry configured to inject a periodic pilot tone into the differential pulse-width modulation driving signal at a pilot tone frequency.
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Patent Agency Ranking
公开(公告)号：US20210351768A1
公开(公告)日：2021-11-11
申请号：US16867399
申请日：2020-05-05
Applicant: OMNIVISION TECHNOLOGIES, INC.
Inventor： Lihang Fan , Liang Zuo , Nijun Jiang , Min Qu , Xuelian Liu
Abstract: A ramp generator providing ramp signal with high resolution fine gain includes a current mirror having a first and second paths to conduct a capacitor current and an integrator current responsive to the capacitor current. First and second switched capacitor circuits are coupled to the first path. A fractional divider circuit is coupled to receive a clock signal to generate in response to an adjustable fractional divider ratio K a switched capacitor control signal that oscillates between first and second states to control the first and second switched capacitor circuits. The first and second switched capacitor circuits are coupled to be alternatingly charged by the capacitor current and discharged in response to each the switched capacitor control signal. An integrator coupled is to the second path to generate the ramp signal in response to the integrator current.
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公开(公告)号：US11152927B1
公开(公告)日：2021-10-19
申请号：US17188962
申请日：2021-03-01
Applicant: RICHTEK TECHNOLOGY CORPORATION
Inventor： Yi-Kuang Chen , Ming-Jun Hsiao
Abstract: A low distortion triangular wave generator circuit generates a triangular wave signal by performing integration on an integration capacitor via a charging current and a discharging current during a charging period and a discharging period within a switching period of an external clock signal. A time length of the charging period is identical to a time length of the discharging period. A common mode related signal related to a common mode characteristic of the triangular wave signal is generated. An adjusting signal is generated according to a difference between the common mode related signal and a predetermined DC (direct current) level. The adjusting signal adjusts at least one of the charging current and the discharging current via feedback mechanism such that the triangular wave signal is a symmetrical triangular wave, and an average voltage of the triangular wave signal is equal to a target DC level.
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公开(公告)号：US20210305973A1
公开(公告)日：2021-09-30
申请号：US17188962
申请日：2021-03-01
Applicant: RICHTEK TECHNOLOGY CORPORATION
Inventor： Yi-Kuang Chen , Ming-Jun Hsiao
Abstract: A low distortion triangular wave generator circuit generates a triangular wave signal by performing integration on an integration capacitor via a charging current and a discharging current during a charging period and a discharging period within a switching period of an external clock signal. A time length of the charging period is identical to a time length of the discharging period. A common mode related signal related to a common mode characteristic of the triangular wave signal is generated. An adjusting signal is generated according to a difference between the common mode related signal and a predetermined DC (direct current) level. The adjusting signal adjusts at least one of the charging current and the discharging current via feedback mechanism such that the triangular wave signal is a symmetrical triangular wave, and an average voltage of the triangular wave signal is equal to a target DC level.
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公开(公告)号：US10425069B2
公开(公告)日：2019-09-24
申请号：US16065199
申请日：2017-01-16
Applicant: DENSO CORPORATION
Inventor： Norimasa Oka , Hiroshi Kawago
IPC: H03K4/06 , H03K4/56 , H03K5/12 , H03K17/16 , H03K19/0175 , H04L25/03 , H03K5/04 , H03K5/1252 , H03K19/0185
Abstract: A signal output circuit includes a slope control circuit, a capacitor, a noise detector circuit and a fail-safe circuit. The slope control circuit charges and discharges the capacitor, the first terminal of which is connected to an output terminal, according to the control signal level, and drives transistors using the voltage of the second terminal of the capacitor, thereby controlling the slope of the output single. The noise detector circuit detects noise superimposed on the output terminal. When noise is detected, the fail-safe circuit performs a forced drive operation on the transistor to output the output signal at a level corresponding to the level of the control signal is output, regardless of the transistor being driven by the slope control circuit.
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10.发明授权公开(公告)号：US10298111B2
公开(公告)日：2019-05-21
申请号：US15996662
申请日：2018-06-04
Applicant: Tsuyoshi Mano
Inventor： Tsuyoshi Mano
Abstract: A PWM controller includes a sine wave calculator to generate a sine wave signal according to a frequency command value, a first counter to generate a first triangular wave carrier signal, and a comparator to compare the sine wave signal with the first triangular wave carrier signal, generate a PWM signal, and supply the PWM signal to a power converter. The PWM controller further includes a second counter to generate a second triangular wave carrier signal that is π rad behind the first triangular wave carrier signal, a carrier number calculator to calculate a carrier number based on a multiplication number, and a carrier control unit to switch the first triangular wave carrier signal and the second triangular wave carrier signal based on the carrier number, to supply the triangular wave carrier signal to the comparator.
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