INQUIRER-SIDE CIRCUIT CAPABLE OF OPERATING IN ASYMMETRY DATA MODE

    公开(公告)号:US20240195450A1

    公开(公告)日:2024-06-13

    申请号:US18528163

    申请日:2023-12-04

    IPC分类号: H04B1/40 H04B3/23

    CPC分类号: H04B1/40 H04B3/23

    摘要: An inquirer-side circuit of an automotive Ethernet system includes: a hybrid circuit arranged to operably couple with an MDI circuit to conduct data communication with a respondent-side circuit; a transmitting circuit coupled with a hybrid circuit and arranged to operably generate and provide a transmission signal to the hybrid circuit; a receiving circuit coupled with the hybrid circuit and arranged to operably receive and parse a received signal transmitted from the hybrid circuit to generate a data signal; a processing circuit coupled with the receiving circuit and arranged to operably process the data signal; a physical coding sublayer circuit coupled with the processing circuit and arranged to operably conduct a physical coding operation according to the instruction of the processing circuit to control the operations of the transmitting circuit; and an echo cancellation circuit coupled between the transmitting circuit and the receiving circuit.

    ECHO SUPPRESSING DEVICE, ECHO SUPPRESSING METHOD, AND ECHO SUPPRESSING PROGRAM

    公开(公告)号:US20240171685A1

    公开(公告)日:2024-05-23

    申请号:US18283677

    申请日:2022-02-18

    申请人: TRANSTRON INC.

    发明人: Yuki SATOMI

    IPC分类号: H04M9/08 G10L21/0208 H04B3/23

    摘要: It is possible to accurately estimate the echo suppression amount for each frequency even when a nonlinear echo component is large. An estimated echo function having variables of a logarithm of a magnitude at each frequency of a reception signal, a frequency of the reception signal, a logarithm of a total reception value that is a summation of magnitudes of the reception signal or transmission of the reception signal in any frequency range, and a logarithm of an envelope of the total reception value is stored. An echo suppressing process is performed by inputting a value of a second reception signal (a result of converting the reception signal into a frequency domain) to a function representing an estimated echo to generate an echo suppressing mask, and multiplying an echo suppressing gain calculated based on this echo suppressing mask by a second transmission signal (transmission signal converted into a frequency domain).

    Echo canceller training in full duplex networks

    公开(公告)号:US11876753B2

    公开(公告)日:2024-01-16

    申请号:US17842643

    申请日:2022-06-16

    摘要: In some embodiments, a method receives a first signal that is sent in a first direction in a network. Communications in the network are full duplex communications in a same frequency band. The first signal is amplified in the first direction. The method trains a first echo canceller to cancel a first echo signal from the first signal where the first echo signal is received in a second direction. After training the first echo canceller, the trained first echo canceller is enabled. The method receives a second signal in the second direction that is sent in the second direction in the network. The second signal is amplified in the second direction. The method trains a second echo canceller to cancel a second echo signal received in the first direction from the second signal where the first echo canceller cancels the first echo signal that is received in the second direction.

    Signal transceiving apparatus and method having echo-canceling mechanism

    公开(公告)号:US11711111B2

    公开(公告)日:2023-07-25

    申请号:US17358402

    申请日:2021-06-25

    发明人: Cheng-Hsien Li

    IPC分类号: H04B3/21 H04B1/04 H04B3/23

    CPC分类号: H04B3/21 H04B1/0475 H04B3/23

    摘要: The present invention discloses a signal transceiving apparatus having echo-canceling mechanism. A mixer circuit includes a Wheatstone bridge and a transformer winding circuit. The Wheatstone bridge includes another transformer winding circuit and a variable load and includes a first input terminal, a first output terminal, a second input terminal and a second output terminal located at each two neighboring arms in an order. A transmission circuit is coupled to the first input terminal and the second input terminal to perform signal transmission through the mixer circuit. A receiving circuit is coupled to the first output terminal and the second output terminal to perform signal receiving through the mixer circuit. A control circuit adjusts the impedance of the variable load when a residual echo noise amount does not satisfy a minimum echo noise amount condition, and stops to adjust the impedance when the residual echo noise amount satisfies the condition.

    ECHO CANCELLER TRAINING IN FULL DUPLEX NETWORKS

    公开(公告)号:US20220393848A1

    公开(公告)日:2022-12-08

    申请号:US17842643

    申请日:2022-06-16

    IPC分类号: H04L5/14 H04B3/23

    摘要: In some embodiments, a method receives a first signal that is sent in a first direction in a network. Communications in the network are full duplex communications in a same frequency band. The first signal is amplified in the first direction. The method trains a first echo canceller to cancel a first echo signal from the first signal where the first echo signal is received in a second direction. After training the first echo canceller, the trained first echo canceller is enabled. The method receives a second signal in the second direction that is sent in the second direction in the network. The second signal is amplified in the second direction. The method trains a second echo canceller to cancel a second echo signal received in the first direction from the second signal where the first echo canceller cancels the first echo signal that is received in the second direction.

    ECHO CANCELLING SYSTEM AND ECHO CANCELLING METHOD

    公开(公告)号:US20220337286A1

    公开(公告)日:2022-10-20

    申请号:US17506725

    申请日:2021-10-21

    IPC分类号: H04B3/23 H03M1/00 H03M1/08

    摘要: A digital-to-analog converter circuit generates an analog transmitted signal according to a digital transmitted signal. A first echo canceller circuit generates a first echo cancelling signal according to the digital transmitted signal. A processor circuit generates an analog processed signal according to the analog transmitted signal, the first echo cancelling signal, and a received signal. An analog-to-digital converter circuit generates a digital value according to the analog processed signal and two slicer levels of a plurality of slicer levels. A storage circuit stores a look-up table. The look-up table records an offset value corresponding to the digital value. The storage circuit further outputs a first output signal according to the digital value and the offset value. The offset value is updated according to an error value associated with the first output signal.

    Signal transceiving apparatus and method having echo-canceling mechanism

    公开(公告)号:US20220200657A1

    公开(公告)日:2022-06-23

    申请号:US17358402

    申请日:2021-06-25

    发明人: CHENG-HSIEN LI

    IPC分类号: H04B3/21 H04B3/23 H04B1/04

    摘要: The present invention discloses a signal transceiving apparatus having echo-canceling mechanism. A mixer circuit includes a Wheatstone bridge and a transformer winding circuit. The Wheatstone bridge includes another transformer winding circuit and a variable load and includes a first input terminal, a first output terminal, a second input terminal and a second output terminal located at each two neighboring arms in an order. A transmission circuit is coupled to the first input terminal and the second input terminal to perform signal transmission through the mixer circuit. A receiving circuit is coupled to the first output terminal and the second output terminal to perform signal receiving through the mixer circuit. A control circuit adjusts the impedance of the variable load when a residual echo noise amount does not satisfy a minimum echo noise amount condition, and stops to adjust the impedance when the residual echo noise amount satisfies the condition.