公开(公告)号：US06784373B2

公开(公告)日：2004-08-31

申请号：US10288403

申请日：2002-11-04

申请人： Akihiro Kusaka

发明人： Akihiro Kusaka

IPC分类号： H05K103

CPC分类号： H05K1/028 ,  H05K1/095 ,  H05K2201/09227 ,  H05K2201/09236 ,  H05K2201/09727 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49128 ,  Y10T29/49155 ,  Y10T29/49224

摘要： A printed circuit board having an insulating board and a plurality of wiring patterns formed over the insulating board by screen printing and provided with first conductive pattern bent parts and wiring parts linked to the first conductive pattern bent parts. The gaps between adjoining ones of the first conductive pattern bent parts are formed wider than those between those of the wiring parts positioned close to and on both sides of the first conductive pattern bent parts.

摘要翻译： 一种印刷电路板，具有通过丝网印刷形成在所述绝缘板上的绝缘板和多个布线图案，并且设置有连接到所述第一导电图案弯曲部分的第一导电图案弯曲部分和布线部分。 第一导电图案弯曲部分的相邻的第一导电图案弯曲部分之间的间隙形成得比位于第一导电图案弯曲部分靠近和两侧的布线部分之间的间隙宽。

公开(公告)号：US06734368B1

公开(公告)日：2004-05-11

申请号：US08890582

申请日：1997-07-09

申请人： Lisa J. Jimarez ,  David N. Light

发明人： Lisa J. Jimarez ,  David N. Light

IPC分类号： H05K103

CPC分类号： H05K3/0061 ,  H05K3/321 ,  Y10T29/49124

摘要： A method for conductively bonding a printed circuit board to a metal back plate is provided. The method includes the steps of providing a dielectric substrate that is metallized on its two faces; providing a metallic back plate; and bonding the metallic back plate to one of the metallized faces of the substrate using an electrically conductive adhesive that includes an adhesive polymer and at least one conductive metal having an electromagnetic force (EMF) that is equal to or less than one volt. The present invention also relates to a printed circuit board assembly which includes printed circuit board which includes a dielectric substrate having a first circuitized metallic layer disposed on one opposing face of the substrate and a second metallic layer disposed on the other opposing face of said substrate; a metal back plate; and an electrically conductive bonding layer disposed between the plate and the second metallic layer of the printed circuit board. The electrically conductive bonding layer contains an adhesive polymer and a conductive metal having an EMF that is less than one volt. The electrically conductive bonding layer is substantially free of silver.

摘要翻译： 提供一种用于将印刷电路板导电地接合到金属背板的方法。 该方法包括以下步骤：提供在其两个表面上金属化的电介质基板; 提供金属背板; 以及使用包括粘合剂聚合物和至少一种具有等于或小于1伏的电磁力（EMF）的导电金属的导电粘合剂将所述金属背板接合到所述基板的金属化表面之一。 本发明还涉及一种印刷电路板组件，其包括印刷电路板，该印刷电路板包括具有设置在基板的一个相对面上的第一电路化金属层的电介质基板和设置在所述基板的另一相对面上的第二金属层; 金属背板 以及设置在印刷电路板的板和第二金属层之间的导电接合层。 导电接合层包含粘合剂聚合物和具有小于1伏特的EMF的导电金属。 导电接合层基本上不含银。

公开(公告)号：US06727436B2

公开(公告)日：2004-04-27

申请号：US10098886

申请日：2002-03-15

申请人： Stephen Matthew Barnes ,  Murray Steven Rodgers

发明人： Stephen Matthew Barnes ,  Murray Steven Rodgers

IPC分类号： H05K103

CPC分类号： B81B7/0006 ,  H01L23/5225 ,  H01L2924/0002 ,  H01L2924/00

摘要： A shielded interconnect bus crossover useful in interconnecting MEM devices with control signal sources or the like and a method of fabricating such a shielded interconnect bus crossover are disclosed. In one embodiment, a shielded interconnect bus crossover (10) includes a plurality of base pads (44A-C) and a plurality of support columns (74) extending upward from the base pads (44A-C) through holes formed in an interconnect bus shield (78) overlying a plurality of interconnect bus lines (42). The support columns (74) support a two layer elevated crossing line (92/112) in a spaced relation above the interconnect bus shield (78). The two layer elevated crossing line (92/112) is oriented transverse to the direction of the interconnect bus lines (42) and is located within the perimeter of a two layer rectangular crossing line shield wall (96/116).

摘要翻译： 公开了一种用于将MEM器件与控制信号源等互连有用的屏蔽互连总线交叉和制造这种屏蔽互连总线交叉的方法。 在一个实施例中，屏蔽互连总线跨接器（10）包括多个基座（44A-C）和从基座（44A-C）向上延伸穿过形成在互连总线中的孔的多个支撑柱 覆盖多个互连总线（42）的屏蔽（78）。 支撑柱（74）在互连总线屏蔽（78）上方以间隔的关系支撑双层升高的交叉线（92/112）。 两层升高的交叉线（92/112）横向于互连总线（42）的方向定向并且位于两层矩形交叉线屏蔽壁（96/116）的周边内。

公开(公告)号：US06717061B2

公开(公告)日：2004-04-06

申请号：US09949512

申请日：2001-09-07

申请人： James Satsuo Yamaguchi ,  Angel Antonio Pepe ,  Volkan H. Ozguz ,  Andrew Nelson Camien

发明人： James Satsuo Yamaguchi ,  Angel Antonio Pepe ,  Volkan H. Ozguz ,  Andrew Nelson Camien

IPC分类号： H05K103

CPC分类号： H05K3/0097 ,  H01L23/3735 ,  H01L23/3737 ,  H01L25/0652 ,  H01L25/105 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2924/0002 ,  H05K3/0052 ,  H05K3/403 ,  H05K2201/0129 ,  H05K2203/1105 ,  H05K2203/1536 ,  H05K2203/167 ,  Y10T428/12569 ,  Y10T428/24917 ,  H01L2924/00

摘要： Each multilayer module of a plurality of multilayer modules has a plurality of layers wherein each layer has a substrate therein. The plurality of multilayer modules includes a first multilayer module including a first layer and a second multilayer module including a second layer each having a top side and bottom side. The first layer and second layer each includes a substrate, at least one electronic element, and a plurality of electrically-conductive traces. The plurality of multilayer modules further includes a heat-separating layer disposed between the top side of the first layer and the bottom side of the second layer. The first multilayer module is adhered to the second multilayer module and the first multilayer module can be detached from the second multilayer module by applying heat to the heat-separating layer.

摘要翻译： 多个多层模块的每个多层模块具有多个层，其中每个层在其中具有衬底。 多个多层模块包括第一多层模块，该第一多层模块包括第一层和第二多层模块，该第二层模块包括第二层，每层具有顶侧和底侧。 第一层和第二层各自包括衬底，至少一个电子元件和多个导电迹线。 多个多层模块还包括设置在第一层的顶侧和第二层的底侧之间的热分离层。 第一多层模块粘附到第二多层模块，并且第一多层模块可以通过向热分离层施加热量而从第二多层模块分离。

公开(公告)号：US06710257B2

公开(公告)日：2004-03-23

申请号：US10099699

申请日：2002-03-15

申请人： John R. Saxelby, Jr. ,  Walter R. Hedlund, III

发明人： John R. Saxelby, Jr. ,  Walter R. Hedlund, III

IPC分类号： H05K103

CPC分类号： H01L21/565 ,  H01L2224/48091 ,  H05K3/284 ,  H01L2924/00014

摘要： A circuit on a circuit board is encapsulated using a first mold section and a second mold section. The first mold section closes on one side of the board, and the first mold section has an exposed first conduit. The second mold section closes on another side of the board, and the second mold section has a second conduit for pushing molding compound into a mold cavity in at least one of the mold sections. The second conduit has a side opened to the first mold section when the first and section mold sections are closed on the circuit board. A piston extends through the first conduit to close the side of the second conduit.

摘要翻译： 使用第一模具部分和第二模具部分封装电路板上的电路。 第一模具部分在板的一侧封闭，并且第一模具部分具有暴露的第一导管。 第二模具部分在板的另一侧封闭，并且第二模具部分具有用于将模塑料料推入至少一个模具部分中的模腔中的第二导管。 当第一和第一模具部分在电路板上闭合时，第二导管具有向第一模具部分开口的一侧。 活塞延伸穿过第一导管以封闭第二导管的一侧。

公开(公告)号：US06706971B2

公开(公告)日：2004-03-16

申请号：US10142557

申请日：2002-05-10

申请人： Douglas M. Albert ,  Keith D. Gann

发明人： Douglas M. Albert ,  Keith D. Gann

IPC分类号： H05K103

CPC分类号： H01L23/3114 ,  H01L23/49833 ,  H01L24/24 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/50 ,  H01L24/82 ,  H01L24/96 ,  H01L24/98 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2224/32014 ,  H01L2224/45144 ,  H01L2224/48247 ,  H01L2224/4826 ,  H01L2224/48465 ,  H01L2224/73267 ,  H01L2224/81052 ,  H01L2224/81801 ,  H01L2224/85205 ,  H01L2225/1035 ,  H01L2225/1064 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/18165 ,  H05K1/144 ,  Y10T29/49126 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00

摘要： A stackable microcircuit layer formed from a plastic encapsulated microcircuit (PEM) and method of making the same is disclosed. The method involves the steps of starting with a commercially available PEM (e.g. a plastic Thin Small Outline Package or TSOP) that contains a microcircuit or die within an encapsulant and modifying the PEM to expose conductive members that are electrically connected to the microcircuit's bond pads. In the case of a TSOP, the preferred modifying step is accomplished by top grinding the TSOP in order to remove the lead frame that was secured above the die and encapsulated along with it in the TSOP. Next, reroute metallization is applied in order to connect the conductive members that were exposed by the top grinding, to an edge of the modified PEM. Finally, if appropriate, the modified PEM is thinned through backside grinding and diced to a desired area, in order to provide a stackable microcircuit layer that may form a part of a dense electronic package. The PEM may be of any suitable type and the stackable microcircuit layers that results from application of this invention may be stacked as provided or included in “neo-chips” that are of greater area, that include additional die, or both. The stackable microcircuit layers made according to this invention beneficially use PEMs that are readily available and that include die that were typically “burned in” by the manufacturer rather than merely tested on a statistical basis as is usually the case with bare die.

摘要翻译： 公开了由塑料封装微电路（PEM）形成的可堆叠微电路层及其制造方法。 该方法包括从包含密封剂中的微电路或管芯的市售PEM（例如塑料薄小外形封装或TSOP）开始的步骤，并修改PEM以暴露电连接到微电路接合焊盘的导电构件。 在TSOP的情况下，优选的修改步骤是通过顶部研磨TSOP来实现的，以去除固定在管芯上方的引线框架并随其一起封装在TSOP中。 接下来，应用重新路由金属化，以将通过顶部研磨暴露的导电构件连接到改性PEM的边缘。 最后，如果合适，通过背面研磨将修改的PEM薄化并切成希望的区域，以便提供可形成致密电子封装的一部分的可堆叠的微电路层。 PEM可以是任何合适的类型，并且由应用本发明产生的可堆叠的微电路层可以按照提供或包括在具有更大面积的“新芯片”中堆叠，包括额外的管芯或两者。 根据本发明制造的可堆叠微电路层有利地使用易于获得的PEM，并且包括通常由制造商“烧入”的裸片，而不是像裸裸裸片通常情况下在统计学基础上进行测试。

公开(公告)号：US06674015B2

公开(公告)日：2004-01-06

申请号：US10096647

申请日：2002-03-14

申请人： Shinji Aoki

发明人： Shinji Aoki

IPC分类号： H05K103

CPC分类号： H05K1/0216 ,  H05K1/0218 ,  H05K3/429 ,  H05K2201/0715 ,  H05K2201/10189 ,  H05K2201/10969 ,  H05K2203/167

摘要： A multi-layer interconnection board, includes a multi-layer structure in which plural interconnections are provided and which includes a ground layer, and a hole part provided in the multi-layer structure. A conductive part is provided on an internal wall part of the hole part.

摘要翻译： 一种多层互连板，包括多层结构，其中设置有多个互连，并且包括接地层，以及设置在多层结构中的孔部。 导电部分设置在孔部分的内壁部分上。

公开(公告)号：US06630629B2

公开(公告)日：2003-10-07

申请号：US10228305

申请日：2002-08-27

申请人： Kanji Otsuka ,  Tamotsu Usami

发明人： Kanji Otsuka ,  Tamotsu Usami

IPC分类号： H05K103

CPC分类号： H05K1/0245 ,  H01L2924/0002 ,  H05K1/024 ,  H05K1/0242 ,  H05K3/0023 ,  H05K3/429 ,  H05K3/4623 ,  H05K3/4697 ,  H05K2201/09672 ,  H05K2203/086 ,  H01L2924/00

摘要： Signal wirings 22, 23 are formed on a pair of substrates 20, 21, and the substrates are joined together through an insulating layer 24 so that the signal wirings 22, 23 are placed in parallel and facing to each other. The surfaces of the overlapping faces of the signal wirings 22, 23 are made smooth, and the roughness of the same surfaces is smaller than the skin depth &dgr;s due to the skin effect, preferably less than one third, for minimizing the increase in the electric resistance due to the skin effect.

摘要翻译： 信号布线22,23形成在一对基板20,21上，并且基板通过绝缘层24接合在一起，使得信号布线22,23平行放置并彼此面对。 信号布线22,23的重叠面的表面是光滑的，并且由于皮肤效应，相同表面的粗糙度比皮肤效应小，优选小于三分之一，用于最小化电的增加 由于皮肤效应的抵抗力。

公开(公告)号：US06630627B1

公开(公告)日：2003-10-07

申请号：US09664361

申请日：2000-09-18

申请人： Youichi Tobita

发明人： Youichi Tobita

IPC分类号： H05K103

CPC分类号： H05K1/0219 ,  H05K1/023 ,  H05K1/0237 ,  H05K3/429 ,  H05K2201/09236 ,  H05K2201/09618 ,  H05K2201/09781

摘要： Each wiring layer of a multilayered wiring substrate includes signal wirings disposed in parallel with one another, and dummy wirings disposed at each side parallel to the signal wirings of the signal wiring group made by signal wiring, respectively. The dummy wirings have the same shape as the signal wirings, and are disposed in parallel to the signal wirings at the same intervals as that in the signal wirings. Through holes are formed in the respective clearances among the signal wirings. Dummy through holes having the same shape as the through holes are formed between the dummy wiring and signal wiring. A conductive layer is formed on the inner wall of the through holes. The multilayered wiring substrate is able to reduce or eliminate the delay time difference between signals that propagate along the signal wirings.

摘要翻译： 多层布线基板的各布线层包括彼此平行布置的信号布线，并且分别设置在与由信号布线构成的信号布线组的信号布线平行的每一侧的虚拟布线。 虚拟布线具有与信号布线相同的形状，并且以与信号布线中相同的间隔平行于信号布线布置。 在信号布线之间的各间隙中形成通孔。 在虚拟布线和信号布线之间形成具有与通孔相同形状的虚拟通孔。 导电层形成在通孔的内壁上。 多层布线基板能够减少或消除沿着信号布线传播的信号之间的延迟时间差。

公开(公告)号：US06617520B1

公开(公告)日：2003-09-09

申请号：US09650824

申请日：2000-08-30

申请人： Robert H. Martter ,  Craig C. Sundberg ,  Richard N. Giardina ,  Brian S. Fetscher ,  G. James Deutschlander

发明人： Robert H. Martter ,  Craig C. Sundberg ,  Richard N. Giardina ,  Brian S. Fetscher ,  G. James Deutschlander

IPC分类号： H05K103

CPC分类号： H05K3/3447 ,  H05K1/053 ,  H05K2201/10287 ,  H05K2201/10401 ,  H05K2201/10916 ,  Y10T29/49165

摘要： A circuit device and a method for providing an interface between a circuit device comprised of a porcelain enameled metal substrate and an external electrical conductor such as a wire or a lead. An aperture is formed in the substrate at the location where the connection is desired. An eyelet is then placed in the aperture. Crimping or other means are used to form a mechanical connection to the substrate and causes the eyelet to be retained in the aperture. The wire or lead of an electronic component is then inserted into the eyelet. The wire or lead is then soldered to the eyelet providing a joint of high mechanical strength.

摘要翻译： 一种电路器件和用于在由瓷漆包金属基底和外部电导体（例如导线或引线）组成的电路器件之间提供界面的方法。 在需要连接的位置处在基板中形成孔。 然后将孔眼放置在孔中。 使用压接或其它装置来形成与基板的机械连接，并使孔眼保持在孔中。 然后将电子元件的导线或引线插入孔眼中。 然后将导线或引线焊接到孔眼，提供高机械强度的接头。