公开(公告)号：US20250040041A1

公开(公告)日：2025-01-30

申请号：US18917646

申请日：2024-10-16

Applicant: Government of the United States as represented by the Secretary of the Air Force

Inventor： Carl J. Thrasher ,  Christopher E. Tabor ,  Zachary J. Farrell ,  Nicholas J. Morris ,  Michelle Ching-Sum Yuen

IPC: H05K1/02 ,  H05K1/09 ,  H05K3/10 ,  H05K3/22

Abstract: The present invention relates to architected liquid metal networks and processes of making and using same. The predetermined template design technology of such architected liquid metal networks provides the desired spatial control of electrical, electromagnetic, and thermal properties as a function of strain. Thus, resulting in improved overall performance including process ability.

公开(公告)号：US20240431030A1

公开(公告)日：2024-12-26

申请号：US18294835

申请日：2022-07-28

Applicant: SUMITOMO ELECTRIC PRINTED CIRCUITS, INC.

Inventor： Michi OGATA ,  Kou NOGUCHI

IPC: H05K1/16 ,  H01F27/28 ,  H05K1/02 ,  H05K3/10

Abstract: The printed wiring board according to an embodiment of the present disclosure comprises: a substrate; a first wiring layer having a first wiring that is disposed directly or indirectly on the substrate; and a second wiring layer having a second wiring that is disposed directly or indirectly on the substrate. The average wire width of the first wiring is 40 μm or less, and the average wire width of the second wiring is 50 μm or more.

公开(公告)号：US12167544B2

公开(公告)日：2024-12-10

申请号：US17884176

申请日：2022-08-09

Applicant: NITTO DENKO CORPORATION

Inventor： Ryosuke Sasaoka ,  Naoki Shibata ,  Yasunari Oyabu

IPC: H05K1/02 ,  B32B27/18 ,  H01L21/268 ,  H01L23/16 ,  H01L23/48 ,  H01L23/552 ,  H05K1/14 ,  H05K3/02 ,  H05K3/10 ,  H05K3/20 ,  H05K3/22 ,  H05K3/36 ,  H05K3/42

Abstract: A method for producing a wiring circuit board includes a first step of preparing a wiring circuit board assembly sheet including a support sheet, a plurality of wiring circuit boards supported by the support sheet, and a joint connecting the support sheet to the plurality of wiring circuit boards, having flat-shaped one surface and the other surface facing one surface at spaced intervals thereto in a thickness direction, and having a thin portion in which the other surface is recessed toward one surface and a second step of forming a burr portion protruding toward the other side in the thickness direction and cutting the thin portion.

公开(公告)号：US12160954B2

公开(公告)日：2024-12-03

申请号：US17864876

申请日：2022-07-14

Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.

Inventor： Yusuke Gozu

IPC: H05K1/11 ,  H05K1/18 ,  H05K3/10 ,  H05K3/18

Abstract: A wiring board includes a wiring layer, an insulating layer, a plurality of opening portions, and a connection terminal. The insulating layer is laminated on the wiring layer and covers a wiring pattern. Each of the plurality of opening portions penetrates through the insulating layer to the wiring pattern. The connection terminal is formed on the respective opening portions and comes into contact with the upper surface of the wiring pattern. The wiring layer includes a first wiring pattern, and a second wiring pattern that is formed of a plurality of laminated metal layers and that is thicker than the first wiring pattern. An upper surface of a metal layer serving as an uppermost layer of the second wiring pattern is a contact surface with the connection terminal and has a same width as an upper surface of a metal layer serving as a layer other than the uppermost layer.

公开(公告)号：US12160949B2

公开(公告)日：2024-12-03

申请号：US17824868

申请日：2022-05-25

Applicant: FUJIFILM Corporation

Inventor： Genya Tanaka ,  Yasuyuki Sasada

IPC: H05K1/02 ,  H05K3/10 ,  H05K3/46 ,  H05K1/03

Abstract: A wiring board, comprising: wiring patterns that are buried in the wiring board, in which a region positioned between wiring patterns disposed in an in-plane direction of the same plane has an elastic modulus at 140° C. equal to or less than 0.1 MPa, and a dielectric loss tangent is equal to or less than 0.006.

公开(公告)号：US12127341B2

公开(公告)日：2024-10-22

申请号：US17875683

申请日：2022-07-28

Applicant: THALES

Inventor： Geoffroy Aupee ,  Pierre-Yves Michaud

IPC: H05K1/02 ,  H05K1/18 ,  H05K3/00 ,  H05K3/04 ,  H05K3/10 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K1/0298 ,  H05K1/181 ,  H05K3/10 ,  H05K3/42 ,  H05K3/4697 ,  H05K3/0094 ,  H05K3/04 ,  H05K2201/09372

Abstract: Embodiments provide a multilayer printed circuit board intended to connect electronic components, the board comprising a stack of a plurality of conductive layers, the conductive layers comprising two surface layers and one or more internal layers, the board comprising one or more counterbored holes, each counterbored hole comprising a portion with metallization opening onto one of the two surface layers and a portion without metallization opening onto the other surface layer; the multilayer printed circuit board may advantageously comprise one or more metal pads, each metal pad being joined to one of the two surface layers so as to occult the portion without metallization of a corresponding counterbored hole.

公开(公告)号：US20240349425A1

公开(公告)日：2024-10-17

申请号：US18683879

申请日：2022-08-17

Applicant: TDK CORPORATION

Inventor： Yoshihisa TAMAGAWA ,  Hiroshi SHINGAI ,  Daisuke SONODA ,  Keisuke NISHIOKA ,  Ken NODA

IPC: H05K1/09 ,  G02F1/1345 ,  H05K3/10

CPC classification number: H05K1/095 ,  H05K3/107 ,  G02F1/1345 ,  H05K2201/10136 ,  H05K2203/10

Abstract: An electrically conductive film including a film-like base material, and a resin layer and an electrically conductive part provided on a main surface of the base material is disclosed. The resin layer has a pattern including a linear trench. The electrically conductive part has a portion provided in the linear trench. The resin layer has raised portions formed along the trench on both sides of the linear trench and raised in the thickness direction of the resin layer.

公开(公告)号：US20240341039A1

公开(公告)日：2024-10-10

申请号：US18294158

申请日：2022-07-29

Applicant: Resonac Corporation

Inventor： Kei TOGASAKI ,  Kazuyuki MITSUKURA ,  Masaya TOBA ,  Kenichi IWASHITA ,  Keishi ONO ,  Mao NARITA

IPC: H05K3/10 ,  C25D3/38 ,  C25D5/00 ,  C25D5/02 ,  C25D7/12 ,  H01L21/48 ,  H01L23/498 ,  H05K1/02

CPC classification number: H05K3/10 ,  C25D3/38 ,  C25D5/022 ,  C25D5/605 ,  C25D7/123 ,  H05K1/02 ,  H01L21/4846 ,  H01L23/49866 ,  H05K2203/11

Abstract: A method for manufacturing a wiring board, including: forming a resist layer on a seed layer comprising a metal provided on a support body; forming a pattern including an opening to which the seed layer is exposed in the resist layer by light exposure and development of the resist layer, and forming a copper plating layer on the seed layer exposed into the opening by electrolytic plating, in this order. The arithmetic mean roughness Ra of the surface of the seed layer on a side opposite to the support body is 0.05 μm or more and 0.30 μm or less.

公开(公告)号：US12107327B2

公开(公告)日：2024-10-01

申请号：US18200712

申请日：2023-05-23

Applicant: DAI NIPPON PRINTING CO., LTD.

Inventor： Koichi Suzuki ,  Seiji Take ,  Daisuke Matsuura

IPC: H05K1/02 ,  G01J5/02 ,  G01J5/20 ,  G01J5/22 ,  G01J5/24 ,  G02F1/13 ,  H01Q1/36 ,  H01Q1/38 ,  H01Q1/40 ,  H01Q1/44 ,  H01Q3/02 ,  H01Q3/24 ,  H01Q3/26 ,  H01Q3/34 ,  H01Q7/00 ,  H01Q21/06 ,  H01Q21/12 ,  H05K3/10 ,  H05K3/18

CPC classification number: H01Q1/36 ,  H05K1/0274 ,  H05K3/108 ,  H05K3/18 ,  H05K2201/10098 ,  H05K2203/0723

Abstract: A wiring board includes: a substrate having transparency; a plurality of first wirings which are arranged on an upper surface of the substrate and extend in a first direction and each of which has a back surface in contact with the substrate and a front surface facing an opposite side of the back surface; and has a back surface in contact with the substrate and a front surface facing an opposite side of the back surface. The first wiring has a pair of side surfaces which extend in the first direction and are adjacent to the back surface of the first wiring, and each of the pair of side surfaces of the second wiring is recessed inward. The second wiring has a pair of side surfaces which extend in the second direction and are adjacent to the back surface of the second wiring.

公开(公告)号：US12064949B2

公开(公告)日：2024-08-20

申请号：US17040045

申请日：2019-04-12

Applicant: artience Co., Ltd. ,  TOYO INK CO., LTD.

Inventor： Kouichi Tosaki ,  Atsushi Nakazato

IPC: B32B7/025 ,  B29C45/16 ,  B32B27/08 ,  B32B27/18 ,  C08J5/12 ,  C08J5/18 ,  C08K3/04 ,  C08K3/08 ,  C08K3/22 ,  C08K9/02 ,  C09D11/033 ,  C09D11/037 ,  C09D11/102 ,  C09D11/104 ,  C09D11/107 ,  C09D11/52 ,  H01B1/22 ,  H05K3/10 ,  B29K669/00

CPC classification number: B32B7/025 ,  B29C45/1679 ,  B32B27/08 ,  B32B27/18 ,  C08J5/121 ,  C08J5/18 ,  C08K3/04 ,  C08K3/08 ,  C08K3/22 ,  C08K9/02 ,  C09D11/033 ,  C09D11/037 ,  C09D11/102 ,  C09D11/104 ,  C09D11/107 ,  C09D11/52 ,  H01B1/22 ,  H05K3/103 ,  B29K2669/00 ,  B32B2264/102 ,  B32B2264/1051 ,  B32B2264/1055 ,  C08J2333/00 ,  C08J2363/00 ,  C08J2367/02 ,  C08J2375/06 ,  C08K2003/0806 ,  C08K2003/085 ,  C08K2003/2231 ,  C08K2201/001

Abstract: Provided is a conductive composition for molded film that enables production of a molded film for which tensile force-induced reductions in conductivity are suppressed. The conductive composition for molded film contains a resin (A), conductive fine particles (B), and a solvent (C), wherein the solvent (C) contains, in 100 parts by mass of the solvent (C), at least 40 parts by mass of a solvent (C′) that satisfies the following condition (1) and condition (2). (1) A boiling point of 180° C. to 270° C. (2) At least one of the following is satisfied: the polar parameter δp of the Hansen solubility parameter (HSP) is 0≤δp≤5.0, and the hydrogen-bond parameter δh of the Hansen solubility parameter (HSP) is 9.8≤δh≤4.0.