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公开(公告)号:US20240361922A1
公开(公告)日:2024-10-31
申请号:US18767906
申请日:2024-07-09
申请人: Kioxia Corporation
发明人: Daisuke HASHIMOTO
CPC分类号: G06F3/0619 , G06F3/0614 , G06F3/0625 , G06F12/0246 , G06F1/266 , G06F3/0604 , G06F3/064 , G06F3/0659 , G06F3/0665 , G06F3/067 , G06F3/0683 , G06F3/0688 , G06F11/1068 , G06F2212/152 , G06F2212/214 , G06F2212/261 , G06F2212/263 , G06F2212/7201 , G06F2212/7211 , G11C5/144 , G11C5/147 , G11C5/148 , G11C29/52 , Y02D10/00
摘要: A memory system includes an interface circuit configured to connect to a host device, a controller electrically connected to the interface circuit, and a nonvolatile semiconductor memory electrically connected to the controller. The controller is configured to transmit a first response in response to a power supplied from the host device via the interface circuit, upon receipt of a first command from the host device after transmitting the first response, determine a status of data stored in the nonvolatile semiconductor memory, and transmit to the host device a second response including the determined status of the data stored in the nonvolatile semiconductor memory.
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公开(公告)号:US20240361817A1
公开(公告)日:2024-10-31
申请号:US18560799
申请日:2022-03-28
申请人: AutoNetworks Technologies, Ltd. , Sumitomo Wiring Systems, Ltd. , Sumitomo Electric Industries, Ltd.
发明人: Kazutaka NAITO , Kota ODA
摘要: A power supply control device controls power supplied via a power supply switch. A backup circuit instructs an IPD to turn the power supply switch on or off, based on an instruction signal instructing to turn the power supply switch on or off. A MICOM transmits an ON signal instructing to turn on the power supply switch and an OFF signal instructing to turn off the power supply switch to the IPD via a communication line (Lc). The MICOM determines whether communication via the communication line (Lc) is interrupted. The MICOM, in the case of determining that communication is interrupted, causes the backup circuit to start instructing to turn the power supply switch on or off.
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公开(公告)号:US12130715B2
公开(公告)日:2024-10-29
申请号:US17953477
申请日:2022-09-27
CPC分类号: G06F11/2015 , G06F1/263 , G06F1/30
摘要: A discrete VRM card includes a first VRM controller and a second VRM controller. The discrete VRM card also includes a first primary power stage, a second primary power stage, and an adaptable spare stage. The discrete VRM card includes a first switch and a second switch. Closing the first switch connects the adaptable spare converter with an output of the first primary power stage. Closing the second switch connects the adaptable spare converter an output of the second primary power stage.
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公开(公告)号:US12130680B2
公开(公告)日:2024-10-29
申请号:US18080601
申请日:2022-12-13
申请人: PEGATRON CORPORATION
发明人: Chen-Yun Hsieh
IPC分类号: G06F1/26 , G06F1/16 , G06F3/0354
CPC分类号: G06F1/266 , G06F1/1607 , G06F1/26 , G06F3/03545 , G06F2200/1632
摘要: An electronic device includes a casing having an accommodation groove with an open end and a base adjacent to the accommodation groove, a stylus whose front edge has a groove, an annular sleeve, a charging switch adjacent to the base and a pair of hooks. The base has a center column protruding along an axial direction. The stylus enters the accommodation groove from the open end. The annular sleeve is sleeved on the center column and has first and second protruding portions. The first protruding portion is located on a movement path of the stylus entering the accommodation groove from the open end until going in thoroughly. The charging switch and the accommodation groove are on different sides of the base. The second protruding portion is adapted to touch the charging switch. The hooks are located on the opposite sides of the accommodation groove and adapted to be fastened with the groove.
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公开(公告)号:US12130679B2
公开(公告)日:2024-10-29
申请号:US17485031
申请日:2021-09-24
发明人: Robbie W. Hall
摘要: A system (e.g., a power and communication system for remote components) can include a first wire, a second wire, and a first module operatively connected to the first and second wire. The first module can be configured to output power to and to communicate over the first wire and second wire. The system can include a second module operatively connected to the first module by the first wire and the second wire. The second module can be configured to receive power from the first module and to communicate with the first module over the first wire and/or second wire. The first module can be configured to modify a voltage on at least the first wire to signal to the second module to provide serial communication to the first module via the first wire and/or second wire.
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公开(公告)号:US12130665B2
公开(公告)日:2024-10-29
申请号:US17230724
申请日:2021-04-14
申请人: Intel Corporation
发明人: Jeff Ku , Gavin Sung , Ivan Wang , Tim Liu , Jason Y. Jiang
CPC分类号: G06F1/1632 , G06F1/1616 , G06F1/1681 , G06F1/266 , H02J7/0042 , H02J7/0044 , H02J50/10 , H02J50/80
摘要: An example portable computer disclosed herein includes a first housing, a keyboard carried by the first housing, a second housing pivotally coupled to the first housing, a display carried by the second housing, a wireless charger, and a pad to carry the wireless charger. The pad is pivotally coupled to the first housing. The pad is moveable relative to the first housing between a first orientation to position the wireless charger above the first housing and a second orientation to position the wireless charger adjacent the first housing. The pad to support a body part of a user adjacent the keyboard when the pad is in the first orientation. The pad is to support an external electronic device proximate the wireless charger when the pad is in the second orientation.
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公开(公告)号:US20240353905A1
公开(公告)日:2024-10-24
申请号:US18683469
申请日:2022-08-15
申请人: Tesla, Inc.
IPC分类号: G06F1/26
CPC分类号: G06F1/26
摘要: Systems and methods of for vertical power and clock delivery are disclosed. In some embodiments, a computing system can include an array of chips comprising a chip and a power delivery module configured to provide a power supply voltage and one or more clock signals to the chip, the power delivery module being positioned vertically relative to the chip, and the chip configured to vertically receive the one or more clock signals from the power delivery module.
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公开(公告)号:US20240341764A1
公开(公告)日:2024-10-17
申请号:US18752062
申请日:2024-06-24
IPC分类号: A61B17/072 , A61B5/00 , A61B5/06 , A61B5/107 , A61B8/00 , A61B8/12 , A61B17/00 , A61B17/064 , A61B17/068 , A61B17/10 , A61B17/115 , A61B17/29 , A61B17/32 , A61B18/00 , A61B90/00 , A61B90/30 , A61B90/70 , A61B90/90 , A61B90/92 , A61B90/94 , A61B90/96 , A61B90/98 , G01R33/07 , G06F1/26 , G06F1/28 , G06F1/30 , G06F1/3215 , G06F1/3287 , H02H1/06 , H02H3/02 , H02H3/04 , H02H3/06 , H02H3/087 , H02H3/18 , H02H3/20 , H02H3/24 , H02H7/20 , H02H11/00 , H02J1/10 , H02J7/00
CPC分类号: A61B17/07207 , A61B5/6847 , A61B17/00 , A61B17/0644 , A61B17/068 , A61B17/072 , A61B17/07292 , A61B17/105 , A61B17/1155 , A61B17/32 , A61B90/06 , A61B90/70 , A61B90/92 , A61B90/98 , G01R33/072 , G06F1/266 , G06F1/28 , G06F1/30 , G06F1/305 , G06F1/3215 , G06F1/3287 , H02H1/06 , H02H3/06 , H02H3/087 , H02H3/18 , H02H3/202 , H02H3/207 , H02H3/243 , H02H7/20 , H02H11/002 , H02J1/10 , H02J7/0068 , A61B5/067 , A61B5/1076 , A61B5/6885 , A61B8/12 , A61B8/4483 , A61B2017/00017 , A61B2017/00022 , A61B2017/00026 , A61B2017/00039 , A61B2017/00061 , A61B2017/00066 , A61B2017/00075 , A61B2017/00106 , A61B2017/00115 , A61B2017/00119 , A61B2017/00123 , A61B2017/00199 , A61B2017/00393 , A61B2017/00398 , A61B2017/0046 , A61B2017/00477 , A61B2017/00725 , A61B2017/00734 , A61B2017/00876 , A61B2017/07214 , A61B2017/07257 , A61B2017/07271 , A61B2017/07285 , A61B2017/2927 , A61B2018/00648 , A61B2090/061 , A61B2090/064 , A61B2090/065 , A61B2090/0803 , A61B2090/0806 , A61B2090/0807 , A61B2090/0808 , A61B2090/081 , A61B2090/0811 , A61B2090/0814 , A61B2090/0818 , A61B2090/304 , A61B2090/309 , A61B2090/702 , A61B90/90 , A61B90/94 , A61B90/96 , A61B2505/05 , A61B2562/0223 , A61B2562/0247 , A61B2562/0257 , A61B2562/0261 , A61B2562/029 , A61B2562/043 , A61B2562/06 , A61B2562/223 , H02H3/02 , H02H3/04
摘要: An end effector for use with a surgical stapling instrument is disclosed. The end effector comprises a first jaw, a second jaw movable relative to the first jaw to grasp tissue therebetween, and a staple cartridge. The staple cartridge comprises staples deployable into the tissue. The end effector further comprises a magnetic sensor configured to measure a parameter indicative of an identifying characteristic of the staple cartridge, an impedance sensor configured to measure a parameter indicative of an impedance of the tissue, and a processing unit in communication with the impedance sensor. The processing unit is configured to determine a property of the tissue based on an output of the impedance sensor.
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公开(公告)号:US12113632B2
公开(公告)日:2024-10-08
申请号:US18180219
申请日:2023-03-08
发明人: Weiping Song , Shiyong Fu , Yajie Cai , Xuefeng Tang , Houcun Zhu
CPC分类号: H04L12/10 , H04L12/40045 , H04L2012/2845
摘要: This application relates to a power consumption grading method for a network-based power supply system. The method includes: when it is detected that power overload protection is not triggered, starting a plurality of power modules of a powered device one by one in a specific order until all the plurality of power modules are started or it is detected that the power overload protection is triggered after a specific power module is started; when it is detected that the power overload protection is triggered, selecting, according to the specific order and based on the specific power module, one or more of the plurality of power modules as a power module combination of the powered device; and determining a load power of the powered device and a corresponding power consumption level based on the power module combination.
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公开(公告)号:US12111674B2
公开(公告)日:2024-10-08
申请号:US17720483
申请日:2022-04-14
发明人: Choonghoon Park , Jong-Lae Park , Bumgyu Park , Youngtae Lee , Donghee Han
IPC分类号: G06F1/26 , G05F1/46 , G05F1/66 , G06F1/32 , G06F1/3234 , G06F1/3296 , G06F15/78
CPC分类号: G05F1/66 , G05F1/462 , G06F1/3243 , G06F1/3296 , G06F15/7807
摘要: An operating method of a system-on-chip (SoC) which includes a processor including a first core and a dynamic voltage and frequency scaling (DVFS) module and a clock management unit (CMU) for supplying an operating clock to the first core, the operating method including: obtaining a required performance of the first core; finding available frequencies meeting the required performance; obtaining information for calculating energy consumption for each of the available frequencies; calculating the energy consumption for each of the available frequencies, based on the information; determining a frequency, which causes minimum energy consumption, from among the available frequencies as an optimal frequency; and
adjusting an operating frequency to be supplied to the first core to the optimal frequency.
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