公开(公告)号：US11636889B2

公开(公告)日：2023-04-25

申请号：US15549108

申请日：2016-02-02

申请人： MultiDimension Technology Co., Ltd.

发明人： James Geza Deak ,  Haiping Guo ,  Xiaofeng Cheng ,  Zhimin Zhou

IPC分类号： G11C11/02 ,  G01B7/30 ,  G01D5/14 ,  G01R33/09 ,  G01F15/06

摘要： An automatic magnetic flow recording device, comprises a multitude of coaxially disposed hard magnetic rotating wheels wherein the hard magnetic rotating wheels are circular, and rotate with respect to each other by a predetermined transmission ratio. Each hard magnetic rotating wheel has at least one corresponding biaxial magnetoresistive angle sensor. The biaxial magnetoresistive angle sensors measure the angular positions of the hard magnetic rotating wheels within the range of 0-360 degrees. The biaxial magnetoresistive angle sensors comprise two single-axis linear magnetoresistive sensors, wherein the single-axis linear magnetoresistive sensors are an X-axis magnetoresistive sensor or a Z-axis magnetoresistive sensor. The X-axis magnetoresistive sensor of the hard magnetic rotating wheel measures a magnetic field component parallel to the tangent of the circumference of the hard magnetic rotating wheel. The Z-axis magnetoresistive sensor of the hard magnetic rotating wheel measures a magnetic field component along the radial direction of the hard magnetic rotating wheel. This flow meter recording device has several advantages compared to electronic flow meters with X, Y biaxial angle sensor. These include flexibility of the mounting position, small adjacent hard magnetic rotating wheel interference, and low power consumption.

公开(公告)号：US11227647B2

公开(公告)日：2022-01-18

申请号：US17106242

申请日：2020-11-30

申请人： Samsung Electronics Co., Ltd.

发明人： Sang Kil Lee

IPC分类号： G11C11/16 ,  G06F12/00 ,  G06F12/02 ,  G11C14/00 ,  G11C16/10 ,  G11C11/02 ,  H01L27/22 ,  H01L43/08 ,  H01L43/02 ,  G06F16/25 ,  G06F16/00 ,  G06F16/28

摘要： A semiconductor device is provided. The semiconductor device includes: a processor core which processes program data; a first memory mounted on the same semiconductor chip as the processor core; a second memory including an MRAM cell having a first MTJ (Magnetic Tunnel Junction) structure; a third memory including an MRAM cell having a second MTJ structure different from the first MTJ structure, wherein the processor core selectively stores the program data in one of the first memory, the second memory and the third memory, on the basis of an attribute of the program data.

公开(公告)号：US20210104575A1

公开(公告)日：2021-04-08

申请号：US16848010

申请日：2020-04-14

申请人： Samsung Electronics Co., Ltd.

发明人： Kilho LEE ,  Gwanhyeob KOH

IPC分类号： H01L27/22 ,  G11C11/56 ,  G11C11/02

摘要： A semiconductor device including a substrate that has a first region and a second region, a plurality of lower conductive patterns on the substrate, the plurality of lower conductive patterns including a first conductive pattern in the first region of the substrate and a second conductive pattern in the second region of the substrate, a magnetic tunnel junction on the first conductive pattern, a contact between the magnetic tunnel junction and the first conductive pattern, a through electrode on the second conductive pattern, and a plurality of upper conductive patterns on the magnetic tunnel junction and the through electrode. The contact includes a first contact on the lower conductive patterns, a second contact on the first contact, and a first barrier layer that covers a bottom surface and a lateral surface of the second contact.

公开(公告)号：US20190267072A1

公开(公告)日：2019-08-29

申请号：US16405701

申请日：2019-05-07

申请人： Gyrfalcon Technology Inc.

发明人： Chyu-Jiuh Torng ,  Lin Yang ,  Qi Dong ,  Daniel H. LIU

IPC分类号： G11C11/4078 ,  G11C29/02 ,  G11C29/08 ,  G11C29/24 ,  G06N20/00 ,  G11C11/02

摘要： An integrated circuit includes an artificial intelligence (AID) logic and an embedded memory coupled to the AID logic and connectable to an external processor. The embedded memory includes multiple storage cells and multiple reference units. One or more reference units in the memory are selected for memory access through configuration at chip packaging level by the external processor. The external processor may execute a self-test process to select or update the one or more reference units for memory access so that the error rate of memory is below a threshold. The self-test process may be performed, via a memory initialization controller in the memory, to test and reuse the reference cells in the memory at chip level. The embedded memory may be a STT-MRAM, SOT, OST MRAM, and/or MeRAM memory.

公开(公告)号：US10347317B2

公开(公告)日：2019-07-09

申请号：US15726084

申请日：2017-10-05

申请人： Gyrfalcon Technology Inc.

发明人： Chyu-Jiuh Torng ,  Lin Yang ,  Qi Dong ,  Daniel H. Liu

IPC分类号： G11C11/4078 ,  G06F15/18 ,  G11C11/02 ,  G06N20/00

摘要： An integrated circuit includes an artificial intelligence (AI) logic and an embedded memory coupled to the AI logic and connectable to an external processor. The embedded memory includes multiple storage cells and multiple reference units. One or more reference units in the memory are selected for memory access through configuration at chip packaging level by the external processor. The external processor may execute a self-test process to select or update the one or more reference units for memory access so that the error rate of memory is below a threshold. The self-test process may be performed, via a memory initialization controller in the memory, to test and reuse the reference cells in the memory at chip level. The embedded memory may be a STT-MRAM, SOT, OST MRAM, and/or MeRAM memory.

公开(公告)号：US10332666B2

公开(公告)日：2019-06-25

申请号：US15962286

申请日：2018-04-25

申请人： TDK CORPORATION

发明人： Takekazu Yamane ,  Junichiro Urabe ,  Tsuyoshi Suzuki ,  Atsushi Shimura

IPC分类号： H01F10/32 ,  H03H11/04 ,  G11C11/02 ,  H01P1/218 ,  H03H2/00 ,  G11C11/16 ,  G11C11/15

摘要： The magnetoresistance effect device includes: a first port; a second port; a magnetoresistance effect element; a first signal line that is connected to the first port and applies a high frequency magnetic field to the magnetoresistance effect element; a second signal line that connects the second port and the magnetoresistance effect element to each other; and a direct current application terminal capable of being connected to a power supply that applies a direct current or a direct current voltage. The first signal line includes a magnetic field generator, which extends in a first direction, at a position in the lamination direction of the magnetoresistance effect element or an in-plane direction that is orthogonal to the lamination direction, and the magnetic field generator and the magnetoresistance effect element include an overlapping portion as viewed from the lamination direction in which the magnetic field generator is disposed, or the in-plane direction.

公开(公告)号：US10127956B2

公开(公告)日：2018-11-13

申请号：US15655212

申请日：2017-07-20

申请人： KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION

发明人： Kyung Jin Lee ,  Hyun Woo Lee ,  Byong Guk Park

IPC分类号： G11C11/16 ,  G11C11/4074 ,  G11C11/15 ,  H01L43/10 ,  H01L43/08 ,  H01L43/04 ,  G11C11/02 ,  H01L43/02 ,  G11C11/18

摘要： A magnetic memory device may include tunnel junction unit cells, each including a pinned magnetic layer, an insulating layer, and a free magnetic layer which are sequentially stacked, a conductive line structure configured to supply an in-plane current to the unit cells and to include an antiferromagnetic layer, which is provided adjacent to the free magnetic layer, and a ferromagnetic layer, which is provided adjacent to the antiferromagnetic layer and has an in-plane magnetic anisotropy, and a voltage applying unit configured to independently apply a selection voltage to each of the tunnel junction unit cells. Each of the tunnel junction unit cells may have a magnetization direction that is selectively changed by the in-plane current and the selection voltage.

公开(公告)号：US10062834B2

公开(公告)日：2018-08-28

申请号：US15548204

申请日：2016-01-20

申请人： Institute of Physics, Chinese Academy of Sciences

发明人： Yang Sun ,  Yisheng Chai ,  Dashan Shang

IPC分类号： G11C11/22 ,  H01L43/02 ,  H01L29/82 ,  H01L41/02 ,  H01L41/083 ,  G11C11/02 ,  H01F10/14 ,  H01F10/16 ,  H01L41/187 ,  H01L41/20 ,  H01L43/10

CPC分类号： H01L43/02 ,  G11C11/02 ,  G11C11/22 ,  H01F10/14 ,  H01F10/16 ,  H01L29/82 ,  H01L41/00 ,  H01L41/02 ,  H01L41/083 ,  H01L41/16 ,  H01L41/1871 ,  H01L41/1875 ,  H01L41/20 ,  H01L43/10

摘要： The present invention provides an electromagnetic conversion device, comprising: an intermediate layer and electrode layers located on both sides of the intermediate layer, wherein the intermediate layer is a magnetoelectric layer. The electromagnetic conversion device realizes the direct conversion of charge and magnetic flux, and thus can be used as a fourth fundamental circuit element, so as to provide a new degree of freedom for the design of electronic circuits and information function devices. In addition, the electromagnetic conversion device can be used as memory elements to form a nonvolatile magnetoelectric information memory.

公开(公告)号：US20180158955A1

公开(公告)日：2018-06-07

申请号：US15819987

申请日：2017-11-21

申请人： The Government of the United States of America, as represented by the Secretary of the Navy

发明人： Berend T. Jonker ,  Connie H. Li ,  Kathleen M. McCreary

IPC分类号： H01L29/78 ,  G11C11/22 ,  H01L29/66 ,  H01L29/51 ,  G11C11/56 ,  G11C11/02 ,  H01L29/68

CPC分类号： H01L29/78391 ,  G01R33/09 ,  G11C11/02 ,  G11C11/14 ,  G11C11/223 ,  G11C11/5678 ,  G11C13/0009 ,  H01F10/1933 ,  H01L29/24 ,  H01L29/516 ,  H01L29/6684 ,  H01L29/685 ,  H01L29/735 ,  H01L29/7391 ,  H01L29/861 ,  H01L31/0322 ,  H01L43/08 ,  H01L43/10

摘要： The invention relates to heterostructures including a layer of a two-dimensional material placed on a multiferroic layer. An ordered array of differing polarization domains and surface charges in the multiferroic layer produces corresponding domains having differing properties in the two-dimensional material. When the multiferroic layer is ferroelectric, the ferroelectric polarization domains in the layer produce local electric fields that penetrate the two-dimensional material. The local electric fields and surface charges can control the structural phase of the two-dimensional material, which in turn determines whether the two-dimensional material layer is insulating or metallic, has a band gap or no band gap, and whether it is magnetic or non-magnetic. Methods for producing the heterostructures are provided. Devices incorporating the heterostructures are also provided.

公开(公告)号：US20180052775A1

公开(公告)日：2018-02-22

申请号：US15785087

申请日：2017-10-16

申请人： GREENTHREAD, LLC

发明人： G.R. Mohan Rao

IPC分类号： G06F12/10 ,  G11C7/10 ,  G11C14/00 ,  G11C16/10 ,  G11C11/22 ,  G11C13/00 ,  G11C16/06 ,  G11C11/02

CPC分类号： G06F12/10 ,  G06F2212/205 ,  G06F2212/214 ,  G11C7/1006 ,  G11C7/1084 ,  G11C11/02 ,  G11C11/225 ,  G11C13/0021 ,  G11C14/00 ,  G11C14/0018 ,  G11C16/06 ,  G11C16/10

摘要： A nonvolatile memory system is described with novel architecture coupling nonvolatile storage memory with random access volatile memory. New commands are included to enhance the read and write performance of the memory system.