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公开(公告)号:US10854355B2
公开(公告)日:2020-12-01
申请号:US16621021
申请日:2018-06-07
发明人: Ankit Mahajan, Jr. , James Zhu , Saagar A. Shah , Mikhail L. Pekurovsky , Vivek Krishnan , Kevin T. Reddy , Christopher B. Walker, Jr. , Michael A. Kropp , Kara A. Meyers , Teresa M. Goeddel , Thomas J. Metzler , Jonathan W. Kemling , Roger W. Barton
IPC分类号: H01K3/10 , H01B7/06 , H01B7/02 , H01B13/00 , H01B13/008
摘要: A stretchable conductor includes a substrate with a first major surface and an elongate wire, wherein the substrate is an elastomeric material, the elongate wire is on the first major surface of the substrate, the wire includes a first end and a second end, and further includes at least one arcuate region between the first end and the second end. At least one portion of the arcuate region of the wire in the region has a first surface area portion embedded in the surface of the substrate and a second surface area portion unembedded on the substrate and exposed in an amount sufficient to render at least an area of the substrate in the region electrically conductive. The unembedded second surface portion of the arcuate region may lie above or below a plane of the substrate. Additionally, different methods of preparing said stretchable conductor are disclosed. Composite articles including said stretchable conductor in durable electrical contact with a conductive fabric are also disclosed.
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公开(公告)号:US10813214B2
公开(公告)日:2020-10-20
申请号:US16007410
申请日:2018-06-13
申请人: Invensas Corporation
摘要: A method for making an interconnection component includes forming a mask layer that covers a first opening in a sheet-like element that includes a first opening extending between the first and second surfaces of the element. The element consists essentially of a material having a coefficient of thermal expansion of less than 10 parts per million per degree Celsius. The first opening includes a central opening and a plurality of peripheral openings open to the central opening that extends in an axial direction of the central opening. A conductive seed layer can cover an interior surface of the first opening. The method further includes forming a first mask opening in at least a portion of the mask layer overlying the first opening to expose portions of the conductive seed layer within the peripheral openings; and forming electrical conductors on exposed portions of the conductive seed layer.
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公开(公告)号:US10356906B2
公开(公告)日:2019-07-16
申请号:US15188681
申请日:2016-06-21
申请人: ABB Schweiz AG
摘要: A method of manufacturing a printed circuit board includes providing a printed circuit board (PCB) substrate including at least one insulating layer and first and second conductive layers separated from one another by the at least one insulating layer, forming a first via hole in the PCB substrate extending from the first conductive layer to the second conductive layer, where the first via hole is defined by a first sidewall of the PCB substrate, forming a second via hole in the PCB substrate, where the second via hole is defined by a second sidewall of the PCB substrate, and selectively plating the first sidewall and the second sidewall to form a first via and a second via, respectively, where the first via and the second via have different via sidewall thicknesses.
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公开(公告)号:US10321557B2
公开(公告)日:2019-06-11
申请号:US15302645
申请日:2015-04-09
发明人: Glenn A. Brigham
IPC分类号: H01K3/10 , H05K1/02 , H01Q15/00 , H05K3/46 , H05K1/11 , H05K1/18 , H05K3/40 , H05K1/16 , H01Q15/14
摘要: An assembly that includes a printed circuit board having an air gap, and a method of fabricating the assembly is disclosed. The assembly includes at least one air gap. This air gap is created by using a soluble material during the PCB assembly process. The soluble material can preferably be processed in accordance with traditional PCB fabrication processes. For example, other materials can be bonded to the soluble material. Additionally, the soluble material is capable of withstanding a drilling process. After the PCB assembly is complete, the soluble material is then dissolved, leaving an air gap where the soluble material once existed. This assembly may be useful in configurations where an antenna, EBG material or other electronic structure is to be disposed above the top surface of the printed circuit board.
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公开(公告)号:US10143084B2
公开(公告)日:2018-11-27
申请号:US15380054
申请日:2016-12-15
申请人: NXP USA, INC.
发明人: Michael B. Vincent , Zhiwei Gong , Scott M. Hayes
IPC分类号: H01K3/10 , H05K1/11 , H05K3/42 , H05K3/00 , H05K3/28 , H05K3/34 , H05K1/18 , H01L21/48 , H01L23/498 , H01L21/56 , H01L23/31
摘要: A plated hole with a sidewall plating. The plated hole has a vent opening that has a sidewall of non-conductive material that is not plated. During attachment of a joint conductive material such as solder to the sidewall plating, gasses generated from the attachment process are outgassed through the vent opening.
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公开(公告)号:US09984994B2
公开(公告)日:2018-05-29
申请号:US15432559
申请日:2017-02-14
IPC分类号: H01K3/10 , H01L23/00 , H01L23/13 , H01L25/00 , H01L25/065 , H01L23/31 , H01L23/498 , A61N1/05 , A61B5/04 , A61N1/375
CPC分类号: H01L24/83 , A61B5/0031 , A61B5/04001 , A61N1/05 , A61N1/0543 , A61N1/0551 , A61N1/375 , H01L23/13 , H01L23/147 , H01L23/3107 , H01L23/49827 , H01L23/4985 , H01L24/45 , H01L24/48 , H01L24/85 , H01L25/065 , H01L25/0657 , H01L25/50 , H01L2224/45169 , H01L2224/4811 , H01L2224/48496 , H01L2224/83007 , H01L2224/83345 , H01L2224/83365 , H01L2224/83385 , H01L2224/83986 , H01L2224/85 , H01L2224/85007 , H01L2224/85345 , H01L2224/85385 , H01L2224/85986 , H01L2924/00014 , H01L2924/0002 , H01L2924/07802 , H01L2924/12042 , H01L2924/00 , H01L2924/0001 , H01L2224/05599
摘要: A method for bonding a hermetic module to an electrode array including the steps of: providing the electrode array having a flexible substrate with a top surface and a bottom surface and including a plurality of pads in the top surface of the substrate; attaching the hermetic module to the bottom surface of the electrode array, the hermetic module having a plurality of bond-pads wherein each bond-pad is adjacent to the bottom surface of the electrode array and aligns with a respective pad; drill holes through each pad to the corresponding bond-pad; filling each hole with biocompatible conductive ink; forming a rivet on the biocompatible conductive ink over each pad; and overmolding the electrode array with a moisture barrier material.
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公开(公告)号:US09583458B2
公开(公告)日:2017-02-28
申请号:US13836582
申请日:2013-03-15
IPC分类号: H01K3/10 , H01L23/00 , A61N1/375 , A61B5/00 , H01L23/13 , H01L23/14 , H01L23/31 , A61B5/04 , A61N1/05 , H01L25/065 , H01L23/498
CPC分类号: H01L24/83 , A61B5/0031 , A61B5/04001 , A61N1/05 , A61N1/0543 , A61N1/0551 , A61N1/375 , H01L23/13 , H01L23/147 , H01L23/3107 , H01L23/49827 , H01L23/4985 , H01L24/45 , H01L24/48 , H01L24/85 , H01L25/065 , H01L25/0657 , H01L25/50 , H01L2224/45169 , H01L2224/4811 , H01L2224/48496 , H01L2224/83007 , H01L2224/83345 , H01L2224/83365 , H01L2224/83385 , H01L2224/83986 , H01L2224/85 , H01L2224/85007 , H01L2224/85345 , H01L2224/85385 , H01L2224/85986 , H01L2924/00014 , H01L2924/0002 , H01L2924/07802 , H01L2924/12042 , H01L2924/00 , H01L2924/0001 , H01L2224/05599
摘要: A method for bonding a hermetic module to an electrode array including the steps of: providing the electrode array having a flexible substrate with a top surface and a bottom surface and including a plurality of pads in the top surface of the substrate; attaching the hermetic module to the bottom surface of the electrode array, the hermetic module having a plurality of bond-pads wherein each bond-pad is adjacent to the bottom surface of the electrode array and aligns with a respective pad; drill holes through each pad to the corresponding bond-pad; filling each hole with biocompatible conductive ink; forming a rivet on the biocompatible conductive ink over each pad; and overmolding the electrode array with a moisture barrier material.
摘要翻译: 一种将密封模块粘合到电极阵列的方法,包括以下步骤:提供具有顶表面和底表面的柔性基底的电极阵列,并且在基底的顶表面中包括多个垫片; 将密封模块附接到电极阵列的底表面,密封模块具有多个接合焊盘,其中每个接合焊盘邻近电极阵列的底表面并与相应的焊盘对齐; 通过每个焊盘钻孔到相应的焊盘; 用生物相容的导电油墨填充每个孔; 在每个垫上的生物相容性导电油墨上形成铆钉; 并用防潮材料包覆模制电极阵列。
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公开(公告)号:US09420708B2
公开(公告)日:2016-08-16
申请号:US13427231
申请日:2012-03-22
申请人: Toshiaki Hibino , Takema Adachi
发明人: Toshiaki Hibino , Takema Adachi
IPC分类号: H01K3/10 , H05K3/46 , H05K3/44 , H01L23/498 , H01L21/48
CPC分类号: H05K3/4608 , H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L2224/16225 , H01L2924/15311 , H05K3/445 , H05K2201/096 , H05K2201/09827 , H05K2201/09854 , Y10T29/49124
摘要: A method for manufacturing a printed wiring board includes preparing a core substrate having a metal layer having a first penetrating hole and insulation layers formed on the metal layer such that the metal layer is interposed between the insulation layers, forming in the core substrate a second penetrating hole having a first opening portion aligned with the first penetrating hole on a first-surface side of the core substrate and a second opening portion aligned with the first penetrating hole on a second-surface side of the core substrate, forming a first conductor on a first surface of the core substrate, forming a second conductor on a second surface of the core substrate on the opposite side of the first surface of the core substrate, and filling a conductive material in the second penetrating hole such that a through-hole conductor connecting the first conductor and the second conductor is formed.
摘要翻译: 一种制造印刷电路板的方法,包括制备具有第一穿透孔的金属层和形成在金属层上的绝缘层的芯基板,使得金属层插入在绝缘层之间,在芯基板中形成第二穿透 在芯基板的第一表面侧具有与第一贯通孔对准的第一开口部和与芯基板的第二表面侧的第一贯通孔对准的第二开口部, 在芯基板的第一表面上,在芯基板的第一表面的相对侧上的芯基板的第二表面上形成第二导体,并且在第二贯穿孔中填充导电材料,使得连接 形成第一导体和第二导体。
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公开(公告)号:US09107314B2
公开(公告)日:2015-08-11
申请号:US13799221
申请日:2013-03-13
申请人: FUJITSU LIMITED
发明人: Hideaki Yoshimura
CPC分类号: H05K1/115 , G01R31/2889 , H05K1/0298 , H05K1/0366 , H05K3/4038 , H05K3/425 , H05K3/445 , H05K3/4608 , H05K2201/0323 , H05K2201/09545 , H05K2201/09554 , H05K2201/0959 , Y10T29/49165
摘要: A method of manufacturing a wiring board includes: forming an outer through hole in a core substrate; filling the outer through hole with an insulation resin; forming a first conductive layer on a surface of the insulation resin at a portion where a core connecting via is formed; forming a land around the first conductive layer; laminating the wiring layer on the core substrate after the forming of the first conductive layer and the forming of the land; forming an inner through hole having a smaller diameter than that of the outer through hole and penetrating through the core substrate and the wiring layer so as to penetrate through the insulation resin; and coating a first conductive film on an inner wall surface of the inner through hole, in which the core substrate and the first conductive film are electrically connected through the first conductive layer and the land.
摘要翻译: 制造布线板的方法包括:在芯基板中形成外通孔; 用绝缘树脂填充外部通孔; 在形成芯连接通孔的部分上在绝缘树脂的表面上形成第一导电层; 形成围绕所述第一导电层的区域; 在形成第一导电层并形成焊盘之后,在芯基板上层叠布线层; 形成直径小于所述外通孔直径的内通孔,穿过所述芯基板和所述布线层以贯穿所述绝缘树脂; 并且在内部通孔的内壁表面上涂覆第一导电膜,其中芯基板和第一导电膜通过第一导电层和焊盘电连接。
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公开(公告)号:USRE45637E1
公开(公告)日:2015-07-28
申请号:US13492284
申请日:2012-06-08
申请人: Kalu K. Vasoya
发明人: Kalu K. Vasoya
CPC分类号: H05K3/386 , H05K1/0271 , H05K1/0366 , H05K3/38 , H05K3/403 , H05K3/429 , H05K3/4626 , H05K3/4641 , H05K3/4694 , H05K2201/0187 , H05K2201/0209 , H05K2201/0323 , H05K2201/068 , H05K2201/10416 , H05K2203/063
摘要: Methods of manufacturing printed wiring boards including electrically conductive constraining cores that involve a single lamination cycle are disclosed. One example of the method of the invention includes drilling a clearance pattern in an electrically conductive constraining core, arranging the electrically conductive constraining core in a stack up that includes B-stage (semi-cured) layers of dielectric material on either side of the constraining core and additional layers of material arranged to form the at least one functional layer, performing a lamination cycle on the stack up that causes the resin in the B-stage (semi-cured) layers of dielectric to reflow and fill the clearance pattern in the electrically conductive constraining core before curing and drilling plated through holes.
摘要翻译: 公开了包括涉及单层压循环的导电约束芯的印刷线路板的制造方法。 本发明的方法的一个实例包括在导电约束芯中钻出间隙图案,将导电约束芯堆叠起来,其包括在约束的任一侧上的电介质材料的B阶(半固化)层 芯层和另外的材料层,以形成至少一个功能层,在叠层上执行层压循环,导致电介质的B级(半固化)层中的树脂回流并填充在 导电约束芯在固化和钻孔电镀通孔之前。
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