公开(公告)号：US20250062120A1

公开(公告)日：2025-02-20

申请号：US18938071

申请日：2024-11-05

Applicant: KYOCERA Corporation

Inventor： Takehiro NISHIMURA ,  Chiaki DOUMOTO

IPC: H01L21/02 ,  C30B25/04 ,  C30B29/40 ,  H01L21/033

Abstract: A semiconductor substrate of the present disclosure includes a substrate comprising non-growth regions having a striped configuration and crystal growth-derived layers located on the substrate and including a nitride semiconductor. Each of the crystal growth-derived layers has a lower portion joined to a part of the substrate and the part of the substrate is located between the non-growth regions. The lower portion has a width that gradually increases with distance from the substrate and a longitudinal direction of the striped configuration is aligned with a direction of an m-axis of the nitride semiconductor.

公开(公告)号：US12230505B2

公开(公告)日：2025-02-18

申请号：US17677752

申请日：2022-02-22

Applicant: TOKYO ELECTRON LIMITED

Inventor： Akihiro Tsuji ,  Masanobu Honda ,  Hikaru Watanabe

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/67 ,  H01L21/683

Abstract: An apparatus which selectively etches a first region with respect to a second region made of a material different from that of the first region. The apparatus is controlled to perform a first step for generating, in a processing container housing a workpiece to be treated, a plasma of a treatment gas from a gas supply including a fluorocarbon gas, an oxygen-containing gas, and an inert gas, and forming a deposit including fluorocarbon on the object to be treated, and a second step for etching the first region with radicals of the fluorocarbon included in the deposit. The apparatus is also controlled to perform the first step and the second step repeatedly.

公开(公告)号：US20250046619A1

公开(公告)日：2025-02-06

申请号：US18791926

申请日：2024-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Guifu Yang ,  Sunghwan Jang ,  Sanghyeon Kim ,  Jinbum Kim ,  Hanhum Park ,  Sunguk Jang

IPC: H01L21/3115 ,  H01L21/033 ,  H01L21/311 ,  H01L21/3213

Abstract: A method of manufacturing a semiconductor apparatus includes forming a target layer, a bottom mask layer including a first mask, and a photoresist pattern, on a substrate; contracting the photoresist pattern; forming a mandrill bar on the first mask layer using the photoresist pattern that had been contracted; forming a conformal spacer layer on the first mask and the mandrill bar; etching the spacer layer such that at least a portion of the first mask is free of the spacer layer; forming a sacrificial layer on the at least the portion of the first mask; forming a hard-mask bar by etching the spacer layer and the first mask; and patterning the target layer using the hard-mask bar.

公开(公告)号：US12217961B2

公开(公告)日：2025-02-04

申请号：US17856376

申请日：2022-07-01

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chia-Chien Kuang ,  Tze-Chung Lin ,  Li-Te Lin

IPC: H01L21/033 ,  H01L21/02 ,  H01L21/308 ,  H01L21/311 ,  H01L29/66

Abstract: A method for manufacturing a semiconductor device includes: forming a patterned hard mask on a patterned structure disposed on a substrate, such that a hard mask portion of the patterned hard mask is disposed on a fin portion of the patterned structure; and laterally trimming the hard mask portion by a lateral etching process. The lateral etching process includes a radical etching process and a chemical etching process. Alternatively, the lateral etching process includes a radical etching process, a plasma etching process, or a combination thereof, and a cleaning process.

公开(公告)号：US12211694B2

公开(公告)日：2025-01-28

申请号：US18206514

申请日：2023-06-06

Applicant: Applied Materials, Inc.

Inventor： Prashant Kumar Kulshreshtha ,  Ziqing Duan ,  Karthik Thimmavajjula Narasimha ,  Kwangduk Douglas Lee ,  Bok Hoen Kim

IPC: H01L21/033 ,  C23C16/32 ,  C23C16/505 ,  H01L21/02 ,  H01L21/3065

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about −100 MPa to about 100 MPa.

公开(公告)号：US12205994B2

公开(公告)日：2025-01-21

申请号：US18502183

申请日：2023-11-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsan-Chun Wang ,  Su-Hao Liu ,  Liang-Yin Chen ,  Huicheng Chang ,  Yee-Chia Yeo

IPC: H01L29/40 ,  H01L21/033 ,  H01L21/285 ,  H01L21/3115 ,  H01L29/45

Abstract: A method of forming a semiconductor device includes forming a source/drain region and a gate electrode adjacent the source/drain region, forming a hard mask over the gate electrode, forming a bottom mask over the source/drain region, wherein the gate electrode is exposed, and performing a nitridation process on the hard mask over the gate electrode. The bottom mask remains over the source/drain region during the nitridation process and is removed after the nitridation. The method further includes forming a silicide over the source/drain region after removing the bottom mask.

公开(公告)号：US12198933B2

公开(公告)日：2025-01-14

申请号：US17604477

申请日：2021-06-30

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： ChihCheng Liu

IPC: H01L21/033 ,  H01L23/528 ,  H10B12/00

Abstract: Embodiments of the present disclosure provide a forming method of a semiconductor structure and a semiconductor structure. The forming method includes: providing a base, the base includes a central region and dummy regions, and the central region includes a molding region and cutting regions; forming multiple spaced core pillars on the base; forming an initial mask layer surrounding and covering a sidewall of each core pillar on the base; removing the initial mask layers located in each cutting region to form multiple spaced mask sidewall strips in the molding region, and retaining at least one of the initial mask layers in each dummy region as a ring-shaped sidewall; removing the core pillars located in the central region and the dummy regions; and etching the base to form multiple functional structures, and etching the base to form dummy functional structures on two sides of the multiple functional structures.

公开(公告)号：US12198932B2

公开(公告)日：2025-01-14

申请号：US17457970

申请日：2021-12-07

Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.

Inventor： Jungsu Kang ,  Sen Li ,  Qiang Wan ,  Tao Liu

IPC: H01L21/033 ,  H01L21/027 ,  H01L21/308

Abstract: A method of manufacturing a semiconductor structure and a semiconductor structure are disclosed. The method of manufacturing a semiconductor structure includes: providing a substrate, and forming a first sacrificial layer on the substrate, where the first sacrificial layer includes a first sacrificial dielectric layer and a second sacrificial dielectric layer; patterning the first sacrificial layer, and forming first intermediate pattern structures that are arranged at intervals, where a first gap is provided between two adjacent first intermediate pattern structures; forming a first spacer pad layer in the first gap, where the first spacer pad layer covers sidewalls of each of the two adjacent first intermediate pattern structures and a bottom of the first gap; removing the first spacer pad layer at the bottom of the first gap, and the second sacrificial dielectric layer; and removing the first sacrificial dielectric layer, to form first pattern structures.

公开(公告)号：US20250014909A1

公开(公告)日：2025-01-09

申请号：US18710946

申请日：2022-11-28

Applicant: Lam Research Corporation

Inventor： Eric HUDSON ,  Prabhat KUMAR

IPC: H01L21/311 ,  H01L21/02 ,  H01L21/033

Abstract: A method for selectively etching at least one feature in a silicon oxide region with respect to a lower oxygen containing region is provided. An etch gas is provided comprising a fluorocarbon gas and at least one of a metalloid halide gas or metal halide gas. The etch gas is formed into a plasma. At least one feature is selectively etched in the silicon oxide region with respect to the lower oxygen containing region, while simultaneously forming a metalloid or metal containing hardmask over the lower oxygen containing region.

公开(公告)号：US20250011623A1

公开(公告)日：2025-01-09

申请号：US18745116

申请日：2024-06-17

Applicant: SHIN-ETSU CHEMICAL CO., LTD.

Inventor： Daisuke KORI ,  Yasuyuki Yamamoto ,  Tomohiro Imata

IPC: C09D201/02 ,  G03F7/00 ,  G03F7/11 ,  G03F7/16 ,  H01L21/027 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213

Abstract: The present invention is a composition for forming an organic film, containing: (A) a polymer having a repeating unit represented by the following general formula (1); (B) a resin for forming an organic film; and (C) a solvent, where R in the general formula (1) represents a saturated or unsaturated divalent organic group having 2 to 30 carbon atoms. This provides: a composition for forming an organic film which is excellent in film-formability (in-plane uniformity) on a substrate (wafer) and filling property and in which humps in an EBR process are suppressed; a method for forming an organic film, using the composition; and a patterning process.