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1.
公开(公告)号:US20240322002A1
公开(公告)日:2024-09-26
申请号:US18418410
申请日:2024-01-22
发明人: Spyridon Pavlidis , Fred Kish
IPC分类号: H01L29/66 , H01L21/18 , H01L29/20 , H01L29/205 , H01L29/737
CPC分类号: H01L29/66318 , H01L21/187 , H01L29/2003 , H01L29/205 , H01L29/7378
摘要: Disclosed herein are heterojunction bipolar transistor (HBT) devices and methods of making and use thereof.
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公开(公告)号:US20240250166A1
公开(公告)日:2024-07-25
申请号:US18533354
申请日:2023-12-08
发明人: Hidemoto TOMITA
CPC分类号: H01L29/7813 , H01L21/187 , H01L29/1095 , H01L29/1608 , H01L29/66068
摘要: A trench gate semiconductor device includes a semiconductor substrate, first and second trenches, a gate insulating film, a gate electrode, and an upper electrode. The semiconductor substrate includes an n-type first semiconductor region in contact with the upper electrode, a p-type body region extending from the gate insulating film in the first trench to the gate insulating film in the second trench below the first semiconductor region, and an n-type second semiconductor region extending from the gate insulating film in the first trench to the gate insulating film in the second trench below the body region. A maximum value of a distance between the first trench and the second trench in a depth range in which the body region is disposed is less than 200 nm. The distance between the first trench and the second trench at the upper surface of the semiconductor substrate is larger than the maximum value.
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公开(公告)号:US20240203804A1
公开(公告)日:2024-06-20
申请号:US18514563
申请日:2023-11-20
IPC分类号: H01L23/13 , B28D5/00 , H01L21/18 , H01L21/304 , H01L23/14
CPC分类号: H01L23/13 , B28D5/0005 , H01L21/187 , H01L21/304 , H01L23/147 , H01L25/0657
摘要: A semiconductor device assembly is provided. The semiconductive device assembly includes a semiconductor die with a substrate having an engineered portion and a semiconductive portion. The engineered portion includes one or more of: a sintered material, a corrugated material, oriented strands of material compressed to form a solid structure, layers of material compressed to form a solid structure, or a material arranged to form one or more planar trusses. The semiconductive portion is adhered directly to the engineered portion. A layer of dielectric material is disposed at the semiconductive portion, and circuitry is disposed at the layer of dielectric material. In doing so, a cost-efficient and mechanically robust semiconductor device may be assembled.
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4.
公开(公告)号:US20240186298A1
公开(公告)日:2024-06-06
申请号:US18439441
申请日:2024-02-12
IPC分类号: H01L25/075 , H01L21/18 , H01L21/20 , H01L21/447 , H01L23/00 , H01L23/495 , H01L33/00 , H01L33/48 , H01L33/62
CPC分类号: H01L25/0753 , H01L21/187 , H01L21/2007 , H01L21/447 , H01L23/49513 , H01L24/04 , H01L24/06 , H01L24/83 , H01L24/94 , H01L24/97 , H01L33/0066 , H01L33/0093 , H01L33/0095 , H01L33/486 , H01L33/62 , H01L24/32 , H01L2224/32225 , H01L2224/32245 , H01L2224/83001 , H01L2224/83005 , H01L2224/83121 , H01L2224/8314 , H01L2224/83193 , H01L2924/12041 , H01L2924/12042
摘要: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
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公开(公告)号:US20240071746A1
公开(公告)日:2024-02-29
申请号:US17896961
申请日:2022-08-26
发明人: Yu-Hao Tsai , Hojin Kim , Mingmei Wang
CPC分类号: H01L21/02252 , H01L21/02052 , H01L21/02323 , H01L21/02332 , H01L21/0234 , H01L21/02343 , H01L21/187
摘要: A method includes providing a first substrate having a first surface and a second substrate having a second surface, where the first surface and the second surface each include a silicon-based dielectric layer, applying hydrogen plasma to form hydrogen-terminated groups on the silicon-based dielectric layer, applying oxygen plasma to oxidize the silicon-based dielectric layer including the hydrogen-terminated groups, applying nitrogen plasma to the oxidized silicon-based dielectric layer, thereby forming a treated silicon-based dielectric layer, rinsing the treated silicon-based dielectric layer, and coupling the first substrate to the second substrate by physically contacting the rinsed and treated silicon-based dielectric layer on the first surface with the rinsed and treated silicon-based dielectric layer on the second surface.
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公开(公告)号:US11901181B2
公开(公告)日:2024-02-13
申请号:US17225384
申请日:2021-04-08
申请人: Wolfspeed, Inc.
发明人: Matthew Donofrio , John Edmond , Hua-Shuang Kong , Elif Balkas
CPC分类号: H01L21/187 , B23K26/0006 , H01L21/0242 , H01L21/2007 , C30B33/02
摘要: A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., >800 μm thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25° C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.
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公开(公告)号:US11735460B2
公开(公告)日:2023-08-22
申请号:US17387861
申请日:2021-07-28
申请人: QROMIS, Inc.
发明人: Vladimir Odnoblyudov , Dilip Risbud , Ozgur Aktas , Cem Basceri
IPC分类号: H01L29/778 , H01L21/683 , H01L21/762 , H01L29/861 , H01L21/285 , H01L21/18 , H01L21/02 , H01L21/28 , H01L21/48 , H01L29/10 , H01L29/20 , H01L29/205 , H01L29/417 , H01L29/423 , H01L29/66 , C30B25/18 , C30B29/06 , C30B29/40 , H01L29/872 , H01L29/40
CPC分类号: H01L21/6835 , C30B25/183 , C30B29/06 , C30B29/406 , H01L21/0242 , H01L21/0254 , H01L21/0257 , H01L21/02428 , H01L21/02458 , H01L21/18 , H01L21/28264 , H01L21/28587 , H01L21/4807 , H01L21/762 , H01L29/1033 , H01L29/2003 , H01L29/205 , H01L29/4175 , H01L29/4236 , H01L29/42376 , H01L29/66143 , H01L29/66204 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L29/861 , H01L29/8613 , H01L29/872 , H01L29/1066 , H01L29/402 , H01L2221/6835 , H01L2221/68345
摘要: An integrated circuit device includes an engineered substrate including a substantially single crystal layer and a buffer layer coupled to the substantially single crystal layer. The integrated circuit device also includes a plurality of semiconductor devices coupled to the buffer layer. The plurality of semiconductor devices can include a first power device coupled to a first portion of the buffer layer and a second power device coupled to a second portion of the buffer layer. The first power device includes a first channel region comprising a first end, a second end, and a first central portion disposed between the first end and the second end. The second power device includes a second channel region comprising a third end, a fourth end, and a second central portion disposed between the third end and the fourth end.
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公开(公告)号:US11664228B2
公开(公告)日:2023-05-30
申请号:US16627693
申请日:2018-06-19
发明人: Yuangen Yu , Zhijun Huo , Bin Zhao , Hui Fu , Xingxing Wang
IPC分类号: H01L21/18 , H01L21/67 , H01L21/683 , H01L21/687
CPC分类号: H01L21/187 , H01L21/67017 , H01L21/67092 , H01L21/67155 , H01L21/67242 , H01L21/6838 , H01L21/68785
摘要: A vacuumizing device includes a vacuum chamber, a bonding fixture and a vacuumizing system. The bonding fixture is disposed in the vacuum chamber and includes a substrate table provided with a plurality of grooves for retention of the substrate by suction. The vacuumizing system is disposed in communication with both the vacuum chamber and grooves. During vacuumizing by the vacuumizing system, a vacuum value in the grooves is smaller than or equal to a vacuum value in the vacuum chamber. In the vacuumizing device and methods, the vacuumizing system is used to vacuumize the grooves in the substrate table and the vacuum chamber so that the vacuum value in the grooves is always smaller than or equal to that in the vacuum chamber. As a result, the substrates are firmly retained on the substrate table without warping, thereby improving the quality of substrate bonding.
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公开(公告)号:US20230154828A1
公开(公告)日:2023-05-18
申请号:US18056070
申请日:2022-11-16
CPC分类号: H01L23/46 , H01L21/187
摘要: The disclosed technology relates to microelectronic devices that can dissipate heat efficiently. In some aspects, such a microelectronic device includes a first semiconductor element and at least one second semiconductor element disposed on the first semiconductor element. The microelectronic device may further include a fluidic cooling unit disposed on the first semiconductor element. In some embodiment, the fluidic cooling unit may include a cavity structure to contain a fluid. In some embodiment, the fluidic cooling unit may include a thermal pathway to transfer heat away from the first semiconductor element.
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公开(公告)号:US20230117625A1
公开(公告)日:2023-04-20
申请号:US18083806
申请日:2022-12-19
发明人: Markus Wimplinger , Florian Kurz , Viorel Dragoi
IPC分类号: H01L21/67 , H01L21/18 , H01L21/20 , H01L21/687
摘要: A device, a system and a method for bonding two substrates. A first substrate holder has a recess and an elevation.
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