公开(公告)号：US20230118405A1

公开(公告)日：2023-04-20

申请号：US17845092

申请日：2022-06-21

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： Xiang LIU

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L21/76 ,  H01L21/306

摘要： Embodiments of the disclosure provide a semiconductor structure and a method for forming the same. The semiconductor structure includes: a semiconductor substrate including a plurality of active areas and first isolation structures arranged at intervals along a first direction; gate structures located in the active areas and the first isolation structures. Top surfaces of the active areas extend beyond top surfaces of the gate structures; second isolation structures with a preset height located on surfaces of the gate structures, and the top surfaces of the second isolation structures are flush with the top surfaces of the active areas.

公开(公告)号：US11631688B2

公开(公告)日：2023-04-18

申请号：US17540224

申请日：2021-12-01

申请人： YANGTZE MEMORY TECHNOLOGIES CO., LTD.

发明人： Jun Liu ,  Weihua Cheng

IPC分类号： H01L27/11 ,  H01L27/1157 ,  H01L21/50 ,  H01L23/00 ,  H01L27/06 ,  H01L27/108 ,  H01L27/11578 ,  G11C14/00 ,  G11C16/04 ,  H01L25/18 ,  H01L25/00 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11582 ,  H01L29/04 ,  H01L29/16 ,  H01L21/02 ,  H01L21/20 ,  H01L21/76 ,  H01L21/822 ,  H01L25/065

摘要： Embodiments of bonded unified semiconductor chips and fabrication and operation methods thereof are disclosed. In an example, a method for forming a unified semiconductor chip is disclosed. A first semiconductor structure is formed. The first semiconductor structure includes one or more processors, an array of embedded DRAM cells, and a first bonding layer including a plurality of first bonding contacts. A second semiconductor structure is formed. The second semiconductor structure includes an array of NAND memory cells and a second bonding layer including a plurality of second bonding contacts. The first semiconductor structure and the second semiconductor structure are bonded in a face-to-face manner, such that the first bonding contacts are in contact with the second bonding contacts at a bonding interface.

公开(公告)号：US11626388B2

公开(公告)日：2023-04-11

申请号：US17580521

申请日：2022-01-20

申请人： Micron Technology, Inc.

发明人： Anilkumar Chandolu

IPC分类号： H01L21/76 ,  H01L25/065 ,  H01L21/768 ,  H01L23/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/538 ,  H01L25/18 ,  H01L25/00 ,  H01L23/498 ,  H01L23/31 ,  H01L23/367

摘要： Semiconductor die assemblies having interconnect structures with redundant electrical connectors are disclosed herein. In one embodiment, a semiconductor die assembly includes a first semiconductor die, a second semiconductor die, and an interconnect structure between the first and the second semiconductor dies. The interconnect structure includes a first conductive film coupled to the first semiconductor die and a second conductive film coupled to the second semiconductor die. The interconnect structure further includes a plurality of redundant electrical connectors extending between the first and second conductive films and electrically coupled to one another via the first conductive film.

公开(公告)号：US11615989B2

公开(公告)日：2023-03-28

申请号：US17741791

申请日：2022-05-11

申请人： KEY FOUNDRY CO., LTD.

发明人： Yang Beom Kang ,  Kang Sup Shin

IPC分类号： H01L21/82 ,  H01L21/76 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L21/285 ,  H01L21/265 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/764 ,  H01L21/762 ,  H01L21/8236 ,  H01L29/66 ,  H01L29/45 ,  H01L27/088

摘要： A semiconductor device includes etch stop films formed on the first gate electrode, the first source region, the first drain region, and the shallow trench isolation regions, respectively. First interlayer insulating films are formed on the etch stop film, respectively. Deep trenches are formed in the substrate between adjacent ones of the first interlayer insulating films to overlap the shallow trench isolation regions. Sidewall insulating films are formed in the deep trenches, respectively. A gap-fill insulating film is formed on the sidewall insulating film. A second interlayer insulating film is formed on the gap-fill insulating film. A top surface of the second interlayer insulating film is substantially planar and a bottom surface of the second interlayer insulating film is undulating.

公开(公告)号：US20230074093A1

公开(公告)日：2023-03-09

申请号：US17944853

申请日：2022-09-14

申请人： NISSAN MOTOR CO., LTD. ,  RENAULT s.a.s.

发明人： Toshiharu MARUI ,  Tetsuya HAYASHI ,  Keiichiro NUMAKURA ,  Wei NI ,  Ryota TANAKA ,  Keisuke TAKEMOTO

IPC分类号： H01L29/06 ,  H01L21/04 ,  H01L21/76 ,  H01L21/761 ,  H01L29/16

摘要： A semiconductor device includes a semiconductor base body, and a first main electrode and a second main electrode provided on the semiconductor base body. The semiconductor base body includes a drift region of a first conductivity type through which a main current flows, a column region of a second conductivity type arranged adjacent to the drift region in parallel to a current passage of the main current, a second electrode-connection region of the first conductivity type electrically connected to the second main electrode, and a low-density electric-field relaxation region of the first conductivity type having a lower impurity concentration than the drift region and arranged between the second electrode-connection region and the column region.

公开(公告)号：US11562924B2

公开(公告)日：2023-01-24

申请号：US16779205

申请日：2020-01-31

申请人： CANON KABUSHIKI KAISHA

发明人： Seth J. Bamesberger ,  Ozkan Ozturk ,  Christopher Ellis Jones ,  Se-Hyuk Im

IPC分类号： H01L21/76 ,  H01L21/768 ,  H01L21/321 ,  H01L21/67

摘要： A superstrate for planarizing a substrate. The superstrate includes a body having a first side having a contact surface and a second side having a central portion and a peripheral portion surrounding the central portion. The peripheral portion includes a recessed region.

公开(公告)号：US20230013819A1

公开(公告)日：2023-01-19

申请号：US17944844

申请日：2022-09-14

申请人： NISSAN MOTOR CO., LTD. ,  RENAULT s.a.s.

发明人： Toshiharu MARUI ,  Tetsuya HAYASHI ,  Keiichiro NUMAKURA ,  Wei NI ,  Ryota TANAKA ,  Keisuke TAKEMOTO

IPC分类号： H01L29/06 ,  H01L21/04 ,  H01L21/76 ,  H01L21/761 ,  H01L29/16

摘要： A semiconductor device includes a semiconductor base body, and a first main electrode and a second main electrode provided on the semiconductor base body. The semiconductor base body includes a drift region of a first conductivity type through which a main current flows, a column region of a second conductivity type arranged adjacent to the drift region in parallel to a current passage of the main current, a second electrode-connection region of the first conductivity type electrically connected to the second main electrode, and a low-density electric-field relaxation region of the first conductivity type having a lower impurity concentration than the drift region and arranged between the second electrode-connection region and the column region.

公开(公告)号：US11538936B2

公开(公告)日：2022-12-27

申请号：US17188315

申请日：2021-03-01

申请人： ROHM CO., LTD.

发明人： Yusuke Shimizu

IPC分类号： H01L21/76 ,  H01L29/08 ,  H01L29/10 ,  H01L29/78

摘要： A semiconductor device includes: an n−-type epitaxial layer having an element main surface; a p−-type body region, an n+-type source region, and n+-type drain regions; and a gate electrode including a second opening and first openings formed in a portion separated from the second opening toward the drain regions, wherein the body region selectively has a second portion exposed to the first openings of the gate electrode, and wherein the semiconductor device further includes a p+-type body contact region formed in the portion of the body region exposed to the first openings and having an impurity concentration higher than an impurity concentration of the body region.

公开(公告)号：US11482495B2

公开(公告)日：2022-10-25

申请号：US16681952

申请日：2019-11-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

发明人： Pin-Wen Chen ,  Mei-Hui Fu ,  Hong-Mao Lee ,  Wei-Jung Lin ,  Chih-Wei Chang

IPC分类号： H01L21/76 ,  H01L23/535 ,  H01L23/528 ,  H01L23/532 ,  H01L21/768

摘要： A method for fabricating a semiconductor arrangement includes removing a portion of a first dielectric layer to form a first recess defined by sidewalls of the first dielectric layer, forming a first conductive layer in the first recess, removing a portion of the first conductive layer to form a second recess defined by the sidewalls of the first dielectric layer, forming a second conductive layer in the second recess, where the second conductive layer contacts the first conductive layer, forming a second dielectric layer over the second conductive layer, removing a portion of the second dielectric layer to form a third recess defined by sidewalls of the second dielectric layer, where the second conductive layer is exposed through the third recess, and forming a third conductive layer in the third recess, where the third conductive layer contacts the second conductive layer.

公开(公告)号：US20220310803A1

公开(公告)日：2022-09-29

申请号：US17653719

申请日：2022-03-07

申请人： SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.

发明人： Tadashi WATANABE ,  Yukinori NOSE

IPC分类号： H01L29/40 ,  H01L29/20 ,  H01L29/778 ,  H01L21/02 ,  H01L21/76 ,  H01L21/765 ,  H01L29/66

摘要： A semiconductor device includes a substrate, a nitride semiconductor layer formed on the substrate, a source electrode and a drain electrode formed in the nitride semiconductor layer. The source electrode and drain electrode are arranged side by side in a first direction. A gate electrode is formed on the nitride semiconductor layer between the source electrode and the drain electrode. A first protective film is formed on the nitride semiconductor layer, and covers the first protective film covering the source electrode, the drain electrode, and the gate electrode. A source field plate is formed on the first protective film between the gate electrode and the drain electrode in a plan view. A dielectric-breakdown inhibition portion includes a part positioned between an end of the source field plate and an end of the drain electrode in a sectional view, and inhibits dielectric breakdown of the first protective film.