公开(公告)号：US20240363763A1

公开(公告)日：2024-10-31

申请号：US18771108

申请日：2024-07-12

申请人： Micron Technology, Inc.

发明人： Kamal M. Karda ,  Durai Vishak Nirmal Ramaswamy ,  Haitao Liu

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/78696 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/823412 ,  H01L29/66666 ,  H01L29/66969 ,  H01L29/7827 ,  H01L29/78642 ,  H01L29/7869

摘要： A device comprises a vertical transistor and a shielding material comprising a conductive material having a P+ type conductivity. The vertical transistor includes an electrode, a dielectric material adjacent to the electrode, and a channel region adjacent to the dielectric material. The channel region comprises a composite structure including at least two semiconductor materials. Also disclosed is a device comprising a first electrically conductive line, vertical transistors overlying the first conductive line, a second electrically conductive line overlying the vertical transistors, and a shielding material positioned between the two adjacent vertical transistors. Each of the vertical transistors comprises a gate electrode, a gate dielectric material on opposite sides of the gate electrode, and a channel region comprising a composite structure including at least two oxide semiconductor materials. The gate dielectric material positions between the gate electrode and the channel region. The shielding material comprises an electrically conductive material.

公开(公告)号：US20240363736A1

公开(公告)日：2024-10-31

申请号：US18770792

申请日：2024-07-12

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Su-Hao Liu ,  Huicheng Chang ,  Chien-Tai Chan ,  Liang-Yin Chen ,  Yee-Chia Yeo ,  Szu-Ying Chen

IPC分类号： H01L29/66 ,  H01L21/8234 ,  H01L29/78

CPC分类号： H01L29/66818 ,  H01L21/823431 ,  H01L29/785

摘要： The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first fin structure with a first height and a first width formed over the substrate, a second fin structure with a second height and a second width formed over the substrate, and an insulating stack formed over lower portions of the first and second fin structures. The second height can be substantially equal to the first height and the second width can be greater than the first width. A top surface of the insulating stack can be below top surfaces of the first and second fin structures.

公开(公告)号：US20240363707A1

公开(公告)日：2024-10-31

申请号：US18769182

申请日：2024-07-10

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shih-Wen HUANG ,  Chung-Ting KO ,  Hong-Hsien KE ,  Chia-Hui LIN ,  Tai-Chun HUANG

IPC分类号： H01L29/417 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3115 ,  H01L21/768 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/45 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/41791 ,  H01L21/02063 ,  H01L21/0217 ,  H01L21/02321 ,  H01L21/0234 ,  H01L21/02343 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/3115 ,  H01L21/76802 ,  H01L21/76831 ,  H01L21/76877 ,  H01L21/823431 ,  H01L21/823475 ,  H01L29/0847 ,  H01L29/41766 ,  H01L29/45 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7848

摘要： A semiconductor device is provided. The semiconductor device includes a source/drain structure, a contact structure, a glue layer, a barrier layer, and a silicide layer. The contact structure is over the source/drain structure. The glue layer surrounds the contact structure. The barrier layer is formed on at least a portion of a sidewall surface of the contact structure. The silicide layer is between the source/drain structure and the contact structure, and the silicide layer is in direct contact with the glue layer. The bottom surface of the glue layer is lower than the top surface of the source/drain structure and the bottom surface of the barrier layer.

公开(公告)号：US20240363684A1

公开(公告)日：2024-10-31

申请号：US18308912

申请日：2023-04-28

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun-Yuan CHEN ,  Lo-Heng CHANG ,  Huan-Chieh SU ,  Chih-Hao WANG ,  Szu-Chien WU

IPC分类号： H01L29/06 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC分类号： H01L29/0673 ,  H01L21/823412 ,  H01L21/823418 ,  H01L27/088 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775 ,  H01L29/78696

摘要： A method for manufacturing a semiconductor structure includes forming first and second fins over a substrate. The fin includes first and second semiconductor layers alternating stacked. The method further includes forming a dummy gate structure over the first and second fins, forming first source/drain features on opposite sides of the dummy gate structures and over the first fin, forming second source/drain features on opposite sides of the dummy gate structures and over the second fin, forming a dielectric layer over and between the first and second source/drain features, replacing the dummy gate structure and the first semiconductor layers with a gate structure wrapping around the first semiconductor layers, forming first silicide features over the first source/drain features, and forming second silicide features over the second source/drain features.

公开(公告)号：US20240363553A1

公开(公告)日：2024-10-31

申请号：US18308003

申请日：2023-04-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chun Yu CHEN ,  Yen Lian LAI

IPC分类号： H01L23/58 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

CPC分类号： H01L23/585 ,  H01L21/823437 ,  H01L21/823475 ,  H01L27/088 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/78696

摘要： The present disclosure provides a semiconductor structure that includes a substrate having a circuit region and a seal ring region around the circuit region, first active regions of a first width disposed in the circuit region, second active regions of a second width disposed in the seal ring region, first gate structures disposed on the first active regions, and second gate structures disposed on longitudinal edges of the second active regions. The first gate structures are longitudinally oriented to be orthogonal with the first active regions. The second gate structures are longitudinally oriented to be in parallel with the second active regions. The second width is greater than the first width.

公开(公告)号：US20240363444A1

公开(公告)日：2024-10-31

申请号：US18770299

申请日：2024-07-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Kuo-Cheng CHIANG ,  Chih-Hao WANG ,  Ching-Wei TSAI ,  Kuan-Lun CHENG

IPC分类号： H01L21/84 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L27/12

CPC分类号： H01L21/845 ,  H01L21/823412 ,  H01L21/823431 ,  H01L27/0623 ,  H01L27/0886 ,  H01L27/1207 ,  H01L27/1211

摘要： The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor device with fin structures having different top surface crystal orientations and/or different materials. The present disclosure provides a semiconductor structure including n-type FinFET devices and p-type FinFET devices with different top surface crystal orientations and with fin structures having different materials. The present disclosure provides a method to fabricate a semiconductor structure including n-type FinFET devices and p-type FinFET devices with different top surface crystal orientations and different materials to achieve optimized electron transport and hole transport. The present disclosure also provides a diode structure and a bipolar junction transistor structure that includes SiGe in the fin structures.

公开(公告)号：US20240363429A1

公开(公告)日：2024-10-31

申请号：US18771662

申请日：2024-07-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yun Lee ,  Chung-Ting Ko ,  Chen-Ming Lee ,  Mei-Yun Wang ,  Fu-Kai Yang

IPC分类号： H01L21/8234 ,  H01L21/285 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/088 ,  H01L29/417 ,  H01L29/66

CPC分类号： H01L21/823475 ,  H01L21/28518 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L23/53209 ,  H01L27/0886 ,  H01L29/66795 ,  H01L21/76805 ,  H01L21/76855 ,  H01L23/5226 ,  H01L23/5283 ,  H01L29/41791

摘要： A semiconductor device includes a fin disposed on a substrate, a first dielectric layer disposed over the fin, a first contact extending through the first dielectric layer to a first depth and electrically coupled to the fin, and a second contact extending through the first dielectric layer to a second depth different than the first depth. The first contact has a first bottom portion having a first cross-sectional shape profile. The second contact being electrically isolated from the fin and having a second bottom portion having a second cross-sectional shape profile different than the first cross-sectional shape profile. The semiconductor device also includes a first protective layer disposed along the first contact without being disposed on at least a portion of the first bottom portion of the first contact, and a second protective layer disposed along the second contact including along the second bottom portion of the second contact.

公开(公告)号：US20240363423A1

公开(公告)日：2024-10-31

申请号：US18767533

申请日：2024-07-09

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wan-Yao WU ,  Chang-Yun Chang ,  Ming-Chang Wen

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L29/40

CPC分类号： H01L21/823437 ,  H01L21/823431 ,  H01L21/823468 ,  H01L27/0886 ,  H01L29/401

摘要： The present disclosure describes a method of fabricating a semiconductor structure that includes forming a gate structure over a substrate, forming an interlayer dielectric structure surrounding the gate structures, and forming a first opening in the gate structure and the interlayer dielectric structure. The first opening has a first portion in the gate structure and a second portion in the interlayer dielectric structure, in which the first portion has a width larger than the second portion. The method further includes depositing a dielectric layer in the first opening and forming a second opening over the first opening. The first portion of the opening remains open and the second portion of the opening is filled after depositing the dielectric layer. The second opening in the gate structure has a depth larger than the first opening in the gate structure.

公开(公告)号：US12132115B2

公开(公告)日：2024-10-29

申请号：US17870426

申请日：2022-07-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shi-Ning Ju ,  Kuo-Cheng Chiang ,  Guan-Lin Chen ,  Chih-Hao Wang

IPC分类号： H01L29/786 ,  H01L21/3105 ,  H01L21/3115 ,  H01L21/8234

CPC分类号： H01L29/78618 ,  H01L21/31055 ,  H01L21/31155 ,  H01L21/823418

摘要： A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes multiple semiconductor nanostructures over a substrate and two epitaxial structures over the substrate. Each of the semiconductor nanostructures is between the epitaxial structures, and the epitaxial structures are p-type doped. The semiconductor device structure also includes a gate stack wrapping around the semiconductor nanostructures. The semiconductor device structure further includes a dielectric stressor structure between the gate stack and the substrate. The epitaxial structures extend exceeding a top surface of the dielectric stressor structure.

公开(公告)号：US12132111B2

公开(公告)日：2024-10-29

申请号：US16936921

申请日：2020-07-23

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Ya-Wen Yang ,  Tsung-Yu Chiang

IPC分类号： H01L29/78 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/49 ,  H01L29/66

CPC分类号： H01L29/785 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/4916 ,  H01L29/66795

摘要： A method for forming a semiconductor device structure is provided. The method includes forming a first gate stack and a second gate stack over a semiconductor substrate and forming a dielectric layer over the semiconductor substrate to surround the first gate stack and the second gate stack. The method also includes forming a protection element to cover the second gate stack. The method further includes replacing the first gate stack with a metal gate stack after the formation of the protection element.