公开(公告)号：US20230056901A1

公开(公告)日：2023-02-23

申请号：US17981744

申请日：2022-11-07

申请人： Northrop Grumman Systems Corporation

发明人： Patrick B. Shea ,  Robert M. Young ,  Keith H. Chung ,  Andris Ezis ,  Ishan Wathuthanthri

IPC分类号： H01L27/24 ,  H01L45/00 ,  H01L21/8249

摘要： A method of integrating a phase change switch (PCS) into a Bipolar (Bi)/Complementary Metal Oxide Semiconductor (CMOS) (BiCMOS) process, comprises providing a base structure including BiCMOS circuitry on a semiconductor substrate, and forming on the base structure a dielectric contact window layer having metal through-plugs that contact the BiCMOS circuitry. The method includes constructing the PCS on the contact window layer. The PCS includes: a phase change region, between ohmic contacts on the phase change region, to operate as a switch controlled by heat. The method further includes forming, on the contact window layer and the PCS, a stack of alternating patterned metal layers and dielectric layers that interconnect the patterned metal layers, such that the stack connects a first of the ohmic contacts to the BiCMOS circuitry and provides connections to a second of the ohmic contacts and to the resistive heater.

公开(公告)号：US20220393653A1

公开(公告)日：2022-12-08

申请号：US17820497

申请日：2022-08-17

申请人： Skyworks Solutions, Inc.

发明人： Peter J. Zampardi, JR. ,  Hongxiao Shao ,  Tin Myint Ko ,  Matthew Thomas Ozalas ,  Hong Shen ,  Mehran Janani ,  Jens Albrecht Riege ,  Hsiang-Chih Sun ,  David Steven Ripley ,  Philip John Lehtola

IPC分类号： H03F3/213 ,  H03F3/19 ,  H03F1/02 ,  H03F3/21 ,  H03F3/195 ,  H01L23/00 ,  H01L21/768 ,  H03F3/24 ,  H01L23/552 ,  H01L29/36 ,  H01L29/66 ,  H01L29/737 ,  H01L29/812 ,  H01L29/08 ,  H01L29/205 ,  H01L21/8252 ,  H01L27/06 ,  H01L23/498 ,  H01L23/50 ,  H03F3/60 ,  H01L23/66 ,  H01L29/20 ,  H01L23/48 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L21/8249 ,  H01L21/66 ,  H01L23/31 ,  H01L23/522

摘要： One aspect of this disclosure is a power amplifier module that includes a power amplifier, a semiconductor resistor, a tantalum nitride terminated through wafer via, and a conductive layer electrically connected to the power amplifier. The semiconductor resistor can include a resistive layer that includes a same material as a layer of a bipolar transistor of the power amplifier. A portion of the conductive layer can be in the tantalum nitride terminated through wafer via. The conductive layer and the power amplifier can be on opposing sides of a semiconductor substrate. Other embodiments of the module are provided along with related methods and components thereof.

公开(公告)号：US11508628B2

公开(公告)日：2022-11-22

申请号：US17021727

申请日：2020-09-15

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Cheng-Hung Wang ,  Tsung-Lin Lee ,  Wen-Chih Chiang ,  Kuan-Jung Chen

IPC分类号： H01L21/8249 ,  H01L27/06 ,  H01L21/02 ,  H01L21/3065

摘要： Disclosed is a method for forming a crystalline protective polysilicon layer which does not create defective voids during subsequent processes so as to provide effective protection to devices underneath. In one embodiment, a method for forming a semiconductor device, includes: depositing a protective coating on a first polysilicon layer; forming an epitaxial layer on the protective coating; and depositing a second polysilicon layer over the epitaxial layer, wherein the protective coating comprises a third polysilicon layer, wherein the third polysilicon layer is deposited at a first temperature in a range of 600-700 degree Celsius, and wherein the third polysilicon layer in the protect coating is configured to protect the first polysilicon layer when the second polysilicon layer is etched.

公开(公告)号：US20220352028A1

公开(公告)日：2022-11-03

申请号：US17729191

申请日：2022-04-26

申请人： STMicroelectronics S.r.l. ,  STMicroelectronics (Crolles 2) SAS

发明人： Pierpaolo MONGE ROFFARELLO ,  Isabella MICA ,  Didier DUTARTRE ,  Alexandra ABBADIE

IPC分类号： H01L21/8249 ,  H01L27/06 ,  H01L21/02 ,  H01L21/324 ,  H01L21/763

摘要： A substrate made of doped single-crystal silicon has an upper surface. A doped single-crystal silicon layer is formed by epitaxy on top of and in contact with the upper surface of the substrate. Either before or after forming the doped single-crystal silicon layer, and before any other thermal treatment step at a temperature in the range from 600° C. to 900° C., a denuding thermal treatment is applied to the substrate for several hours. This denuding thermal treatment is at a temperature higher than or equal to 1,000° C.

公开(公告)号：US11417756B2

公开(公告)日：2022-08-16

申请号：US17175758

申请日：2021-02-15

申请人： STMicroelectronics (Crolles 2) SAS

发明人： Edoardo Brezza ,  Alexis Gauthier ,  Fabien Deprat ,  Pascal Chevalier

IPC分类号： H01L29/737 ,  H01L21/8249 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66

摘要： A method of making a bipolar transistor includes forming a stack of a first, second, third and fourth insulating layers on a substrate. An opening is formed in the stack to reach the substrate. An epitaxial process forms the collector of the transistor on the substrate and selectively etches an annular opening in the third layer. The intrinsic part of the base is then formed by epitaxy on the collector, with the intrinsic part being separated from the third layer by the annular opening. The junction between the collector and the intrinsic part of the base is surrounded by the second layer. The emitter is formed on the intrinsic part and the third layer is removed. A selective deposition of a semiconductor layer on the second layer and in direct contact with the intrinsic part forms the extrinsic part of the base.

公开(公告)号：US20220254686A1

公开(公告)日：2022-08-11

申请号：US17728088

申请日：2022-04-25

申请人： STMicroelectronics (Crolles 2) SAS

发明人： Gregory AVENIER ,  Alexis GAUTHIER ,  Pascal CHEVALIER

IPC分类号： H01L21/8222 ,  H01L27/06 ,  H01L29/66 ,  H01L29/737 ,  H01L29/93 ,  H01L21/3105 ,  H01L21/8249

摘要： A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.

公开(公告)号：US11276680B2

公开(公告)日：2022-03-15

申请号：US14920374

申请日：2015-10-22

申请人： Infineon Technologies Austria AG

发明人： Daniel Pedone ,  Hans-Joachim Schulze ,  Rolf Gerlach ,  Christian Kasztelan ,  Anton Mauder ,  Hubert Rothleitner ,  Wolfgang Scholz ,  Philipp Seng ,  Peter Tuerkes

IPC分类号： H01L27/02 ,  H01L27/06 ,  H01L29/739 ,  H01L29/866 ,  H01L21/8249

摘要： A temperature protected power semiconductor device has a substrate which includes a power field effect transistor (FET) and a thermosensitive element. The power FET has a gate electrode connected to a gate, a drift region, and first and second terminals for a load current. The load current is controllable during operation by a voltage applied between the gate and the first terminal. The thermosensitive element has a first contact connected to one of the gate electrode and first terminal of the power FET, and a second contact connected to the other one of the gate electrode and first terminal. The thermosensitive element is located close to the power FET and thermally coupled thereto. The thermosensitive element is configured to cause the power FET to reduce the load current in case of an exceedance of a limit temperature of the power FET, by interconnecting the gate and first terminal.

公开(公告)号：US20220068914A1

公开(公告)日：2022-03-03

申请号：US17465246

申请日：2021-09-02

申请人： Newport Fab, LLC dba Jazz Semiconductor

发明人： Mantavya Sinha ,  Edward Preisler ,  David J. Howard

IPC分类号： H01L27/06 ,  H01L29/732 ,  H01L29/45 ,  H01L21/324 ,  H01L21/8249

摘要： A bipolar complementary-metal-oxide-semiconductor (BiCMOS) device includes a MOS transistor including CMOS nickel silicided regions in a CMOS region, and a bipolar transistor in a bipolar region. The bipolar transistor includes a nickel silicided emitter, a collector, and a base including an intrinsic base, a link base, and a nickel silicided extrinsic base. The intrinsic base is situated between the nickel silicided emitter and the collector. A dielectric spacer separates the link base from the nickel silicided emitter. The nickel silicided extrinsic base provides an electrical connection to the link base and the intrinsic base. A nickel silicided collector sinker provides an electrical connection to the collector. The CMOS nickel silicided regions, nickel silicided emitter, nickel silicided extrinsic base, and nickel silicided collector sinker can include an additive of molybdenum (Mo) and/or platinum (Pt). A low temperature rapid thermal anneal can be performed so as to prevent deactivation of dopants.

公开(公告)号：US11043431B2

公开(公告)日：2021-06-22

申请号：US16390690

申请日：2019-04-22

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chi-Feng Huang ,  Chia-Chung Chen ,  Victor Chiang Liang ,  Mingo Liu

IPC分类号： H01L27/098 ,  H01L29/36 ,  H01L21/8249 ,  H01L27/06 ,  H01L27/085 ,  H01L29/732 ,  H01L29/808 ,  H01L29/861 ,  H01L29/93 ,  H01L27/07 ,  H01L29/06

摘要： A method includes forming a deep well region of a first conductivity type in a substrate, implanting a portion of the deep well region to form a first gate, and implanting the deep well region to form a well region. The well region and the first gate are of a second conductivity type opposite the first conductivity type. An implantation is performed to form a channel region of the first conductivity type over the first gate. A portion of the deep well region overlying the channel region is implanted to form a second gate of the second conductivity type. A source/drain implantation is performed to form a source region and a drain region of the first conductivity type on opposite sides of the second gate. The source and drain regions are connected to the channel region, and overlap the channel region and the first gate.

公开(公告)号：US10991631B2

公开(公告)日：2021-04-27

申请号：US16026006

申请日：2018-07-02

申请人： Newport Fab, LLC

发明人： Edward J. Preisler ,  Paul D. Hurwitz ,  Marco Racanelli ,  David J. Howard

IPC分类号： H01L27/06 ,  H01L27/12 ,  H01L29/737 ,  H01L21/84 ,  H01L21/8249 ,  H01L29/66 ,  H01L29/165 ,  H01L29/10 ,  H01L29/06

摘要： A silicon-on-insulator (SOI) CMOS transistor and a SOI heterojunction bipolar transistor (HBT) are fabricated on the same semiconductor substrate. First and second SOI regions are formed over the semiconductor substrate. A SOI CMOS transistor is fabricated in the first SOI region, and a collector region of the SOI HBT is fabricated in the second SOI region. The collector region can be formed by performing a first implant to a local collector region in the second SOI region, and performing a second implant to an extrinsic collector region in the second SOI region, wherein the extrinsic collector region is separated from the local collector region. A SiGe base is formed over the collector region, wherein a dielectric structure separates portions of the SiGe region and the extrinsic collector region. The SOI CMOS transistor and SOI HBT may be used to implement a front end module of an RF system.