-
公开(公告)号:US12125892B2
公开(公告)日:2024-10-22
申请号:US17680749
申请日:2022-02-25
CPC分类号: H01L29/513 , H01L21/28088 , H01L21/28185 , H01L29/1054 , H01L29/161 , H01L29/4966 , H01L29/517 , H01L29/66795 , H01L29/7851
摘要: A device includes a semiconductor region, an interfacial layer over the semiconductor region, the interfacial layer including a semiconductor oxide, a high-k dielectric layer over the interfacial layer, and an intermixing layer over the high-k dielectric layer. The intermixing layer includes oxygen, a metal in the high-k dielectric layer, and an additional metal. A work-function layer is over the intermixing layer. A filling-metal region is over the work-function layer.
-
公开(公告)号:US20240332392A1
公开(公告)日:2024-10-03
申请号:US18737616
申请日:2024-06-07
申请人: Intel Corporation
发明人: Dan S. LAVRIC , Glenn A. GLASS , Thomas T. TROEGER , Suresh VISHWANATH , Jitendra Kumar JHA , John F. RICHARDS , Anand S. MURTHY , Srijit MUKHERJEE
IPC分类号: H01L29/45 , H01L21/28 , H01L21/285 , H01L29/08 , H01L29/161 , H01L29/49 , H01L29/66 , H01L29/78
CPC分类号: H01L29/45 , H01L21/28088 , H01L21/28518 , H01L29/0847 , H01L29/161 , H01L29/4966 , H01L29/66795 , H01L29/7851
摘要: Approaches for fabricating an integrated circuit structure including a titanium silicide material, and the resulting structures, are described. In an example, an integrated circuit structure includes a semiconductor fin above a substrate, a gate electrode over the top and adjacent to the sidewalls of a portion of the semiconductor fin. A titanium silicide material is in direct contact with each of first and second epitaxial semiconductor source or drain structures at first and second sides of the gate electrode. The titanium silicide material is conformal with and hermetically sealing a non-flat topography of each of the first and second epitaxial semiconductor source or drain structures. The titanium silicide material has a total atomic composition including 95% or greater stoichiometric TiSi2.
-
公开(公告)号:US12094761B2
公开(公告)日:2024-09-17
申请号:US18342855
申请日:2023-06-28
发明人: Yen-Ru Lee , Chii-Horng Li , Chien-I Kuo , Li-Li Su , Chien-Chang Su , Heng-Wen Ting , Jung-Chi Tai , Che-Hui Lee , Ying-Wei Li
IPC分类号: H01L21/82 , H01L21/764 , H01L29/06 , H01L29/08 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/24 , H01L29/66 , H01L29/78
CPC分类号: H01L21/764 , H01L29/0653 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/24 , H01L29/66795 , H01L29/7848 , H01L29/7851 , H01L29/7853
摘要: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
-
公开(公告)号:US12074129B2
公开(公告)日:2024-08-27
申请号:US18300157
申请日:2023-04-13
申请人: ROHM CO., LTD.
发明人: Takukazu Otsuka
IPC分类号: H01L23/00 , H01L23/373 , H01L23/495 , H01L25/07 , H01L29/12 , H01L29/161 , H01L29/41 , H01L29/417 , H01L29/739 , H01L29/78
CPC分类号: H01L24/08 , H01L23/3735 , H01L23/4952 , H01L23/49524 , H01L24/03 , H01L24/48 , H01L24/85 , H01L25/072 , H01L29/12 , H01L29/161 , H01L29/41 , H01L29/417 , H01L29/739 , H01L29/78 , H01L24/45 , H01L2224/08501 , H01L2224/40 , H01L2224/45124 , H01L2224/45147 , H01L2224/45565 , H01L2224/45624 , H01L2224/48091 , H01L2224/48624 , H01L2224/48647 , H01L2224/85205 , H01L2924/13055 , H01L2224/48091 , H01L2924/00014 , H01L2924/13055 , H01L2924/00 , H01L2224/45565 , H01L2224/45147 , H01L2224/45624 , H01L2224/45624 , H01L2924/00014 , H01L2224/45147 , H01L2924/00014 , H01L2224/85205 , H01L2924/00014 , H01L2224/45124 , H01L2924/00014
摘要: A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.
-
公开(公告)号:US20240274694A1
公开(公告)日:2024-08-15
申请号:US18635347
申请日:2024-04-15
IPC分类号: H01L29/66 , H01L21/762 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/161 , H01L29/165 , H01L29/78
CPC分类号: H01L29/6681 , H01L21/76229 , H01L21/823431 , H01L21/823437 , H01L21/823481 , H01L21/823821 , H01L27/0886 , H01L27/0924 , H01L29/161 , H01L29/66545 , H01L29/6656 , H01L29/165 , H01L29/7848 , H01L2029/7858
摘要: The present disclosure provides a semiconductor structure. The semiconductor structure includes device fins formed on a substrate; fill fins formed on the substrate and disposed among the device fins; and gate stacks formed on the device fins and the fill fins. The fill fins include a first dielectric material layer and a second dielectric material layer deposited on the first dielectric material layer. The first and second dielectric material layers are different from each other in composition.
-
公开(公告)号:US12062661B2
公开(公告)日:2024-08-13
申请号:US17831861
申请日:2022-06-03
发明人: Jongho Park , Jaeyeol Song , Wandon Kim , Byounghoon Lee , Musarrat Hasan
IPC分类号: H01L27/092 , H01L21/8238 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/161 , H01L29/417 , H01L29/423 , H01L29/49 , H01L29/51 , H01L29/66 , H01L29/78 , H01L29/786
CPC分类号: H01L27/0922 , H01L21/823807 , H01L21/823814 , H01L21/823821 , H01L21/823842 , H01L21/823857 , H01L21/823871 , H01L27/0924 , H01L29/0653 , H01L29/0673 , H01L29/0847 , H01L29/1054 , H01L29/161 , H01L29/41791 , H01L29/42392 , H01L29/4908 , H01L29/4966 , H01L29/516 , H01L29/517 , H01L29/66545 , H01L29/7848 , H01L29/78696
摘要: A semiconductor device includes first and second active patterns on first and second active regions of a substrate, respectively, a pair of first source/drain patterns and a first channel pattern therebetween which are in an upper portion of the first active pattern, a pair of second source/drain patterns and a second channel pattern therebetween which are in an upper portion of the second active pattern, and first and second gate electrodes intersecting the first and second channel patterns, respectively. Each of the first and second gate electrodes includes a first metal pattern adjacent to a corresponding one of the first and second channel patterns. The first and second channel patterns include SiGe. A Ge concentration of the second channel pattern is higher than a Ge concentration of the first channel pattern. A thickness of the first metal pattern of the second gate electrode is greater than a thickness of the first metal pattern of the first gate electrode.
-
公开(公告)号:US12040237B2
公开(公告)日:2024-07-16
申请号:US17752080
申请日:2022-05-24
发明人: Ming-Heng Tsai , Chun-Sheng Liang , Pei-Lin Wu , Yi-Ren Chen , Shih-Hsun Chang
IPC分类号: H01L29/78 , H01L21/8234 , H01L21/8238 , H01L29/08 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/24 , H01L29/267 , H01L29/423 , H01L29/49
CPC分类号: H01L21/823814 , H01L21/823418 , H01L21/823425 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/24 , H01L29/267 , H01L29/42368 , H01L29/4966 , H01L29/7848 , H01L29/785 , H01L21/823431 , H01L21/823481
摘要: A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a gate stack over the substrate. The semiconductor device structure includes a spacer over a side of the gate stack. The semiconductor device structure includes a dielectric layer over the substrate. The dielectric layer has a first recess, the dielectric layer has an upper portion and a first lower portion, the upper portion is over the first recess, the first recess is between the first lower portion and the spacer, and the upper portion has a convex curved sidewall.
-
公开(公告)号:US12027592B2
公开(公告)日:2024-07-02
申请号:US17850310
申请日:2022-06-27
IPC分类号: H01L29/167 , H01L21/02 , H01L29/08 , H01L29/10 , H01L29/66 , H01L29/78 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/417
CPC分类号: H01L29/167 , H01L21/02381 , H01L29/0847 , H01L29/1054 , H01L29/66795 , H01L29/66803 , H01L29/785 , H01L21/0245 , H01L21/02532 , H01L21/02576 , H01L21/0262 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/41783
摘要: A field effect transistor includes a channel made of germanium and a source/drain portion. The source/drain portion includes a germanium layer, an interfacial epitaxial layer over the germanium layer, a semiconductor layer over the interfacial epitaxial layer, and a conducting layer over the semiconductor layer. The interfacial epitaxial layer contains germanium and an element from the semiconductor layer and has a thickness in a range from about 1 nm to about 3 nm.
-
公开(公告)号:US20240204050A1
公开(公告)日:2024-06-20
申请号:US18588586
申请日:2024-02-27
发明人: Jongki JUNG , Myungil KANG , Yoonhae KIM , Kwanheum LEE
IPC分类号: H01L29/08 , H01L21/8234 , H01L27/088 , H01L29/06 , H01L29/16 , H01L29/161 , H01L29/165 , H01L29/66 , H01L29/78
CPC分类号: H01L29/0847 , H01L21/823418 , H01L21/823431 , H01L27/0886 , H01L29/0653 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/6653 , H01L29/66545 , H01L29/7848 , H01L29/7851
摘要: A semiconductor device includes a substrate, a first active fin on the substrate, the first active fin including a first side surface and a second side surface opposing the first side surface, a second active fin on the substrate, the second active fin including a third side surface facing the second side surface and a fourth side surface opposing the third side surface of the second active fin, a first isolation layer on the first side surface of the first active fin, a second isolation layer between the second side surface of the first active fin and the third side surface of the second active fin, a third isolation layer on the fourth side surface of the second active fin and a merged source/drain on the first and second active fins.
-
10.
公开(公告)号:US11996151B2
公开(公告)日:2024-05-28
申请号:US17315727
申请日:2021-05-10
IPC分类号: H10B41/27 , G11C16/04 , H01L29/161 , H10B41/10 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
CPC分类号: G11C16/0483 , H01L29/161 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
摘要: A memory array comprising laterally-spaced memory blocks individually comprises a vertical stack comprising alternating insulative tiers and conductive tiers. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. The laterally-spaced memory blocks in a lower one of the conductive tiers comprises elemental-form metal that extends longitudinally-along the laterally-spaced memory blocks proximate laterally-outer sides of the laterally-spaced memory blocks. A metal silicide or a metal-germanium compound is directly against laterally-inner sides of the elemental-form metal in the lower conductive tier and that extends longitudinally-along the laterally-spaced memory blocks in the lower conductive tier. The metal of the metal silicide or of the metal-germanium compound is the same as that of the elemental-form metal. Other embodiments, including method, are disclosed.
-
-
-
-
-
-
-
-
-