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公开(公告)号:US20240355910A1
公开(公告)日:2024-10-24
申请号:US18760829
申请日:2024-07-01
发明人: Yi-Jing Lee , Ming-Hua Yu
IPC分类号: H01L29/66 , H01L21/02 , H01L21/28 , H01L21/306 , H01L21/3065 , H01L29/06 , H01L29/08 , H01L29/167 , H01L29/36 , H01L29/49 , H01L29/78
CPC分类号: H01L29/66795 , H01L21/02532 , H01L21/02579 , H01L21/0262 , H01L29/0649 , H01L29/0847 , H01L29/167 , H01L29/36 , H01L29/66545 , H01L29/6656 , H01L29/66636 , H01L29/7851 , H01L21/28088 , H01L21/30604 , H01L21/3065 , H01L29/4966
摘要: A method includes recessing a semiconductor fin to form a recess, wherein the semiconductor fin protrudes higher than isolation regions on opposite sides of the semiconductor fin, and performing a first epitaxy to grow a first epitaxy layer extending into the recess. The first epitaxy is performed using a first process gas comprising a silicon-containing gas, silane, and a phosphorous-containing gas. The first epitaxy layer has a first phosphorous atomic percentage. The method further includes performing a second epitaxy to grow a second epitaxy layer extending into the recess and over the first epitaxy layer. The second epitaxy is performed using a second process gas comprising the silicon-containing gas, silane, and the phosphorous-containing gas. The second epitaxy layer has a second phosphorous atomic percentage higher than the first phosphorous atomic percentage.
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公开(公告)号:US20240347605A1
公开(公告)日:2024-10-17
申请号:US18299188
申请日:2023-04-12
发明人: Takashi Shiga , Hiromi Endoh , Tatsuya Tominari
IPC分类号: H01L29/36 , H01L21/265
CPC分类号: H01L29/36 , H01L21/26513 , H01L27/082 , H01L27/0928 , H01L29/7816 , H01L29/808
摘要: The present disclosure generally relates to reducing auto-doping in a semiconductor structure. In an example, semiconductor device structure includes a semiconductor substrate, a first epitaxial layer, and a second epitaxial layer. The semiconductor substrate has a first region and a second region. The first region includes a doped layer doped with a first dopant in the semiconductor substrate. The first epitaxial layer is on the doped layer in the first region. The second epitaxial layer is on the first epitaxial layer in the first region and on the semiconductor substrate in the second region.
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公开(公告)号:US12107173B2
公开(公告)日:2024-10-01
申请号:US18322249
申请日:2023-05-23
发明人: Andrei Konstantinov
IPC分类号: H01L29/872 , H01L21/04 , H01L21/761 , H01L29/04 , H01L29/06 , H01L29/16 , H01L29/36 , H01L29/66
CPC分类号: H01L29/872 , H01L21/046 , H01L21/0465 , H01L21/047 , H01L21/761 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/1608 , H01L29/36 , H01L29/6606 , H01L29/045
摘要: A SiC Schottky rectifier with surge current ruggedness is described. The Schottky rectifier includes one or more multi-layer bodies that provide multiple types of surge current protection.
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公开(公告)号:US20240321868A1
公开(公告)日:2024-09-26
申请号:US18736039
申请日:2024-06-06
发明人: Adolf SCHONER , Nicolas THIERRY-JEBALI , Christian VIEIDER , Sergey RESHANOV , Hossein ELAHIPANAH , Wlodzimierz KAPLAN
IPC分类号: H01L27/06 , H01L21/82 , H01L29/06 , H01L29/10 , H01L29/16 , H01L29/36 , H01L29/417 , H01L29/66 , H01L29/78
CPC分类号: H01L27/0605 , H01L21/8213 , H01L27/0629 , H01L29/0615 , H01L29/0623 , H01L29/1095 , H01L29/1608 , H01L29/36 , H01L29/41741 , H01L29/66068 , H01L29/7806 , H01L29/7811 , H01L29/7813
摘要: A modular concept for Silicon Carbide power devices is disclosed where a low voltage module (LVM) is designed separately from a high voltage module (HVM). The LVM having a repeating structure in at least a first direction, the repeating structure repeats with a regular distance in at least the first direction, the HVM comprising a buried grid (4) with a repeating structure in at least a second direction, the repeating structure repeats with a regular distance in at least the second direction, along any possible defined direction. Advantages include faster easier design and manufacture at a lower cost.
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公开(公告)号:US12087827B2
公开(公告)日:2024-09-10
申请号:US17581973
申请日:2022-01-23
发明人: Motoyoshi Kubouchi
IPC分类号: H01L21/32 , H01L21/324 , H01L29/10 , H01L29/36 , H01L29/739
CPC分类号: H01L29/36 , H01L21/324 , H01L29/1095 , H01L29/7393
摘要: Provided is a semiconductor device including: a semiconductor substrate having upper and lower surfaces and throughout which a first-conductivity-type bulk donor is distributed; a first-conductivity-type high concentration region including a center position in a depth direction of the substrate and having a donor concentration higher than a doping concentration of the donors; and an upper surface side oxygen reduction region provided in contact with the upper surface inside the substrate and in which an oxygen chemical concentration decreases as approaching the upper surface. The oxygen chemical concentration distribution may have a maximum value region where the oxygen chemical concentration is 50% or more of the maximum value, a first peak of an impurity chemical concentration may be arranged in an end of the high concentration region in the depth direction, and the peak may be arranged on the upper surface side with respect to or in the maximum value region.
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公开(公告)号:US20240290881A1
公开(公告)日:2024-08-29
申请号:US18638883
申请日:2024-04-18
发明人: Yasuhiro OKAMOTO , Nobuo MACHIDA , Koichi ARAI , Kenichi HISADA , Yasunori YAMASHITA , Satoshi EGUCHI , Hironobu MIYAMOTO , Atsushi SAKAI , Katsumi EIKYU
IPC分类号: H01L29/78 , H01L21/02 , H01L21/027 , H01L21/04 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/16 , H01L29/36 , H01L29/423 , H01L29/45 , H01L29/49 , H01L29/66
CPC分类号: H01L29/7813 , H01L21/02378 , H01L21/02529 , H01L21/02634 , H01L21/0465 , H01L21/0475 , H01L21/049 , H01L29/0865 , H01L29/0882 , H01L29/1095 , H01L29/1608 , H01L29/36 , H01L29/4236 , H01L29/66068 , H01L21/02164 , H01L21/02271 , H01L21/0274 , H01L29/0696 , H01L29/45 , H01L29/4916
摘要: A drift layer is formed over a semiconductor substrate which is an SiC substrate. The drift layer includes first to third n-type semiconductor layers and a p-type impurity region. Herein, an impurity concentration of the second n-type semiconductor layer is higher than an impurity concentration of the first n-type semiconductor layer and an impurity concentration of the third n-type semiconductor layer. Also, in plan view, the second semiconductor layer located between the p-type impurity regions adjacent to each other overlaps with at least a part of a gate electrode formed in a trench.
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公开(公告)号:US20240284652A1
公开(公告)日:2024-08-22
申请号:US18644874
申请日:2024-04-24
申请人: Intel Corporation
发明人: Peng ZHENG , Varun MISHRA , Tahir GHANI
IPC分类号: H10B10/00 , H01L21/265 , H01L21/306 , H01L21/8238 , H01L27/092 , H01L29/06 , H01L29/08 , H01L29/10 , H01L29/167 , H01L29/36 , H01L29/66
CPC分类号: H10B10/12 , H01L21/26513 , H01L21/30604 , H01L21/823821 , H01L21/823828 , H01L27/0922 , H01L27/0924 , H01L29/0673 , H01L29/0847 , H01L29/1037 , H01L29/167 , H01L29/36 , H01L29/66545
摘要: Embodiments disclosed herein include transistor devices with depopulated channels. In an embodiment, the transistor device comprises a source region, a drain region, and a vertical stack of semiconductor channels between the source region and the drain region. In an embodiment, the vertical stack of semiconductor channels comprises first semiconductor channels, and a second semiconductor channel over the first semiconductor channels. In an embodiment, first concentrations of a dopant in the first semiconductor channels are less than a second concentration of the dopant in the second semiconductor channel.
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公开(公告)号:US20240274713A1
公开(公告)日:2024-08-15
申请号:US18626346
申请日:2024-04-04
发明人: Hyun-Yong YU , Seung Geun JUNG , Mu Yeong SON
IPC分类号: H01L29/78 , H01L21/8234 , H01L29/08 , H01L29/36 , H01L29/423
CPC分类号: H01L29/7827 , H01L21/823437 , H01L29/0847 , H01L29/36 , H01L29/4236
摘要: A semiconductor device and a method of manufacturing the same. The semiconductor device has a substrate in which recess regions are formed and semiconductor regions acting as a source region or a drain region is defined between the recess regions; a gate insulating layer disposed on an inner surface of each recess region; a recess gate disposed on the gate insulating layer in each recess region; an insulating capping layer disposed above the recess gate in each recess region; a metallic insertion layer disposed between a side surface of the recess gate and a side surface of the insulating capping layer and facing with a side surface of the source region or the drain region; and an intermediate insulating layer disposed between the metallic insertion layer and the recess gate to electrically insulate the metallic insertion layer from the recess gate.
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公开(公告)号:US12062720B2
公开(公告)日:2024-08-13
申请号:US18186244
申请日:2023-03-20
发明人: Kun-Mu Li , Hsueh-Chang Sung
IPC分类号: H01L29/78 , H01L21/02 , H01L21/8238 , H01L29/167 , H01L29/36 , H01L29/66
CPC分类号: H01L29/7848 , H01L21/02532 , H01L21/02573 , H01L21/823807 , H01L21/823814 , H01L29/167 , H01L29/36 , H01L29/6681 , H01L29/785
摘要: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a gate stack over an active region and a source/drain region in the active region adjacent the gate stack. The source/drain region includes a first semiconductor layer having a first germanium concentration and a second semiconductor layer over the first semiconductor layer. The second semiconductor layer has a second germanium concentration greater than the first germanium concentration. The source/drain region further includes a third semiconductor layer over the second semiconductor layer and a fourth semiconductor layer over the third semiconductor layer. The third semiconductor layer has a third germanium concentration greater than the second germanium concentration. The fourth semiconductor layer has a fourth germanium concentration less than the third germanium concentration.
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公开(公告)号:US12046641B2
公开(公告)日:2024-07-23
申请号:US16878326
申请日:2020-05-19
申请人: ROHM CO., LTD.
发明人: Katsuhisa Nagao , Hidetoshi Abe
IPC分类号: H01L29/16 , H01L23/535 , H01L23/60 , H01L29/06 , H01L29/36 , H01L29/423 , H01L29/47 , H01L29/51 , H01L29/739 , H01L29/78 , H01L29/872 , H01L23/31
CPC分类号: H01L29/1608 , H01L23/535 , H01L23/60 , H01L29/0615 , H01L29/0619 , H01L29/36 , H01L29/4236 , H01L29/47 , H01L29/51 , H01L29/739 , H01L29/78 , H01L29/7811 , H01L29/872 , H01L23/3171
摘要: According to the present invention, a semiconductor device includes a first conductivity type SiC layer, an electrode that is selectively formed upon the SiC layer, and an insulator that is formed upon the SiC layer and that extends to a timing region that is set at an end part of the SiC layer. The insulator includes an electrode lower insulating film that is arranged below the electrode, and an organic insulating layer that is arranged so as to cover the electrode lower insulating film. The length (A) of the interval wherein the organic insulating layer contacts the SiC layer is 40 μm or more, and the lateral direction distance (B) along the electrode lower insulating layer between the electrode and SiC layer is 40 μm or more.
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