DISTRIBUTED POWER MANAGEMENT APPARATUS
    1.
    发明公开

    公开(公告)号:US20240364268A1

    公开(公告)日:2024-10-31

    申请号:US18766983

    申请日:2024-07-09

    申请人: Qorvo US, Inc.

    发明人: Nadim Khlat

    IPC分类号: H03F1/02 H03F3/195 H03F3/24

    摘要: A distributed power management apparatus is provided. The distributed power management apparatus includes an envelope tracking (ET) integrated circuit (ETIC) and a distributed ETIC separated from the ETIC. The ETIC is configured to generate a number of ET voltages for a number of power amplifier circuits and the distributed ETIC is configured to generate a distributed ET voltage(s) for a distributed power amplifier circuit(s). In a non-limiting example, the number of power amplifier circuits and the distributed power amplifier circuit(s) can be disposed on opposite sides (e.g., top and bottom) of a wireless device. As such, in embodiments disclosed herein, the ETIC is provided closer to the power amplifier circuits and the distributed ETIC is provided closer to the distributed power amplifier circuit(s). By providing the ETIC and the distributed ETIC closer to the respective power amplifier circuits, it is possible to reduce trace inductance and unwanted signal distortion.

    T-match topology with baseband termination

    公开(公告)号:US12132453B2

    公开(公告)日:2024-10-29

    申请号:US17471228

    申请日:2021-09-10

    申请人: NXP USA, Inc.

    IPC分类号: H03F3/195 H03F1/02 H03F1/56

    摘要: Embodiments of RF amplifiers and packaged RF amplifier devices each include an amplification path with a transistor die, and an output-side impedance matching circuit having a T-match circuit topology. The output-side impedance matching circuit includes a first inductive element connected between the transistor output terminal and a quasi RF cold point node, a second inductive element connected between the quasi RF cold point node and an output of the amplification path, and a first capacitance connected between the quasi RF cold point node and a ground reference node. The RF amplifiers and devices also include a baseband termination circuit connected to the quasi RF cold point node, which includes a third inductive element, a resistor, and a second capacitance in series between the quasi RF cold point node and the ground reference node and a third capacitance between a baseband termination circuit node and the ground reference node.

    SUPPLY MODULATING CIRCUIT AND COMMUNICATION CIRCUIT INCLUDING THE SAME

    公开(公告)号:US20240356494A1

    公开(公告)日:2024-10-24

    申请号:US18631746

    申请日:2024-04-10

    IPC分类号: H03F1/02 H03F3/24

    摘要: A communication circuit includes a first supply modulator configured to provide a first supply voltage; a second supply modulator configured to provide a second supply voltage; a switch configured to switch between output terminals of the first and second supply modulators; a first power amplifier configured to receive the first supply voltage and amplify a first input signal; a second power amplifier configured to receive the second supply voltage and amplify a second input signal; a third power amplifier configured to use third power higher than first power of the first power amplifier and second power of the second power amplifier, receive the first and second supply voltages, and amplify a third input signal; and a control circuit configured to control a switching operation of the switch based on an operation mode and activate at least one of the first to third power amplifiers based on the operation mode.

    AMPLIFIER AND METHOD FOR CONTROLLING THE SAME

    公开(公告)号:US20240356491A1

    公开(公告)日:2024-10-24

    申请号:US18629516

    申请日:2024-04-08

    发明人: SHIH-HSIUNG HUANG

    IPC分类号: H03F1/02 H03F3/45

    CPC分类号: H03F1/0205 H03F3/45179

    摘要: The present application discloses an amplifier and a method for controlling the same. The amplifier includes a first P-type transistor, a second P-type transistor, a first N-type transistor and a second N-type transistor. At a first amplification stage, an AC component of a second input signal is amplified by the second P-type transistor into a first amplified signal at an output terminal. The first P-type transistor then amplifies an AC component of a first input signal into a second amplified signal. The second amplified signal is superposed on the first amplified signal at the output terminal.

    Apparatus and method for generating particle wave carrying electric charge

    公开(公告)号:US12125666B2

    公开(公告)日:2024-10-22

    申请号:US17774148

    申请日:2020-12-14

    申请人: Yanbing Liu

    发明人: Yanbing Liu

    IPC分类号: H01J37/147 H01J37/24 H03F1/02

    摘要: A method and an apparatus for generating a particle wave carrying an electric charge is provided. The method comprises: on the basis of waveform information pre-stored in a waveform storage module, generating a corresponding digital waveform signal; the waveform information comprising amplitude and phase; on the basis of a digital-to-analog conversion module connected to the waveform storage module, converting the digital waveform signal having a pre-set phase into an analog waveform signal; on the basis of a power amplification module connected to the digital-to-analog conversion module, performing power amplification on the analog waveform signal; on the basis of a high-voltage generator connected to the power amplification module, performing high-voltage amplification on the power signal of the analog waveform signal; and by means of a quasi-continuous emission electrode connected to the high-voltage generator, emitting a charged particle wave on the basis of the analog waveform voltage signal.

    ELECTRONIC DEVICE INCLUDING CONVERGED POWER AMPLIFIER AND METHOD FOR OPERATING THE SAME

    公开(公告)号:US20240348272A1

    公开(公告)日:2024-10-17

    申请号:US18634249

    申请日:2024-04-12

    IPC分类号: H04B1/04 H03F1/02 H03F3/24

    摘要: According to an embodiment, an electronic device may comprise: memory storing instructions, a first power amplifier (PA) selectively connected to at least one of a plurality of modulators through a first switch, a first modulator including a second switch connected between the first switch and a first capacitor and a third switch connected to an output end of a first buck converter and being among the plurality of modulators configured to selectively operate in an envelope tracking (ET) mode or an average power tracking (APT) mode, a second modulator including a fourth switch connected between the first switch and a second capacitor and a fifth switch connected to an output end of a second buck converter and being among the plurality of modulators configured to selectively operate in the ET mode or the APT mode, and at least one processor, comprising processing circuitry, operatively connected to the first PA, the first modulator, and the second modulator. The instructions, when executed by at least one processor, individually and/or collectively, may cause the electronic device to: control the first modulator to operate in the APT mode based on identifying a first event associated with network communication, control the first switch to connect the first PA to the first modulator and the second modulator; control the second switch, the third switch, and the fourth switch to turn on; and control the fifth switch to turn off based on the first modulator operating in the APT mode.

    Combined Class D Amplifier and Buck Regulator

    公开(公告)号:US20240348213A1

    公开(公告)日:2024-10-17

    申请号:US18751180

    申请日:2024-06-21

    IPC分类号: H03F3/217 H03F1/02

    摘要: An apparatus and method for improving the efficiency of a D class amplifier, particularly at lower output levels. A class D amplifier having a load with inductance, such as a transducer, is configured to concurrently act as its own buck regulator. A capacitor connected to ground and to both ends of the transducer through switches functions as the buck regulator in connection with the inductance of the transducer, providing the class D amplifier with additional voltage levels such as might be provided by a G/H class amplifier but without the added complexity or expense of the G/H configurations. Better efficiency is possible than that provided by a 100% efficient conventional buck regulator. No envelope detector is required, nor any change to the gain of the digital signal to the class D amplifier. Both synchronous and asynchronous applications are possible. Feedback may be used if desired, but is not required.

    AMPLIFIER AND SIGNAL DISTRIBUTION METHOD
    10.
    发明公开

    公开(公告)号:US20240348210A1

    公开(公告)日:2024-10-17

    申请号:US18752957

    申请日:2024-06-25

    IPC分类号: H03F1/02 H03F3/21

    CPC分类号: H03F1/0288 H03F3/211

    摘要: An amplifier includes a signal acquiring unit that acquires an input signal, which is a digital signal, a signal generation unit that generates an in-phase signal, an orthogonal signal, and an envelope signal by using the input signal, and a signal distribution unit that generates a first signal and a second signal by using the in-phase signal, the orthogonal signal, and the envelope signal, a differential value of a function representing either or both an amplitude ratio and a phase difference is continuous during transition of the envelope signal from a minimum value to a maximum value.