Power amplifiers
    1.
    发明授权

    公开(公告)号:US12132450B2

    公开(公告)日:2024-10-29

    申请号:US17695500

    申请日:2022-03-15

    摘要: A power amplifier structure includes at least one power amplifier circuit. The power amplifier circuit includes a transistor of a first type connected in series with a transistor of a second type connected between the same voltage supply. In a non-limiting nonexclusive example, an n-type transistor is connected in series with a p-type transistor connected between Vdd. The power amplifier structure can include two amplifier circuits configured in a differential amplifier structure. The differential amplifier structure includes two amplifier circuits operably connected in parallel between the same voltage supply.

    Radio frequency receiving link and radio frequency transceiving device

    公开(公告)号:US12113584B2

    公开(公告)日:2024-10-08

    申请号:US17777425

    申请日:2020-11-18

    发明人: Chengwei Jia

    IPC分类号: H04B17/21 H04B1/16

    CPC分类号: H04B17/21 H04B1/16

    摘要: A radio frequency receiving link and a radio frequency transceiving device are provided. The radio frequency receiving link includes: an input unit, configured to input a first input signal; a clock unit, configured to generate a local oscillator signal; a receiving link frequency-mixing unit, configured to obtain the first input signal and the local oscillator signal, and generate a first frequency-mixing signal according to the first input signal and the local oscillator signal; and a calibration unit, configured to obtain first direct current offset information of the radio frequency receiving link, wherein the first direct current offset information is direct current offset information in the radio frequency receiving link when the receiving link frequency-mixing unit generates the first frequency-mixing signal.

    SYSTEM AND METHOD FOR PROGRAMMABLE RECEPTION OF ASYNCHRONOUS RADIO SIGNALS

    公开(公告)号:US20240333798A1

    公开(公告)日:2024-10-03

    申请号:US18623961

    申请日:2024-04-01

    申请人: Copper Labs, Inc.

    IPC分类号: H04L67/12 H04B1/16 H04L49/25

    CPC分类号: H04L67/12 H04L49/252 H04B1/16

    摘要: A system for reception of radio transmissions includes: a collector, coupled to a plurality of transmitters via a plurality of wireless radio frequency (RF) links. The collector has a channelizer chain that receives an RF signal stream comprising broadcasts from the plurality of transmitters according to one or more known packet transmission protocols, converts the RF signal stream into digital bit streams that each correspond to a corresponding frequency channel. The collector also has a plurality of packet receivers that comport with a number of frequency channels provided by the channelizer chain and that are coupled in parallel to the channelizer chain. Each of the receivers processes more than one sample within each bit of a corresponding digital bit stream to detect, demodulate, and decode bits of the corresponding digital bit stream into packet payloads. The collector validates the packet payloads and forwards the packet payloads to one or more entities. A configuration processor enable and disables selected channels to comport with location.

    Isolated driver device and method of transmitting information in an isolated driver device

    公开(公告)号:US12095603B2

    公开(公告)日:2024-09-17

    申请号:US18146872

    申请日:2022-12-27

    摘要: An isolated driver device comprises a first semiconductor die and a second semiconductor die galvanically isolated from each other. The second semiconductor die includes a signal modulator circuit configured to modulate a carrier signal to produce a modulated signal encoding information. A galvanically isolated communication channel implemented in the first semiconductor die and the second semiconductor die is configured to transmit the modulated signal from the second semiconductor die to the first semiconductor die. The second semiconductor die includes: a fault detection circuit configured to detect electrical faults in the second semiconductor die; a logic circuit coupled to the fault detection circuit and configured to assert a modulation bypass signal in response to a fault being detected by the fault detection circuit; and modulation masking circuitry configured to force the modulated signal to a steady value over a plurality of periods of the carrier signal in response to the modulation bypass signal being asserted. The first semiconductor die includes a respective logic circuit sensitive to the modulated signal and configured to detect a condition where the modulated signal has a steady value over a plurality of periods of the carrier signal, and to assert a fault detection signal in response to the condition being detected.

    Digital self-calibration for automatic offset cancellation

    公开(公告)号:US12081253B2

    公开(公告)日:2024-09-03

    申请号:US18352424

    申请日:2023-07-14

    摘要: A method for calibrating the DC operating point of a PWM receiver circuit is disclosed. The PWM receiving circuit includes an envelope detector having a first resistor string, and includes a bias circuit having a second resistor string and a plurality of switches. The second resistor string is coupled between a supply voltage and a reference voltage and functions as a voltage divider. Each switch, when closed, accesses a second voltage at a node of the second resistor string connected to the closed switch. To perform the calibration process, the plurality of switches is closed one at a time, and the second voltage is compared with a first voltage at a first node of the first resistor string. The switch that, when closed, produces the smallest difference between the first voltage and the second voltage remains closed after the calibration process, and is used for demodulating the PWM signal.