Abstract:
A control scheme is implemented to improve the transmission quality of a wideband output signal (132) transmitted by a power amplifier (100) in a wideband communication system. The scheme utilizes a control processor (502) to instruct a pair of digital-to-anallog converters (538, 542) to control carrier cancellation in a carrier cancellation block (104). The control processor (502) also instructs a different set of a digital-to-analog converters (546, 550) to control intermodulation product cancellation in an intermodulation product cancellation block (133). By optimizing cancellation of both the carrier and the intermodulation products, the linearity of the power amplifier (100) is improved.
Abstract:
An amplifying apparatus for linearly amplifying a desired signal using a pair of coupled non-linear amplifiers (57) is disclosed. The amplifying apparatus comprises a limiter (21) for separating amplitude variations from the desired signal and producing a constant amplitude signal bearing the phase of the desired signal and an amplitude related signal. In addition, a drive signal generator (62) produces two drive signals each dependent on the constant amplitude signal and the amplitude related signal such that each drive signal depends on the phase of the desired signal and such that the sum of the squares of the amplitudes of the drive signals is constant. Finally, a coupler (56) couples the two drive signals to produce two constant amplitude signals for driving the pair of non-linear power amplifiers (57) and for coupling the outputs of the power amplifiers (57) to produce two amplified output signals, one of which is the linearly amplified desired signal and the other of which is a waste energy signal.
Abstract:
A method, a program code and a controllable delay unit (300) for managing amplitude slope of an input signal (310) and phase slope of the input signal (310) are disclosed. The controllable delay unit (300) comprises an input port (301) configured to receive the input signal (310), and a delay chain (303) configured to provide discrete phase slopes of the input signal (310) at a first set (306) of switchable ports and at a second set (307) of switchable ports. Furthermore, the controllable delay unit (300) comprises a combining sub-unit (308) configured to combine a first and a second discretely delayed signal into an output signal (311), wherein the amplitude slope of the output signal (311) is dependable on a difference between phase slope of the first and second delayed signals and the phase slope of the output signal (311) is dependable on combined phase slope of the first and second delayed signals, and a controlling unit (309) configured to control, based on a control signal (312), the first and second set of switchable ports of the delay chain (303).
Abstract:
In accordance with the present disclosure, there is provided a predistorter combined with a feedforward corrector that addresses power dissipation of the feedforward error path while maintaining a sufficiently simple digital predistortion model so as to further minimize power dissipation without sacrificing linearity.
Abstract:
In an embodiment, a circuit includes a variable group delay configured to delay a wideband input signal to obtain a delayed input signal; a wideband operational amplifier configured to determine an error signal based on a difference between the delayed input signal and a linearized power amplifier output; a feedback amplifier configured to amplify the error signal to obtain an amplified error signal; and a directional combiner configured to combine the amplified error signal with the power amplifier output to obtain the linearized power amplifier output.
Abstract:
RF amplifier system (200) incorporating feedforward linearization. The system includes a digital waveform source (202) generating digital data s(t) representative of at least one analog signal. The system also includes a feedforward linearization circuit for reducing a distortion of an RF power amplifier (212). The feedforward linearization circuit includes a differential amplifier (230) arranged for generating an error signal. The error signal is determined based on a difference between the distorted RF output signal and an analog RF reference signal (229) generated from the digital data.
Abstract:
An embodiment of the present invention provides an apparatus capable of interference cancellation, comprising a first antenna capable of receiving an electrical signal, said electrical signal comprising a main signal component and an interfering signal component; a second antenna capable of receiving said electrical signal and passing it to a tunable delay line, said tunable delay line capable of varying the time delay of said electrical signal; and a combiner capable of receiving the electrical signal from said first antenna and the time delayed electrical signal from said tunable delay line and combining them so as to cancel said interfering signal component from said electrical signal. An embodiment of the present invention also provides an apparatus capable of interference cancellation, comprising an antenna capable of receiving an electrical signal, said electrical signal comprising a main signal component and an interfering signal component; and a feed back loop in which a portion of said electrical signal passes through a cancellation path that includes a tunable delay line capable of time delaying said electrical signal such that when a coupler recombines said electrical signals said interfering signal component from said electrical signal is substantially cancelled.
Abstract:
An embodiment of the present invention provides an apparatus, comprising a feed forward amplifier capable of receiving an input signal and including a plurality of cancellation loops, wherein at least one of the cancellation loops includes a tunable delay line enabling the reduction of intermodulation distortion and receive band noise when outputs from the plurality of cancellation loops are combined with the input signal to the feed forward amplifier. In an embodiment of the present invention the plurality of cancellation loops may be two cancellations loops and a tunable delay line may be included in both of the cancellation loops. Further, the tunable delay line may be a voltage tunable delay line that includes a voltage tunable dielectric capacitor to facilitate the control of the tunable delay and the voltage tunable dielectric capacitor may include a layer of voltage tunable dielectric material positioned on a surface of a low loss, low dielectric substrate.
Abstract:
Amplifying signals includes receiving an input signal (12). The input signal (12) is amplified at a quadrature coupled amplifier (52) to generate an amplified signal. The input signal is compared with the amplified signal to generate an error signal (46). The error signal (46) is amplified at the quadrature coupled amplifier to generate an amplified error signal. The amplified error signal is compared with the amplified signal to generate an output signal.