公开(公告)号：WO1992019044A1

公开(公告)日：1992-10-29

申请号：PCT/US1992002908

申请日：1992-04-09

Applicant: ARTISOFT, INC.

Inventor： ARTISOFT, INC. ,  GLEESON, William, J., III

IPC: H03K19/00

CPC classification number: H03K19/177 ,  G06F13/4072 ,  G06F13/4077 ,  H03K19/17704

Abstract: A circuit to selectively process dip switches (51-58) onto bus lines (41-48) in a computer or device utilizing digital logic circuits wherein the dip switches are operably connected to a changeable source of digital signals so that upon command at desired times, the output of the dip switches connected to the bus lines may be reversed. Such a circuit consists of connecting the dip switches on one side to the bus lines and the other side through a current limiting resistor (R1-R18) to the output of a logic circuit such as an NAND gate (72) or other circuit which constantly ouputs a digital signal. The input (71) then to this logic circuit may be changed as desired to reverse the logic circuit output and thus the output of the dip switches. If desired, in place of the NAND gate output, the current limiting resistor may be grounded or connected to digital '1' in which case a constant digital signal is outputted to the bus line upon dip switch closure.