公开(公告)号：WO2007081434A1

公开(公告)日：2007-07-19

申请号：PCT/US2006/044127

申请日：2006-11-13

Applicant: AVIZA TECHNOLOGY, INC. ,  TREICHEL, Helmuth

Inventor： TREICHEL, Helmuth

IPC: C23C16/06

CPC classification number: C23C16/06 ,  C23C16/45578

Abstract: The present invention provides a method for depositing a ruthenium metal compound containing film on one or more substrates (101). The desired metal compound is first dissolved in a suitable solvent. The precursor mixture is then vaporized and delivered to a process chamber (100) to be used in the deposition of the metal compound on the substrates by process methods comprising CVD, MOCVD, ALD, and the like. This method results in the deposition of high quality, substantially uniform films, Additionally, the method makes efficient use of the metal compound component and reduces the cost for the deposition of the metal compound.

Abstract translation: 本发明提供一种在一个或多个基材（101）上沉积含钌金属化合物的膜的方法。 首先将所需的金属化合物溶解在合适的溶剂中。 然后将前体混合物汽化并输送到处理室（100），以用于通过包括CVD，MOCVD，ALD等的工艺方法将金属化合物沉积在基板上。 这种方法导致沉积高质量，基本上均匀的膜。另外，该方法有效地利用了金属化合物组分，降低了沉积金属化合物的成本。

公开(公告)号：WO2007008705A3

公开(公告)日：2007-01-18

申请号：PCT/US2006/026588

申请日：2006-07-10

Applicant: AVIZA TECHNOLOGY, INC. ,  BAILEY, Robert, Jeffrey ,  QIU, Taiquing, Thomas ,  PORTER, Cole ,  LAPARRA, Olivier ,  CHATHAM, Roert, Hood ,  MOGAARD, Martin ,  TREICHEL, Helmuth

Inventor： BAILEY, Robert, Jeffrey ,  QIU, Taiquing, Thomas ,  PORTER, Cole ,  LAPARRA, Olivier ,  CHATHAM, Roert, Hood ,  MOGAARD, Martin ,  TREICHEL, Helmuth

IPC: H01L21/00 ,  H01L21/20 ,  H01L21/324 ,  H01L21/477

Abstract: A batch of wafer substrates is provided with each wafer substrate having a surface. Each surface is coated with a layer of material applied simultaneously to the surface of each of the batch of wafer substrates. The layer of material is applied to a thickness that varies less than four thickness percent across the surface and exclusive of an edge boundary and having a wafer-to-wafer thickness variation of less than three percent. The layer of material so applied is a silicon oxide, silicon nitride or silicon oxynitride with the layer of material being devoid of carbon and chlorine. Formation of silicon oxide or a silicon oxynitride requires the inclusion of a co-reactant. Silicon nitride is also formed with the inclusion of a nitrification co-reactant. A process for forming such a batch of wafer substrates involves feeding the precursor into a reactor containing a batch of wafer substrates and reacting the precursor at a wafer substrate temperature, total pressure, and precursor flow rate sufficient to create such a layer of material. The delivery of a precursor and co-reactant as needed through vertical tube injectors having multiple orifices with at least one orifice in registry with each of the batch of wafer substrates and exit slits within the reactor to create flow across the surface of each of the wafer substrates in the batch provides the within- wafer and wafer-to-wafer uniformity.

公开(公告)号：WO2005031233A2

公开(公告)日：2005-04-07

申请号：PCT/US2004/031484

申请日：2004-09-23

Applicant: AVIZA TECHNOLOGY, INC. ,  DU BOIS, Dale, R. ,  PORTER, Cole ,  MOGAARD, Martin ,  BAILEY, Jeff

Inventor： DU BOIS, Dale, R. ,  PORTER, Cole ,  MOGAARD, Martin ,  BAILEY, Jeff

IPC: F27B

CPC classification number: C23C16/4584 ,  C23C16/45578 ,  C23C16/45591 ,  C23C16/46 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/67757

Abstract: An apparatus is provided for thermally processing substrates held in a carrier. The apparatus includes a cross-flow liner to improve gas flow uniformity across the surface of each substrate. The cross-flow liner of the present invention includes a longitudinal bulging section to accommodate a cross-flow injection system. The liner is patterned and sized so that it is conformal to the wafer carrier, and as a result, reduces the gap between the liner and the wafer carrier to reduce or eliminate vortices and stagnation in the gap areas between the wafer carrier and the liner inner wall.

Abstract translation: 提供了用于热处理保持在载体中的基板的装置。 该装置包括横流衬套，以改善穿过每个衬底表面的气流均匀性。 本发明的横流衬套包括纵向凸起部分以适应横流注入系统。 将衬垫图案化并定尺寸使其与晶片载体保持一致，结果减小衬垫和晶片载体之间的间隙，以减少或消除晶片载体和衬垫内部之间的间隙区域中的涡流和停滞 壁。

公开(公告)号：WO2007016592A2

公开(公告)日：2007-02-08

申请号：PCT/US2006/030000

申请日：2006-07-31

Applicant: AVIZA TECHNOLOGY, INC. ,  BERCAW, Craig ,  COSSENTINE, Dan ,  YAO, Jack, Chihchieh ,  LO, Tommy ,  DEDONTNEY, Jay, Brian ,  BARTHOLOMEW, Lawerence, D. ,  CHATHAM III, Robert, Hood

Inventor： BERCAW, Craig ,  COSSENTINE, Dan ,  YAO, Jack, Chihchieh ,  LO, Tommy ,  DEDONTNEY, Jay, Brian ,  BARTHOLOMEW, Lawerence, D. ,  CHATHAM III, Robert, Hood

IPC: C23C16/00

CPC classification number: C23C16/4401 ,  C23C16/4409 ,  C23C16/4412 ,  C23C16/455 ,  C23C16/45525 ,  C23C16/45536 ,  C23C16/45544 ,  C23C16/45561 ,  H01L21/6719 ,  H01L21/67751

Abstract: The present invention relates generally to a deposition apparatus for semiconductor processing. More specifically, embodiments of the present invention relate to a gas manifold valve cluster and deposition apparatus. In some embodiments of the present invention a gas manifold valve cluster and system are provided that promotes reduced length and volumes of gas lines that will be exposed to atmosphere during cleaning which minimizes the time required to perform process chamber maintenance and therefore increase the productivity of the process chamber. In other embodiments a gas manifold valve cluster and ALD deposition apparatus are provided.

Abstract translation: 本发明一般涉及用于半导体处理的沉积设备。 更具体地，本发明的实施例涉及气体歧管阀组和沉积设备。 在本发明的一些实施例中，提供了一种气体歧管阀组和系统，其促进在清洁期间暴露于大气的气体管线的长度和体积的减小，这使得执行处理腔室维护所需的时间最小化并且因此增加 处理室。 在其他实施例中，提供气体歧管阀组和ALD沉积设备。

公开(公告)号：WO2006039503A3

公开(公告)日：2006-04-13

申请号：PCT/US2005/035213

申请日：2005-09-29

Applicant: AVIZA TECHNOLOGY, INC. ,  PORTER, Cole ,  WILLIAMS, Karl ,  TREICHEL, Helmuth

Inventor： PORTER, Cole ,  WILLIAMS, Karl ,  TREICHEL, Helmuth

IPC: C23C16/00 ,  C23C16/24

Abstract: In one aspect, the present invention provides a method and apparatus configured to form dielectric films or layers at low temperature. In one embodiment dielectric films such as silicon nitride (SixNy) and silicon dioxide (SiO2) are deposited at temperatures equal to or below 550°C. In a further aspect of the present invention, a method and apparatus configured to provide cross flow injection of reactant gases is provided. In one embodiment, reactant gasses (such as a monomolecular precursor and NH3) flow into vertically positioned adjustable injectors that mix reactants prior to injection into the wafer region.

公开(公告)号：WO2005124849A2

公开(公告)日：2005-12-29

申请号：PCT/US2005/021291

申请日：2005-06-15

Applicant: AVIZA TECHNOLOGY, INC. ,  SENZAKI, Yoshihide

Inventor： SENZAKI, Yoshihide

IPC: H01L21/469

CPC classification number: C23C16/029 ,  C23C16/308 ,  C23C16/34 ,  C23C16/401 ,  C23C16/45525 ,  C23C16/45529 ,  C23C16/45531 ,  C23C16/45546 ,  H01L21/02148 ,  H01L21/022 ,  H01L21/0228

Abstract: The present invention provides systems and methods for mixing precursors such that a mixture of precursors are present together in a chamber during a single pulse step in an atomic layer deposition (ALD) process to form a multi-component film. The precursors are comprised of at least one different chemical component, and such different components will form a mono-layer to produce a multi-component film. In a further aspect of the present invention, a dielectric film having a composition gradient is provided.

Abstract translation: 本发明提供用于混合前体的系统和方法，使得在原子层沉积（ALD）工艺中的单个脉冲步骤期间，前体的混合物在腔室中一起存在，以形成多组分膜。 前体由至少一种不同的化学组分组成，并且这样的不同组分将形成单层以产生多组分膜。 在本发明的另一方面，提供了具有组成梯度的电介质膜。

公开(公告)号：WO2004109761A2

公开(公告)日：2004-12-16

申请号：PCT/US2004/016795

申请日：2004-05-26

Applicant: AVIZA TECHNOLOGY INC. ,  DEDONTNEY, Jay, B. ,  YAO, Jack, C.

Inventor： DEDONTNEY, Jay, B. ,  YAO, Jack, C.

IPC: H01L

CPC classification number: C23C16/45565 ,  C23C16/45574

Abstract: The present invention provides a gas distribution apparatus useful in semiconductor manufacturing. The gas distribution apparatus comprises a unitary member and a gas distribution network formed within the unitary member for uniformly delivering a gas into a process region. The gas distribution network is formed of an inlet passage extending upwardly through the upper surface of the unitary member for connecting to a gas source, a plurality of first passages converged at a junction and connected with the inlet passage at the junction, a plurality of second passages connected with the plurality of first passages, and a plurality of outlet passages connected with the plurality of second passages for delivering the gas into a processing region. The first passages extend radially and outwardly from the junction to the periphery surface of the unitary member, and the second passages are non-perpendicular to the first passages and extend outwardly from the first passages to the periphery surface. The outlet passages extend downwardly through the lower surface of the unitary member for delivering the gas into the processing region.

Abstract translation: 本发明提供一种可用于半导体制造的气体分配装置。 气体分配装置包括整体构件和形成在整体构件内用于将气体均匀地输送到处理区域中的气体分配网络。 气体分配网络由向上延伸穿过整体构件的上表面的入口通道形成，用于连接到气源，多个第一通道会聚在接合处并与接合处的入口通道连接，多个第二通道 与多个第一通道连接的通道，以及与多个第二通道连接的多个出口通道，用于将气体输送到处理区域。 所述第一通道从所述连接件的所述接合处径向向外延伸到所述整体构件的周边表面，并且所述第二通道与所述第一通道非垂直并且从所述第一通道向外延伸到所述外围表面。 出口通道向下延伸穿过整体构件的下表面，用于将气体输送到处理区域中。

公开(公告)号：WO2004105083A2

公开(公告)日：2004-12-02

申请号：PCT/US2004/012245

申请日：2004-04-21

Applicant: AVIZA TECHNOLOGY, INC. ,  SENZAKI, Yoshihide ,  PARK, Seung, G.

Inventor： SENZAKI, Yoshihide ,  PARK, Seung, G.

IPC: H01L

CPC classification number: C23C16/45531 ,  C23C16/029 ,  C23C16/308 ,  C23C16/401 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/3143 ,  H01L21/3145 ,  H01L21/31608 ,  H01L21/31612 ,  H01L21/31645

Abstract: The present invention provides systems and methods for mixing vaporized precursors such that a mixture of vaporized precursors are present together in a chamber during a single pulse step in an atomic layer deposition (ALD) process to form a multi-component film. The vaporized precursors are comprised of at least one different chemical component, and such different components will form a mono-layer to produce a multi-component film. In a further aspect of the present invention, a dielectric film having a composition gradient is provided.

Abstract translation: 本发明提供用于混合汽化的前体的系统和方法，使得在原子层沉积（ALD）工艺中的单个脉冲步骤期间，气化前体的混合物在腔室中一起存在，以形成多组分膜。 蒸发的前体由至少一种不同的化学组分组成，并且这样的不同组分将形成单层以产生多组分膜。 在本发明的另一方面，提供具有组成梯度的电介质膜。

公开(公告)号：WO2004008827A3

公开(公告)日：2004-01-29

申请号：PCT/US2003/022712

申请日：2003-07-21

Applicant: AVIZA TECHNOLOGY, INC. ,  LEE, Sang-In ,  SENZAKI, Yoshihide

Inventor： LEE, Sang-In ,  SENZAKI, Yoshihide

IPC: H01L21/31

Abstract: A method of processing a semiconductor substrate includes reacting in a reactor a first reactant gas, evacuating the first reactant gas from the reactor, reacting a second reactant gas, and evacuating the second reactant gas. The reacting of the first reactant gas reacts the first reactant gas with an exposed surface of the semiconductor substrate in a reactor to convert the exposed surface into a solid mono-layer. The reacting of the second reactant gas reacts the second reactant gas with the solid mono-layer in the reactor to convert the solid mono-layer into a gaseous compound. The evacuating of the second reactant gas also evacuates the gaseous compound from the reactor.

公开(公告)号：WO2008118531A3

公开(公告)日：2008-10-02

申请号：PCT/US2008/052514

申请日：2008-01-30

Applicant: AVIZA TECHNOLOGY, INC. ,  BAILEY, Robert, Jeffrey ,  FOSTER, Derrick ,  LAPARRA, Olivier ,  MOGAARD, Martin ,  PORTER, Cole ,  QIU, Taiqing ,  TREICHEL, Helmuth ,  CHATHAM, Hood

Inventor： BAILEY, Robert, Jeffrey ,  FOSTER, Derrick ,  LAPARRA, Olivier ,  MOGAARD, Martin ,  PORTER, Cole ,  QIU, Taiqing ,  TREICHEL, Helmuth ,  CHATHAM, Hood

IPC: H01L21/20

Abstract: A process for forming an oxide-containing film from silicon is provided that includes heating the silicon substrates to a process temperature of between 25O0C and HOO0C with admission into the process chamber of diatomic reductant source gas Z-Z' where Z and Z' are each H, D and T and a stable source of oxide ion. Multiple exhaust ports exist along the vertical extent of the process chamber to create reactant across flow. A batch of silicon substrates is provided having multiple silicon base layers, each of the silicon base layers having exposed and planes and a film residual stress associated with the film being formed at a temperature of less than 6000C and having a film thickness that exceeds a film thickness on the crystallographic plane by less than 20%, or a film characterized by thickness anisotropy less than 18% and an electrical breakdown field of greater than 10.5 MV/cm.

Abstract translation: 提供了一种由硅形成含氧化物膜的方法，该方法包括在硅原料气体ZZ'进入处理室时将硅衬底加热到​​250℃和1100℃之间的处理温度，其中 Z和Z'分别是H，D和T以及稳定的氧化物离子源。 沿着处理室的垂直范围存在多个排气口以在整个流动中产生反应物。 提供具有多个硅基底层的一批硅基底，每个硅基底层具有暴露的＆lt; 110＆gt; 和＆lt; 100＆gt; 以及与在低于600℃的温度下形成的薄膜相关的薄膜残余应力，并具有＆lt; 110＆gt; 薄膜厚度超过＆lt; 100＆gt; ＆lt; 100＆gt;膜厚度。 小于20％的晶面，或者以厚度各向异性小于18％和大于10.5MV / cm的电击穿场为特征的薄膜。