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    WIRELESS INTERCONNECTS ON FLEXIBLE CABLES BETWEEN COMPUTING PLATFORMS
    1.
    发明申请
    WIRELESS INTERCONNECTS ON FLEXIBLE CABLES BETWEEN COMPUTING PLATFORMS 审中-公开
    计算平台间灵活电缆的无线互连

    公开(公告)号：WO2017099730A1

    公开(公告)日：2017-06-15

    申请号：PCT/US2015/064511

    申请日：2015-12-08

    Applicant: INTEL CORPORATION

    Inventor： KAMGAING, Telesphor ,  DISCHLER, Richard J.

    IPC: G06F1/16 ,  G06F15/17

    CPC classification number: G06F1/16 ,  H05K1/0274 ,  H05K1/147 ,  H05K2201/045 ,  H05K2201/046

    Abstract: Wireless interconnects are shown on flexible cables for communication between computing platforms. One example has an integrated circuit chip, a package substrate to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components, a cable on the package substrate coupled to the integrated circuit chip at one end, a radio chip on the cable coupled to the cable at the other end, the radio chip to modulate data over a carrier and to transmit the modulated data, and a waveguide transition coupled to a dielectric waveguide to receive the transmitted modulated data from the radio and to couple it into the waveguide, the waveguide to carry the modulated data to an external component.

    Abstract translation: 无线互连显示在灵活的电缆上用于计算平台之间的通信。 一个示例具有集成电路芯片，用于承载集成电路芯片的封装衬底，具有用于将集成电路芯片连接到外部组件的导电连接器的封装衬底，在一端处耦合到集成电路芯片的封装衬底上的电缆， 电缆上的无线电芯片在另一端耦合到电缆，无线电芯片在载波上调制数据并传输调制的数据，以及耦合到介质波导的波导转换以接收来自无线电的传输的调制数据，以及 将其耦合到波导中，波导将调制数据传送到外部组件。

    COMPUTING APPARATUS WITH CLOSED COOLING LOOP
    5.
    发明申请
    COMPUTING APPARATUS WITH CLOSED COOLING LOOP 审中-公开
    带封闭冷却环的计算机

    公开(公告)号：WO2017052628A1

    公开(公告)日：2017-03-30

    申请号：PCT/US2015/052377

    申请日：2015-09-25

    Applicant: INTEL CORPORATION

    Inventor： KULKARNI, Devdatta P. ,  DISCHLER, Richard J.

    IPC: H05K7/20 ,  G06F1/20

    CPC classification number: G06F1/20 ,  G06F2200/201 ,  H05K7/20263 ,  H05K7/20772

    Abstract: The present disclosure describes embodiments of apparatuses and methods related to a computing apparatus with a closed cooling loop thermally coupled to one or more processors disposed on a circuit board of the computing apparatus. The closed cooling loop circulates a dielectric fluid to absorb heat from the processor. A portion of the dielectric fluid is evaporated from the processor heat absorbed by the dielectric fluid. A heat exchanger is coupled to the circuit board and thermally coupled to the closed cooling loop. The heat exchanger is to include a coolant flow to remove heat from the dielectric fluid circulated through the portion of the closed cooling loop thermally coupled to the heat exchanger. A vapor portion of the dielectric fluid is condensed from the heat removed by the coolant flow. Other embodiments may be described and/or claimed.

    Abstract translation: 本公开描述了与具有热耦合到设置在计算设备的电路板上的一个或多个处理器的封闭冷却回路相关的计算设备的设备和方法的实施例。 封闭的冷却回路循环介电流体以吸收来自处理器的热量。 电介质流体的一部分从由介电流体吸收的处理器蒸发。 热交换器耦合到电路板并热耦合到封闭的冷却回路。 热交换器包括冷却剂流，以从热耦合到热交换器的封闭冷却回路部分循环的介电流体中除去热量。 电介质流体的蒸气部分由冷却剂流除去的热量冷凝。 可以描述和/或要求保护其他实施例。

    SWITCHABLE TOPOLOGY MACHINE
    6.
    发明申请
    SWITCHABLE TOPOLOGY MACHINE 审中-公开

    公开(公告)号：WO2018136123A3

    公开(公告)日：2018-07-26

    申请号：PCT/US2017/058011

    申请日：2017-10-24

    Applicant: INTEL CORPORATION

    Inventor： BUTERA, William J. ,  STEELY, Simon C., Jr. ,  DISCHLER, Richard J.

    IPC: G06F15/173 ,  G06F9/38

    Abstract: Embodiments relate to a computational device including multiple processor tiles on a die that may have multiple switchable topologies. A topology of the computational device may include one or more virtual circuits. A virtual circuit may include multiple processor tiles. A processor tile of a virtual circuit of a topology may include a configuration vector to control a connection between the processor tile and a neighboring processor tile. A first topology of the computation device may correspond to a first phase of a computation of a program, and a second topology of the computation device may correspond to a second phase of the computation of the program. Other embodiments may be described and/or claimed.

    SWITCHABLE TOPOLOGY MACHINE
    7.
    发明申请
    SWITCHABLE TOPOLOGY MACHINE 审中-公开

    公开(公告)号：WO2018136123A2

    公开(公告)日：2018-07-26

    申请号：PCT/US2017/058011

    申请日：2017-10-24

    Applicant: INTEL CORPORATION

    Inventor： BUTERA, William J. ,  STEELY, Simon C., Jr. ,  DISCHLER, Richard J.

    IPC: G06F15/173 ,  G06F9/38

    CPC classification number: G06F15/17381 ,  G06F9/38 ,  G06F9/3897 ,  G06F15/17343

    Abstract: Embodiments relate to a computational device including multiple processor tiles on a die that may have multiple switchable topologies. A topology of the computational device may include one or more virtual circuits. A virtual circuit may include multiple processor tiles. A processor tile of a virtual circuit of a topology may include a configuration vector to control a connection between the processor tile and a neighboring processor tile. A first topology of the computation device may correspond to a first phase of a computation of a program, and a second topology of the computation device may correspond to a second phase of the computation of the program. Other embodiments may be described and/or claimed.

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