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公开(公告)号：WO2021102076A1
公开(公告)日：2021-05-27
申请号：PCT/US2020/061169
申请日：2020-11-19
Applicant: LIGHTMATTER, INC.
Inventor： HARRIS, Nicholas, C. , GOULD, Michael , TYMCHENKO, Mykhailo , GAO, Weilu , GUPTA, Shashank
Abstract: The techniques described herein relate to methods and apparatus for interferometric modulation. An apparatus includes an interferometric device comprising a first optical path and a second optical path, and at least one Franz-Keldysh (FK) modulator disposed in either the first optical path or the second optical path of the interferometric device. The interferometric device receives input light, wherein a first portion of the input light travels along the first optical path of the interferometric device, and a second portion of the input light travels along the second optical path of the interferometric device. The FK modulator modulates an intensity of either the first portion of the input light or the second portion of the input light.
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公开(公告)号：WO2022246171A2
公开(公告)日：2022-11-24
申请号：PCT/US2022/030215
申请日：2022-05-20
Applicant: LIGHTMATTER, INC.
Inventor： RAMEY, Carl , HARRIS, Nicholas, C. , ESLAMPOUR, Hamid , DOBBIE, Bradley David , GOULD, Michael , KOPA, Anthony , GRESKAMP, Brian , BUNANDAR, Darius
Abstract: Electronic-photonic packages and related fabrication methods are described. A package may include a plurality of photonic integrated circuits (PICs), where each PIC comprises a photonic accelerator configured to perform matrix multiplication in the optical domain. The package may further include an application specific integrated circuit (ASIC) configured to control at least one of the photonic accelerators. The package further includes an interposer. The plurality of PICs are coupled to a first side of the interposer and the ASIC is coupled to a second side of the interposer opposite the first side. A first thermally conductive member in thermal contact with at least one of the PICs. The first thermally conductive member may include a heat spreader. A second thermally conductive member in thermal contact with the ASIC. The second thermally conductive member may include a lid. The first thermally conductive member faces the first side of the interposer, and the second thermally conductive member faces the second side of the interposer. In some embodiments, the interposer sits in part on a substrate and in part on the PICs.
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公开(公告)号：WO2020149871A1
公开(公告)日：2020-07-23
申请号：PCT/US2019/032111
申请日：2019-05-14
Applicant: LIGHTMATTER, INC.
Inventor： HARRIS, Nicholas, C. , GOULD, Michael , YILDIRIM, Omer, Ozgur
Abstract: Low-noise optical differential receivers are described. Such differential receivers may include a differential amplifier having first and second inputs and first and second outputs, and four photodetectors. A first and a second of such photodetectors are coupled to the first input of the differential amplifier, and a third and a fourth of such photodetectors are coupled to the second input of the differential amplifier. The anode of the first photodetector and the cathode of the second photodetector are coupled to the first input of the differential amplifier. The cathode of the third photodetector and the anode of the fourth photodetector are coupled to the second input of the differential amplifier. The optical receiver may involve two stages of signal subtraction, which may significantly increase noise immunity.
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公开(公告)号：WO2019221902A1
公开(公告)日：2019-11-21
申请号：PCT/US2019/029803
申请日：2019-04-30
Applicant: LIGHTMATTER, INC.
Inventor： HARRIS, Nicholas, C. , RAMEY, Carl
IPC: G06F11/08 , G06F12/00 , H01L25/065
Abstract: A memory device is described. The memory device comprises a plurality of stacked memory layers, wherein each of the plurality of stacked memory layers comprises a plurality of memory cells. The memory device further comprises an optical die bonded to the plurality of stacked memory layers and in electrical communication with the stacked memory layers through one or more interconnects. The optical die comprises an optical transceiver, and a memory controller configured to control read and/or write operations of the stacked memory layers. The optical die may be positioned at one end of the plurality of stacked memory layers. The one or more interconnects may comprise one or more through silicon vias (TSV). The plurality of memory cells may comprise a plurality of solid state memory cells. The memory devices described herein can enable all-to-all, point-to-multipoint and ring architectures for connecting logic units with memory devices.
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公开(公告)号：WO2023034300A1
公开(公告)日：2023-03-09
申请号：PCT/US2022/042038
申请日：2022-08-30
Applicant: LIGHTMATTER, INC.
Inventor： GUPTA, Shashank , GOULD, Michael , CARR, James , HARRIS, Nicholas, C. , MAHNKOPF, Sven , DEMMER, David
Abstract: Described herein are photonic sources and related system architectures that can satisfy the optical power requirements of large photonic accelerators. Some embodiments relate to a computer comprising a photonic accelerator configured to perform matrix multiplication; a fiber array optically coupled to the photonic accelerator; and a photonic source optically coupled to the fiber array. The photonic source comprising a laser array comprising a plurality of monolithically co-integrated lasers, and a coupling lens array comprising a plurality of monolithically co-integrated lenses, the coupling lens array optically coupling the laser array to the fiber array. The laser array is configured to output between 0.1 W and 10 W of optical power.
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公开(公告)号：WO2022020667A1
公开(公告)日：2022-01-27
申请号：PCT/US2021/042882
申请日：2021-07-23
Applicant: LIGHTMATTER, INC.
Inventor： BUNANDAR, Darius , GOULD, Michael , HARRIS, Nicholas, C. , RAMEY, Carl
Abstract: Systems and methods for increasing throughput of a photonic processor by using photonic degrees of freedom (DOF) are provided. The photonic processor includes a multiplexer configured to multiplex, using at least one photonic DOF, multiple encoded optical signals into a multiplexed optical signal. The photonic processor also includes a detector coupled to an output of an optical path including the multiplexer, the detector being configured to generate a first current based on the multiplexed optical signal or a demultiplexed portion of the multiplexed optical signal. The photonic processor further includes a modulator coupled to and output of the detector, the modulator being configured to generate a second current by modulating the first current.
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公开(公告)号：WO2021003221A1
公开(公告)日：2021-01-07
申请号：PCT/US2020/040428
申请日：2020-07-01
Applicant: LIGHTMATTER, INC.
Inventor： DORTA-QUINONES, Carlos , RAMEY, Carl , YILDIRIM, Omer, Ozgur , RAVI, Chithira , GUPTA, Shashank , HARRIS, Nicholas, C.
IPC: G01J11/00 , G05D25/02 , H01S5/068 , H01S5/0683
Abstract: Methods and apparatus for tuning a photonics-based component. An opto-electrical detector is configured to output an electrical signal based on a measurement of light intensity of the photonics-based component, the light intensity being proportional to an amount of detuning of the photonics-based component. Analog-to-digital conversion (ADC) circuitry is configured to output a digital signal based on the electrical signal output from the opto-electrical detector. Feedback control circuitry is configured to tune the photonics-based component based, at least in part, on the digital signal output from the ADC circuitry.
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公开(公告)号：WO2020092899A1
公开(公告)日：2020-05-07
申请号：PCT/US2019/059386
申请日：2019-11-01
Applicant: LIGHTMATTER, INC.
Inventor： BUNANDAR, Darius , HARRIS, Nicholas, C. , KENNEY, Tyler
IPC: H04B10/70 , H04B10/548 , H04B10/80 , H04J14/02 , G02F1/21
Abstract: Systems and methods for performing matrix operations using a photonic processor are provided. The photonic processor includes encoders configured to encode a numerical value into an optical signal and optical multiplication devices configured to output an electrical signal proportional to a product of one or more encoded values. The optical multiplication devices include a first input waveguide, a second input waveguide, a coupler circuit coupled to the first input waveguide and the second input waveguide, a first detector and a second detector coupled to the coupler circuit, and a circuit coupled to the first detector and second detector and configured to output a current that is proportional to a product of a first input value and a second input value.
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公开(公告)号：WO2022115704A1
公开(公告)日：2022-06-02
申请号：PCT/US2021/061013
申请日：2021-11-29
Applicant: LIGHTMATTER, INC. , NAIR, Lakshmi , WIDEMANN, David , WALTER, David
Inventor： BUNANDAR, Darius , LAZOVICH, Tomo , LEVKOVA, Ludmila , DRONEN, Nicholas , FORSYTHE, Martin, B.Z. , BASUMALLIK, Ayon , HARRIS, Nicholas, C.
Abstract: Described herein are techniques of training a machine learning model and performing inference using an analog processor. Some embodiments mitigate the loss in performance of a machine learning model resulting from a lower precision of an analog processor by using an adaptive block floating-point representation of numbers for the analog processor. Some embodiments mitigate the loss in performance of a machine learning model due to noise that is present when using an analog processor. The techniques involve training the machine learning model such that it is robust to noise.
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公开(公告)号：WO2022005910A1
公开(公告)日：2022-01-06
申请号：PCT/US2021/039227
申请日：2021-06-25
Applicant: LIGHTMATTER, INC.
Inventor： GOULD, Michael , RAMEY, Carl , HARRIS, Nicholas, C. , BUNANDAR, Darius
IPC: G06F17/16 , G06E3/008 , H03H17/06 , H03H2017/0081 , H03M1/12
Abstract: Hybrid analog-digital processing systems are described. An example of a hybrid analog-digital processing system includes photonic accelerator configured to perform matrix-vector multiplication using light. The photonic accelerator exhibits a frequency response having a first bandwidth (e.g., less than 3 GHz). The hybrid analog-digital processing system further includes a plurality of analog-to-digital converters (ADCs) coupled to the photonic accelerator, and a plurality of digital equalizers coupled to the plurality of ADCs, wherein the digital equalizers are configured to set a frequency response of the hybrid analog-digital processing system to a second bandwidth greater than the first bandwidth.
