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    LOW-LIGHT-LEVEL IMAGING AND IMAGE PROCESSING
    1.
    发明申请
    LOW-LIGHT-LEVEL IMAGING AND IMAGE PROCESSING 审中-公开
    低照度成像和图像处理

    公开(公告)号：WO9739575A3

    公开(公告)日：1997-12-24

    申请号：PCT/US9706202

    申请日：1997-04-14

    Applicant: MASSACHUSETTS INST TECHNOLOGY

    Inventor： SAVOYE EUGENE D ,  WAXMAN ALLEN M ,  REICH ROBERT K ,  BURKE BARRY E ,  GREGORY JAMES A ,  MCGONAGLE WILLIAM H ,  LOOMIS ANDREW H ,  KOSICKI BERNARD B ,  MOUNTAIN ROBERT W ,  GOVE ALAN N ,  FAY DAVID A ,  CARRICK JAMES E

    IPC: H04N5/20 ,  H04N5/335

    CPC classification number: H04N5/20 ,  H04N5/335

    Abstract: An imaging system is provided for imaging a scene to produce a sequence of image frames of the scene at a frame rate, R, of at least about 25 image frames per second. The system includes an optical input port (14), a charge-coupled imaging device (16a), an analog signal processor (24), and an analog-to-digital processor (A/D) (26). The A/D (26) digitizes the amplified pixel signal to produce a digital image signal formatted as a sequence of image frames each of a plurality of digital pixel values and having a dynamic range of digital pixel values represented by a number of digital bits, B, where B is greater than 8. A digital image processor (28) is provided for processing digital pixel values in the sequence of image frames to produce an output image frame sequence at the frame rate, R, representative of the imaged scene, with a latency of no more than about 1/R and a dynamic range of image frame pixel values represented by a number of digital bits, D, where D is less than B. The output image frame sequence is characterized by noise-limited resolution of at least a minimum number, NM, of line pairs per millimeter, referred to the charge-coupled imaging device pixel array, in an imaged scene as a function of illuminance of the input light impinging the charge-coupled imaging device pixels.

    Abstract translation: 提供一种成像系统，用于对场景进行成像，以每秒至少约25幅图像帧的帧速率R产生场景的图像序列序列。 该系统包括光输入端口，电荷耦合成像装置，模拟信号处理器和模数转换器（A / D）。 A / D数字化放大的像素信号以产生被格式化为多个数字像素值中的每一个的图像帧序列并且具有由多个数字位B表示的数字像素值的动态范围的数字图像信号，其中 B大于8.提供数字图像处理器用于处理图像帧序列中的数字像素值以产生代表成像场景的帧速率R的输出图像帧序列，等待时间不超过 约1 / R和由数字比特数D表示的图像帧像素值的动态范围，其中D小于B.输出图像帧序列的特征在于噪声限制分辨率至少最小数目NM 被称为电荷耦合成像装置像素阵列的线对每毫米在成像场景中作为照射电荷耦合成像装置像素的输入光的照度的函数。

    HIGH-PRECISION BLOOMING CONTROL STRUCTURE FORMATION FOR AN IMAGE SENSOR
    2.
    发明申请
    HIGH-PRECISION BLOOMING CONTROL STRUCTURE FORMATION FOR AN IMAGE SENSOR 审中-公开
    一种图像传感器的高精度喷墨控制结构形成

    公开(公告)号：WO0038233A3

    公开(公告)日：2000-11-23

    申请号：PCT/US9928720

    申请日：1999-12-03

    Applicant: MASSACHUSETTS INST TECHNOLOGY

    Inventor： BURKE BARRY E ,  SAVOYE EUGENE D

    IPC: H01L27/148 ,  H01L21/339

    CPC classification number: H01L27/14887

    Abstract: Provided is a blooming control structure for an imager and a corresponding fabrication method. The structure is produced in a semiconductor substrate in which is configured an electrical charge collection region. The electrical charge collection region is configured to accumulate electrical charge that is photogenerated in the substrate, up to a characteristic charge collection capacity. A blooming drain region is configured in the substrate laterally spaced from the charge collection region. The blooming drain region includes an extended path of a conductivity type and level that are selected for conducting charge in excess of the characteristic charge collection capacity away from the charge collection region. A blooming barrier region is configured in the substrate to be adjacent to and laterally spacing the charge collection and blooming drain regions by a blooming barrier width. This barrier width corresponds to an acute blooming barrier impurity implantation angle with the substrate. The blooming barrier region is of a conductivity type and level that is selected based on the blooming barrier width to produce a corresponding electrical potential barrier between the charge collection and blooming drain regions. This blooming control structure, and particularly the blooming barrier regions of the structure, are very precisely defined by the selected acute blooming barrier impurity implantation angle, and optionally in addition by a rotation of the blooming barrier impurity implantation, as well as a non-vertical sidewall profile of the impurity implantation masking layer.

    Abstract translation: 提供了一种用于成像器的模糊控制结构及相应的制造方法。 该结构在其中配置有电荷收集区的半导体衬底中产生。 电荷收集区被配置为累积在衬底中光生成的电荷，直到特征电荷收集能力。 在基底中配置了与电荷收集区横向隔开的起霜漏极区。 开口漏极区域包括导电类型和电平的延伸路径，所述延伸路径被选择用于使电荷超过远离电荷收集区域的特征电荷收集能力。 在衬底中配置有隆起阻挡区域，使其与电荷收集和隆起漏极区域相邻并横向间隔开一个隆起阻挡宽度。 该势垒宽度对应于与衬底的急剧起霜势垒杂质注入角度。 该起霜势垒区具有基于起辉势垒宽度选择的导电类型和电平，以在电荷收集和起晕漏极区之间产生相应的电位势垒。 这种起霜控制结构，特别是结构的起霜阻挡区非常精确地由选择的急剧起霜阻挡层杂质注入角度，以及可选地另外通过旋转喷溅阻挡层杂质注入以及非垂直 杂质注入掩模层的侧壁轮廓。

    ELECTRONIC SHUTTER WITH PHOTOGENERATED CHARGE EXTINGUISHMENT CAPABILITY FOR BACK-ILLUMINATED IMAGE SENSORS
    4.
    发明申请
    ELECTRONIC SHUTTER WITH PHOTOGENERATED CHARGE EXTINGUISHMENT CAPABILITY FOR BACK-ILLUMINATED IMAGE SENSORS 审中-公开
    具有光电照相曝光功能的电子快门用于背照式图像传感器

    公开(公告)号：WO2011031810A3

    公开(公告)日：2011-05-19

    申请号：PCT/US2010048192

    申请日：2010-09-09

    Applicant: MASSACHUSETTS INST TECHNOLOGY ,  BURKE BARRY E

    Inventor： BURKE BARRY E

    IPC: H01L27/146 ,  H01L27/148

    CPC classification number: H01L27/14812 ,  H01L27/14868

    Abstract: An electronic image sensor includes a semiconductor substrate having a first surface configured for accepting illumination to a pixel array disposed in the substrate. An electrically-doped channel region for each pixel is disposed at a second substrate surface opposite the first substrate surface. The channel regions are for collecting photogenerated charge in the substrate. An electrically-doped channel stop region is at the second substrate surface between each channel region. An electrically-doped shutter buried layer, disposed in the substrate at a depth from the second substrate surface that is greater than that of the pixel channel regions, extends across the pixel array. An electrically-doped photogenerated- charge- extinguishment layer, at the first substrate surface, extends across the pixel array. A substrate bulk region between the shutter buried layer and the photogenerated-charge- extinguishment layer is characterized by an electrical resistivity enabling independent electrical bias of the photogenerated- charge- extinguishment layer from electrically- doped regions of the substrate.

    Abstract translation: 电子图像传感器包括具有被配置为接受照射到设置在基板中的像素阵列的照明的第一表面的半导体基板。 用于每个像素的电掺杂沟道区域设置在与第一衬底表面相对的第二衬底表面处。 通道区域用于在基板中收集光生电荷。 电掺杂沟道阻挡区位于每个沟道区之间的第二衬底表面。 在第二衬底表面的深度处设置在衬底中的电子掺杂快门掩埋层大于像素沟道区的深度延伸穿过像素阵列。 在第一衬底表面处的电掺杂的光生电荷 - 消光层延伸穿过像素阵列。 快门掩埋层和光生电荷 - 消光层之间的衬底主体区域的特征在于电阻率使得光生电荷 - 灭弧层与衬底的电掺杂区域具有独立的电偏压。

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