公开(公告)号：WO2022094131A1

公开(公告)日：2022-05-05

申请号：PCT/US2021/057121

申请日：2021-10-28

Applicant: MICRON TECHNOLOGY, INC.

Inventor： NOWELL, Shane ,  SHEPEREK, Michael ,  KOUDELE, Larry, J. ,  LIIKANEN, Bruce, A. ,  KIENTZ, Steven, Michael

IPC: G06F12/02 ,  G06F3/06 ,  G06F12/10

Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to open a first block family associated with the memory device; assign a first cursor of a plurality of cursors of the memory device to the first block family; responsive to programming a first block associated with the first cursor, associate the first block with the first block family; open, while the first block family is open, a second block family associated with the memory device; assign a second cursor of the plurality of cursors of the memory device to the second block family; and responsive to programming a second block associated with the second cursor, associate the second block with the second block family.

公开(公告)号：WO2020092098A1

公开(公告)日：2020-05-07

申请号：PCT/US2019/057709

申请日：2019-10-23

Applicant: MICRON TECHNOLOGY, INC.

Inventor： MUCHHERLA, Kishore Kumar ,  MALSHE, Ashutosh ,  SINGIDI, Harish R. ,  NOWELL, Shane ,  RAYAPROLU, Vamsi Pavan ,  RATNAM, Sampath K.

IPC: G11C16/34

Abstract: A processing device in a memory system determines that a first read count of a first data block on a first plane of a memory component satisfies a first threshold criterion. The processing device further determines whether a second read count of a second data block on a second plane of the memory component satisfies a second threshold criterion, wherein the second block is associated with the first block, and wherein the second threshold criterion is lower than the first threshold criterion. Responsive to the second read count satisfying the second threshold criterion, the processing device performs a multi-plane scan to determine a first error rate for the first data block and a second error rate for the second data block in parallel.

公开(公告)号：WO2019173534A1

公开(公告)日：2019-09-12

申请号：PCT/US2019/021039

申请日：2019-03-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： KAYNAK, Mustafa N. ,  RATNAM, Sampath K. ,  LOH, Zixiang ,  RAO, Nagendra Prasad Ganesh ,  KOUDELE, Larry J. ,  RAYAPROLU, Vamsi Pavan ,  KHAYAT, Patrick R. ,  NOWELL, Shane

IPC: G11C7/04 ,  G11C16/10 ,  G06F11/10 ,  G06F3/06

Abstract: A temperature related to a memory device is identified. It is determined whether the temperature related to the memory device satisfies a threshold temperature condition. Responsive to detecting that the temperature related to the memory device satisfies the threshold temperature condition, a parameter for a programming operation is adjusted from a first value to a second value to store data at the memory device.

公开(公告)号：WO2019157216A1

公开(公告)日：2019-08-15

申请号：PCT/US2019/017104

申请日：2019-02-07

Applicant: MICRON TECHNOLOGY, INC.

Inventor： RATNAM, Sampath K. ,  RAYAPROLU, Vamsi Pavan ,  KAYNAK, Mustafa N. ,  FEELEY, Peter ,  MUCHHERLA, Kishore Kumar ,  PADILLA, Renato C. ,  NOWELL, Shane

IPC: G11C7/04 ,  G11C16/08 ,  G06F11/00

Abstract: A temperature associated with the memory component is determined. A frequency to perform an operation on a memory cell associated with the memory component is determined based on the temperature associated with the memory component. The operation is performed on the memory cell at the determined frequency to transition the memory cell from a state associated with an increased error rate for data stored at the memory cell to another state associated with a decreased error rate for the data stored at the memory cell.

公开(公告)号：WO2020046970A1

公开(公告)日：2020-03-05

申请号：PCT/US2019/048383

申请日：2019-08-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： NOWELL, Shane ,  RATNAM, Sampath K. ,  RAYAPROLU, Vamsi Pavan

IPC: G11C7/04 ,  G06F3/06

Abstract: A processing device in a memory system receives a data access request identifying a memory cell in a first segment of the memory system comprising at least a portion of at least one memory device. The processing device determines a temperature difference between a current temperature associated with the memory cell and a baseline temperature of the memory system and identifies a temperature compensation value specific to the first segment of the memory system, the temperature compensation value corresponding to the temperature difference. The processing device adjusts, based on an amount represented by the temperature compensation value, an access control voltage applied to the memory cell.

公开(公告)号：WO2019157369A1

公开(公告)日：2019-08-15

申请号：PCT/US2019/017333

申请日：2019-02-08

Applicant: MICRON TECHNOLOGY, INC.

Inventor： RATNAM, Sampath K. ,  RAYAPROLU, Vamsi Pavan ,  KAYNAK, Mustafa N. ,  PARTHASARATHY, Sivagnanam ,  MUCHHERLA, Kishore Kumar ,  NOWELL, Shane ,  FEELEY, Peter ,  LIN, Qisong

IPC: G06F11/16 ,  G06F3/06

Abstract: At least one data of a set of data stored at a memory cell of a memory component is determined to be associated with an unsuccessful error correction operation. A determination is made as to whether a programming operation associated with the set of data stored at the memory cell has completed. The at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation is recovered in response to determining that the programming operation has completed. Another memory cell of the memory component is identified in response to recovering the at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation. The set of data including the recovered at least one data i s provided to the other memory cell of the memory component.

公开(公告)号：WO2019156909A1

公开(公告)日：2019-08-15

申请号：PCT/US2019/016421

申请日：2019-02-01

Applicant: MICRON TECHNOLOGY, INC.

Inventor： MUCHHERLA, Kishore Kumar ,  RAYAPROLU, Vamsi Pavan ,  FEELEY, Peter ,  RATNAM, Sampath K. ,  PARTHASARATHY, Sivagnanam ,  LIN, Qisong ,  NOWELL, Shane ,  KAYNAK, Mustafa N.

IPC: G11C29/52 ,  G11C29/02 ,  G06F11/10

Abstract: A number of operations that have been performed on one or more memory cells that are proximate to a particular memory cell of the memory component can be identified. A determination as to whether the particular memory cell has transitioned from a state associated with a decreased error rate to another state associated with an increased error rate can be made based on the identified number of operations. In response to determining that the particular memory cell has transitioned from the state associated with the decreased error rate to the another state associated with the increased error rate, an operation can be performed on the particular memory cell to transition the particular memory cell from the another state associated with the increased error rate to the state associated with the decreased error rate.

公开(公告)号：WO2021127298A1

公开(公告)日：2021-06-24

申请号：PCT/US2020/065781

申请日：2020-12-18

Applicant: MICRON TECHNOLOGY, INC.

Inventor： SHEPEREK, Michael ,  MUCHHERLA, Kishore Kumar ,  KAYNAK, Mustafa N. ,  RAYAPROLU, Vamsi Pavan ,  LIIKANEN, Bruce A. ,  FEELEY, Peter ,  KOUDELE, Larry J. ,  NOWELL, Shane ,  KIENTZ, Steven Michael

IPC: G11C16/10 ,  G11C7/04 ,  G11C7/02 ,  G11C7/10 ,  G06F3/06 ,  G06F12/10 ,  G06F2212/1041 ,  G06F3/0604 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0673 ,  G11C16/0483 ,  G11C16/26

Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.

公开(公告)号：WO2020051364A1

公开(公告)日：2020-03-12

申请号：PCT/US2019/049798

申请日：2019-09-05

Applicant: MICRON TECHNOLOGY, INC.

Inventor： NOWELL, Shane ,  PARTHASARATHY, Sivagnanam

IPC: G11C7/04 ,  G06F3/06

Abstract: An operating temperature of a memory sub-system is identified. It is determined that the identified operating temperature satisfies a first temperature condition. Upon determining that the identified operating temperature satisfies the first temperature condition, operations are performed at the memory sub-system until the operating temperature changes to satisfy a second temperature condition.