公开(公告)号：WO2014070926A1

公开(公告)日：2014-05-08

申请号：PCT/US2013/067568

申请日：2013-10-30

Applicant: QUALCOMM INCORPORATED

Inventor： SUN, Yangyang ,  ZHAO, Lily ,  HAN, Michael

IPC: H01L23/485 ,  H01L21/60

CPC classification number: H01L29/43 ,  B81B2207/093 ,  B81C1/00269 ,  B81C2203/019 ,  H01L21/768 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L29/84 ,  H01L2224/02166 ,  H01L2224/03019 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/10126 ,  H01L2224/11019 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/1182 ,  H01L2224/1183 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13138 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13163 ,  H01L2224/13565 ,  H01L2224/13687 ,  H01L2224/13688 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/05442 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/181 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/01034 ,  H01L2924/0109 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A conductive interconnect (340, 440, 540, 640) includes a conductive support layer (330, 430, 530, 630), a conductive material (320, 520, 620) on the conductive support layer (330, 430, 530, 630) and an inorganic collar (350, 450, 550, 650) partially surrounding the conductive material (320, 520, 620). The inorganic collar (350, 450, 550, 650) is also disposed on sidewalls of the conductive support layer (330, 430, 530, 630). A method of fabricating the conductive interconnect (340, 440, 540, 640) comprises fabricating a conductive material (320, 520, 620) on a seed layer (304, 504), forming an organic collar (310, 510) to partially surround the conductive material (320, 520, 620), etching the conductive seed layer (304, 504) to form the conductive support layer (330, 430, 530, 630) and heating to transition the organic collar (310, 510) into the inorganic collar (350, 450, 550, 650) that partially surrounds the conductive material (320, 520, 620) and is disposed on sidewalls of the conductive support layer (330, 430, 530, 630). The organic collar (310, 510) may be formed by depositing a photosensitive spin on dielectric material on the conductive material (320, 520, 620) and patterning the photosensitive spin on dielectric material. The conductive material (620) may be a single conductive material (320) or may comprise a stack of a first conductive layer (322) and a second conductive layer (324), separated by a barrier layer, in which case the heating step also causes a reflow of the second conductive layer (324) of the conductive material stack.

Abstract translation: 导电互连（340,440,540,640）包括导电支撑层（330,430,530,630），导电支撑层（330,430,530,630）上的导电材料（320,520,620） ）和部分地围绕导电材料（320,520,620）的无机套环（350,450,550,650）。 无机套环（350,450,550,650）也设置在导电支撑层（330,430,530,630）的侧壁上。 制造导电互连（340,440,540,640）的方法包括在种子层（304,504）上制造导电材料（320,520,620），形成有机套环（310,510）以部分地包围 所述导电材料（320,520,620）蚀刻所述导电种子层（304,504）以形成所述导电支撑层（330,430,530,630）并加热以将所述有机套环（310,510）转变成所述导电材料层 部分地围绕导电材料（320,520,620）并且设置在导电支撑层（330,430,530,630）的侧壁上的无机套环（350,450,550,650）。 可以通过在导电材料（320,520,620）上沉积介电材料上的光敏自旋并使电介质材料上的感光纺丝图案来形成有机套环（310,510）。 导电材料（620）可以是单个导电材料（320），或者可以包括由阻挡层隔开的第一导电层（322）和第二导电层（324）的堆叠，在这种情况下，加热步骤也 导致导电材料堆叠的第二导电层（324）的回流。

公开(公告)号：WO2014011612A2

公开(公告)日：2014-01-16

申请号：PCT/US2013/049682

申请日：2013-07-09

Applicant: QUALCOMM INCORPORATED

Inventor： BAO, Zhongping ,  ZHAO, Lily ,  HAN, Michael

IPC: H01L23/485

CPC classification number: H01L24/14 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05541 ,  H01L2224/05552 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/06051 ,  H01L2224/06131 ,  H01L2224/06133 ,  H01L2224/06141 ,  H01L2224/06145 ,  H01L2224/06517 ,  H01L2224/13006 ,  H01L2224/13012 ,  H01L2224/13015 ,  H01L2224/13022 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/14145 ,  H01L2224/811 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2924/3512 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/2064

Abstract: Some exemplary embodiments of this disclosure pertain to a semiconductor package that includes a packaging substrate, a die and a set of under bump metallization (UBM) structures coupled to the packaging substrate and the die. Each UBM structure has a non-circular cross-section along its respective lateral dimension. Each UBM structure includes a first narrower portion and a second wider portion. The first narrower portion has a first width. The second wider portion has a second width that is greater than the first width. Each UBM structure is oriented towards a particular region of the die such that the first narrower portion of the UBM structure is closer than the second wider portion of the UBM structure to the particular region of the die.

Abstract translation: 本公开的一些示例性实施例涉及一种半导体封装，其包括封装衬底，管芯和耦合到封装衬底和管芯的一组凸底下金属化（UBM）结构。 每个UBM结构沿其各自的横向尺寸具有非圆形横截面。 每个UBM结构包括第一较窄部分和第二较宽部分。 第一较窄部分具有第一宽度。 第二较宽部分具有大于第一宽度的第二宽度。 每个UBM结构朝向管芯的特定区域定向，使得UBM结构的第一较窄部分比UBM结构的第二较宽部分更靠近管芯的特定区域。