公开(公告)号：WO0205428A2

公开(公告)日：2002-01-17

申请号：PCT/US0121644

申请日：2001-07-10

Applicant: SILICON LAB INC

Inventor： PERROTT MICHAEL H ,  BAIRD REX T

IPC: H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/095 ,  H04L7/00 ,  H04L7/033 ,  H03L

CPC classification number: H04L7/033 ,  H03L7/085 ,  H03L7/087 ,  H03L7/091 ,  H03L7/093 ,  H03L7/095 ,  H04L7/0004

Abstract: In a feedback system such as a PLL, the integrating function associated with a loop filter capacitor is instead implemented digitally and is easily implemented on the same integrated circuit die as the PLL. In a preferred embodiment, an analog phase detector is utilized whose phase error output signal is delta-sigma modulated to encode the magnitude of the phase error using a digital (i.e., discrete-time and discrete-value) signal. This digital phase error signal is "integrated" by a digital integration block including, for example, a digital accumulator, whose output is then converted to an analog signal, optionally combined with a loop feed-forward signal, and then conveyed as a control voltage to the voltage-controlled oscillator. The equivalent "size" of the integrating capacitor function provided by the digital integration block may be varied by increasing or decreasing the bit resolution of circuits within the digital block.

Abstract translation: 在诸如PLL的反馈系统中，与环路滤波电容器相关联的积分功能被数字地实现，并且容易在与PLL相同的集成电路管芯上实现。 在一个优选实施例中，利用模拟相位检测器，其相位误差输出信号被ΔΣ调制以使用数字（即，离散时间和离散值）信号来编码相位误差的量值。 该数字相位误差信号由包括例如数字累加器的数字积分模块“集成”，该数字累加器的输出然后被转换为模拟信号，可选地与环路前馈信号组合，然后作为控制电压 到压控振荡器。 由数字积分模块提供的积分电容器功能的等效“尺寸”可以通过增加或减少数字模块内的电路的位分辨率来改变。