公开(公告)号：WO2004036654A3

公开(公告)日：2004-07-01

申请号：PCT/US0332649

申请日：2003-10-15

Applicant: SILICON LAB INC

Inventor： WEI DERRICK C ,  SHI YING ,  SMITH KEVIN G ,  PROFFITT STEVEN P ,  THOMSEN AXEL ,  PIETRUSZYNSKI DAVID M ,  ZHANG LIGANG

IPC: H01L23/552 ,  H01L23/64 ,  H01L23/498 ,  H01L23/522

CPC classification number: H01L23/552 ,  H01F2017/008 ,  H01L23/645 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/3025 ,  H01L2224/0401

Abstract: An electromagnetically-shielded high-Q inductor may be fabricated within a multi-layer package substrate (MLS). The inductor is preferably constructed as a loop structure on a layer of the MLS, and a shielding structure is formedaround the inductor to substantially enclose the inductor in a Faraday cage-like enclosure. The shielding structure includes a top plate formed above the inductor on another layer of the MLS, and a bottom plate formed on yet another layer of the MLS or on a layer of an integrated circuit die which is below and attached to the MLS, preferably using solder bumps. Shielding structure sidewalls may be formed by a ring of stacked vias or via channels. The inductor is preferably connected to stacked vias which provide a connection to the underlying integrated circuit die by way of additional solder bumps and cut-outs through the bottom plate of the shielding structure.

Abstract translation: 可以在多层封装衬底（MLS）内制造电磁屏蔽的高Q电感器。 电感器优选构造为MLS层上的环路结构，并且围绕电感器形成屏蔽结构，以将电感器基本上包围在法拉第笼状壳体中。 屏蔽结构包括在MLS的另一层上形成在电感器上方的顶板，以及形成在MLS的另一层上的底板或集成电路管芯的下面并连接到MLS上的层，优选地使用 焊锡凸块 屏蔽结构侧壁可以由堆叠的通孔环或通孔形成。 电感器优选地连接到堆叠的通孔，其通过附加的焊料凸块和穿过屏蔽结构的底板的切口提供到下面的集成电路管芯的连接。