公开(公告)号：WO2008054987A2

公开(公告)日：2008-05-08

申请号：PCT/US2007/081434

申请日：2007-10-15

Applicant: TRELLISWARE TECHNOLOGIES, INC. ,  DIMOU, Georgios, D.

Inventor： DIMOU, Georgios, D.

IPC: G06F11/08

CPC classification number: G06F11/1044

Abstract: Embodiments of the present invention provide Forward Error Correcting Code encoders and decoder structures that use DRAM in their memory designs. DRAM is a very attractive memory options in many electronic systems due to the high memory density provided by DRAM. However, the DRAM is typically not included in ASIC or FPGA implementations of encoders and decoders due to complex refresh requirements of DRAM that are required to maintain data stored in DRAM and may interfere with user access to the memory space during refresh cycles. Embodiments of the present invention provide FECC encoder and decoder structures that are implemented using DRAM that do not require complex refresh operations to be performed on the DRAM to ensure data integrity. Accordingly, embodiments of the present invention maximize memory density without the added complexity of introduced by the refresh requirements of DRAM.

Abstract translation: 本发明的实施例提供在其存储器设计中使用DRAM的前向纠错码编码器和解码器结构。 由于DRAM提供的高存储密度，DRAM在许多电子系统中是非常有吸引力的存储选择。 然而，DRAM通常不包含在编码器和解码器的ASIC或FPGA实现中，这是由于维持DRAM中存储的数据所需的DRAM的复杂刷新要求，并且可能干扰刷新周期期间用户对存储器空间的访问。 本发明的实施例提供使用DRAM实现的FECC编码器和解码器结构，其不需要在DRAM上执行复杂的刷新操作以确保数据完整性。 因此，本发明的实施例最大化了存储密度，而没有由DRAM的刷新需求引入的额外复杂性。

公开(公告)号：WO2005079507A3

公开(公告)日：2008-01-24

申请号：PCT/US2005005321

申请日：2005-02-17

Applicant: TRELLISWARE TECHNOLOGIES INC ,  CHUGG KEITH MICHAEL ,  GRAY PAUL KINGSLEY ,  DIMOU GEORGIOS DIMITRIOS ,  THIENNVIBOON PHUNSAK

Inventor： CHUGG KEITH MICHAEL ,  GRAY PAUL KINGSLEY ,  DIMOU GEORGIOS DIMITRIOS ,  THIENNVIBOON PHUNSAK

IPC: H03M13/03 ,  H03M13/00 ,  H03M13/25 ,  H03M13/29 ,  H04L1/00

CPC classification number: H04L1/0041 ,  H03M13/09 ,  H03M13/25 ,  H03M13/2903 ,  H03M13/2909 ,  H03M13/2939 ,  H03M13/2957 ,  H03M13/2972 ,  H03M13/2981 ,  H03M13/45 ,  H04L1/0066

Abstract: The present invention relates to methods, apparatuses, and systems For performing data encoding involving encoding data bits, according to an outer convolutional (804) code to produce outer encoded bits processing the outer encoded bits using an interleaver (808) and a logical unit (812) to produce intermediate bits, wherein the logical unit (812) receives a first number of input bits and produces a second number of corresponding output bits, the second number being less than the first number, and wherein the logical unit (812) takes each of the first number of input bits into account in producing the second number of output bits, encoding the intermediate bits according to an inner convolutional code (806) to produce inner encoded bits, wherein the inner con\ olutional code is characterized by at least two states, and combining the data bits and the inner encoded bits to produce encoded outputs.

Abstract translation: 本发明涉及方法，装置和系统为了执行根据外部卷积码（804）码来编码数据比特的数据编码，以产生使用交织器（808）和逻辑单元（808）处理外部编码比特的外部编码比特 812）以产生中间比特，其中所述逻辑单元（812）接收第一数量的输入比特并产生第二数量的对应的输出比特，所述第二数小于所述第一数，并且其中所述逻辑单元（812）取 在产生第二数量的输出比特时考虑第一数量的输入比特中的每一个，根据内部卷积码（806）对中间比特进行编码以产生内部编码比特，其中内部对应码的特征在于至少 两个状态，并组合数据位和内部编码位以产生编码输出。

公开(公告)号：WO2021096846A1

公开(公告)日：2021-05-20

申请号：PCT/US2020/059812

申请日：2020-11-10

Applicant: TRELLISWARE TECHNOLOGIES, INC.

Inventor： KÖSE, Cenk

IPC: H04W84/18 ,  H04W40/12

Abstract: Devices, systems and methods for providing network-enabled connectivity for disadvantaged communication links in wireless networks are described. One example method for enabling connectivity over a disadvantaged link includes receiving, by a first node of a plurality of nodes from a source node in the first frequency band in a first timeslot, a first signal comprising a message, receiving, by the first node from at least a second node in a second frequency band in a second timeslot, a second signal that is used to generate a first reliability metric corresponding to the message, and performing, based on a plurality of reliability metrics corresponding to the message and the first reliability metric, a processing operation on the message, the first frequency band being non-overlapping with the second frequency band, and a duration of the first timeslot being greater than a duration of the second timeslot.

公开(公告)号：WO2018067278A2

公开(公告)日：2018-04-12

申请号：PCT/US2017/051111

申请日：2017-09-12

Applicant: TRELLISWARE TECHNOLOGIES, INC.

Inventor： JOHNSON, Mark

IPC: H04L1/18 ,  H04L12/26

Abstract: Methods and systems for reliable broadcasting that use re-transmissions, in a multi-hop, time-slotted wireless network, is presented. The methods and systems evaluate the trade-off between power consumption and communication reliability, and are consequently able to provide increasing degrees of robustness for broadcasts in the wireless network. Embodiments of the present invention are able to incrementally use re-transmissions, therein trading-off battery life for an increased message completion rate or a lower packet error rate, for example, in order to reliably broadcast critical or high-priority message network-wide.

Abstract translation: 提出了在多跳时隙无线网络中使用重传的可靠广播的方法和系统。 这些方法和系统评估功耗和通信可靠性之间的折衷，并因此能够为无线网络中的广播提供增加程度的稳健性。 本发明的实施例能够增量地使用重传，其中例如为了增加的消息完成率或较低的分组错误率而折衷电池寿命，以便可靠地广播全网络中的关键或高优先级消息

公开(公告)号：WO2017136682A1

公开(公告)日：2017-08-10

申请号：PCT/US2017/016444

申请日：2017-02-03

Applicant: TRELLISWARE TECHNOLOGIES, INC.

Inventor： URIE, Marcus T. ,  MCCOURT, Ryan P. ,  KOSE, Cenk ,  CHUGG, Keith M.

IPC: H04W36/30 ,  H04B1/38 ,  H04B10/25

CPC classification number: H04L25/0204 ,  H04B1/38 ,  H04B10/112 ,  H04B10/25 ,  H04B10/2575 ,  H04L25/03057 ,  H04L25/03165 ,  H04L25/03171

Abstract: A method and system for maximizing throughput and minimizing latency in a communication system that supports heterogeneous links is presented. The communication system supports a wireless link and an alternate link, and the method and system leverage the alternate link to reduce the overhead transmitted over the wireless link, thereby increasing throughput and reducing end-to-end latency. The higher latency alternate link provides a delayed version of an information signal that corresponds to a portion of the information signal that is transmitted on the wireless link. The received samples from the wireless and alternate links may be used to equalize subsequent portions of the information signal received over the wireless link, and may also be used for synchronization, timing recovery and frequency-offset estimation.

Abstract translation: 提出了一种用于最大化吞吐量并使支持异构链路的通信系统中的等待时间最小化的方法和系统。 通信系统支持无线链路和备用链路，并且该方法和系统利用备用链路来减少通过无线链路传输的开销，由此增加吞吐量并减少端到端延迟。 较高等待时间的替换链路提供对应于在无线链路上传输的信息信号的一部分的信息信号的延迟版本。 从无线和备用链路接收到的样本可以用于均衡通过无线链路接收到的信息信号的后续部分，并且还可以用于同步，定时恢复和频率偏移估计。

公开(公告)号：WO2022271927A1

公开(公告)日：2022-12-29

申请号：PCT/US2022/034688

申请日：2022-06-23

Applicant: TRELLISWARE TECHNOLOGIES, INC.

Inventor： ZHU, Hua ,  KÖSE, Cenk

IPC: H04W72/04 ,  H04B7/026

Abstract: Methods, systems, and devices for dynamic spectrum access in a single-channel MANET are described. An example system for network management includes a first wireless device configured to perform, using a receive mode and a transmit mode, data communications on a first channel associated with a first single-channel network, and transmit, using the transmit mode, network advertisement messages on a second channel associated with a second single-channel network, wherein each of the network advertisement messages comprises one or more characteristics of the first single-channel network, and a second wireless device configured to perform, using the receive mode and the transmit mode, data communications on the second channel, acquire, using the receive mode, at least one network advertisement message of the network advertisement messages on the second channel, and perform, based on the at least one network advertisement message, a comparison between the first single-channel network and the second single-channel network.

公开(公告)号：WO2022236129A1

公开(公告)日：2022-11-10

申请号：PCT/US2022/028180

申请日：2022-05-06

Applicant: TRELLISWARE TECHNOLOGIES, INC.

Inventor： KÖSE, Cenk ,  YOON, Young ,  SALLAWAY, Peter James ,  COY, Bruce ,  ENSERINK, Scott W. ,  POLYDOROS, Andreas

IPC: H04L12/26 ,  H04B7/04 ,  H04W84/18 ,  H04W16/28

Abstract: Devices, systems and methods for collaborative wireless communication in a wireless network are described. One example method includes performing a bidirectional communication with a reference node in the source cluster, receiving, from a destination cluster comprising a second plurality of nodes, a probe generated using a phase associated with the destination cluster, estimating, based on a propagation delay of the probe, a delay parameter, generating, based on the phase associated with the destination cluster and the delay parameter, a channel estimate, and transmitting, to each of the second plurality of nodes, a common message generated using a phase value and a delay value, wherein the phase value and the delay value are derived based on the channel estimate, and wherein the destination cluster is remotely located from the source cluster.

公开(公告)号：WO2022076104A2

公开(公告)日：2022-04-14

申请号：PCT/US2021/048031

申请日：2021-08-27

Applicant: TRELLISWARE TECHNOLOGIES, INC.

Inventor： SALLAWAY, Peter James ,  COY, Bruce ,  KÖSE, Cenk

IPC: H04B1/7097 ,  H04B1/62 ,  H04B1/10

Abstract: Methods, systems and devices for interference cancellation of high-power input signals in the analog domain are described. An example method of interference cancellation includes receiving, via an antenna, an analog signal comprising a signal of interest and one or more interfering signals, wherein the one or more interfering signals comprises a high-power interfering signal with a signal power greater than 15 dBm, determining, based on a reference signal corresponding to the high-power interfering signal, an update to at least one parameter of the reference signal, wherein the update is determined by minimizing a cost function of a difference between the reference signal and the high-power interfering signal, generating, based on the update to the at least one parameter, a modified reference signal, and generating, based on coupling the modified reference signal to the analog signal, an interference-canceled signal comprising the signal of interest.

公开(公告)号：WO2017147255A1

公开(公告)日：2017-08-31

申请号：PCT/US2017/019065

申请日：2017-02-23

Applicant: TRELLISWARE TECHNOLOGIES, INC.

Inventor： KOSE, Cenk ,  CHUGG, Keith, M.

IPC: H04B1/10 ,  H04B1/7097 ,  H04B1/712 ,  H04B1/715

CPC classification number: H04B1/715 ,  H04B1/10 ,  H04B2001/7152 ,  H04B2201/71353 ,  H04L25/03853

Abstract: The estimation and mitigation of swept-tone interferers includes receiving a composite signal comprising a signal of interest and a swept-tone interferer over an observation bandwidth or a hop bandwidth in a frequency -hopping system. The estimation of the interfering signal may be based on modeling the interferer as a magnitude periodic signal comprising non-overlapping, contiguous epochs, where each epoch may comprise a common pulse shape and a distinct phase rotation. The modeling may be based over the observation bandwidth, the hop bandwidth, or after combining the signal over all the frequency hop bandwidths. The period of the magnitude-periodic signal may be initially determined, and the common pulse shape and each of the distinct phase rotations may then be estimated. These estimates may be used to reconstruct an estimate of the swept-tone interferer, which may be subtracted from the composite signal to generate an interference-mitigated signal of interest.

Abstract translation: 扫频音干扰信号的估计和减轻包括在频率跳跃系统中的观测带宽或跳频带宽上接收包括感兴趣信号和扫频干扰信号的复合信号。 干扰信号的估计可以基于将干扰信号建模为包括非重叠邻接历元的幅度周期信号，其中每个历元可包括共同的脉冲形状和不同的相位旋转。 建模可以基于观测带宽，跳频带宽，或者在将信号组合在所有跳频带宽之后。 幅度周期性信号的周期可以初始确定，然后可以估计公共脉冲形状和每个不同的相位旋转。 这些估计值可以用于重构扫频干扰信号的估计值，该信号可以从复合信号中减去以产生一个干扰减轻的感兴趣信号。

公开(公告)号：WO2008048944A2

公开(公告)日：2008-04-24

申请号：PCT/US2007081436

申请日：2007-10-15

Applicant: TRELLISWARE TECHNOLOGIES INC ,  DIMOU GEORGIOS D

Inventor： DIMOU GEORGIOS D

IPC: G11C29/00

CPC classification number: G06F11/1044

Abstract: SAM is a very attractive memory option for systems due to its higher speed and reduced area when compared to RAM. However it is generally not used in implementations of FECCs due to its limitation to sequential accesses. According to the present invention, Forward Error Correcting Code encoder and decoder structures are shown to allow the use of SAM in their memory designs. Thus SAM is utilized in FECC implementations to achieve better area efficiency for the same amount of memory as well as higher throughput for the hardware implementations.

Abstract translation: 与RAM相比，SAM对于系统来说是一个非常有吸引力的内存选​​项，因为它具有更高的速度和更小的面积。 但是由于其对顺序访问的限制，通常不用于FECC的实现。 根据本发明，前向纠错码编码器和解码器结构被示出为允许在其存储器设计中使用SAM。 因此，在FECC实施中使用SAM以实现相同数量的存储器的更好的面积效率以及硬件实现的更高吞吐量。