電力増幅回路
    1.
    发明申请
    電力増幅回路 审中-公开

    公开(公告)号:WO2023090202A1

    公开(公告)日:2023-05-25

    申请号:PCT/JP2022/041524

    申请日:2022-11-08

    Abstract: 電力増幅回路(10A)は、電力増幅器(12)(キャリアアンプ)と、電力増幅器(13)(ピークアンプ)と、外部出力端子(101)と、電力増幅器(12)の出力端に接続される入力端子(201)、電力増幅器(13)の出力端に接続される入力端子(202)、及び、外部出力端子(101)に接続される出力端子(203)を含む合成器(20)と、電力増幅器(12)に直流バイアス電流(i2)を供給するバイアス回路(32)と、電力増幅器(13)に直流バイアス電流(i3)を供給するバイアス回路(33)と、電力増幅器(13)及びバイアス回路(33)の間に接続され、電力増幅回路(10A)に印加される電源電圧(VET)の大きさに応じて直流バイアス電流(i3)の大きさを変化させる電流制限回路(34)と、を備える。

    基板匹配电路、射频功率放大器及射频芯片

    公开(公告)号:WO2023088002A1

    公开(公告)日:2023-05-25

    申请号:PCT/CN2022/125448

    申请日:2022-10-14

    Inventor: 于卫东 郭嘉帅

    Abstract: 本实用新型提供了一种基板匹配电路,包括发射匹配电路、分别与发射匹配电路连接的第一接收匹配电路和第二接收匹配电路,其中,第一接收匹配电路适配功率放大信号发射端与第一接收信号端的隔离度;第二接收匹配电路适配功率放大信号发射端与第二接收信号端的隔离度,且功率放大信号发射信号经基板在滤波的同时增强功率放大信号与接收信号隔离度,使信号在发射与接收时在基板匹配电路中滤波效果、损耗、隔离度达到一个平衡,可靠性更优。本实用新型还提供一种射频功率放大器及射频芯片。与相关技术相比,本实用新型的基板匹配电路、射频功率放大器及射频芯片传输适配性好,体积小,生产成本低。

    METHODS OF NONLINEARITY ESTIMATION, REPORTING, AND COMPENSATION

    公开(公告)号:WO2023083453A1

    公开(公告)日:2023-05-19

    申请号:PCT/EP2021/081382

    申请日:2021-11-11

    Abstract: In one aspect, a method performed by a transmitter in a first device for signaling a nonlinearity profile of distortion of transmissions in a communications network is provided. The method includes generating an amplitude tracking reference signal (ATRS), wherein the ATRS comprises information indicating a nonlinearity profile of distortions of transmissions by the transmitter, and transmitting the generated ATRS towards a second device. In another aspect, a method performed by a receiver in a second device for identifying a nonlinearity profile of distortion of transmissions in a communications network by a transmitter in a first device is provided. The method includes receiving an ATRS from the first device, wherein the ATRS comprises information indicating a nonlinearity profile of distortions of transmissions by the transmitter and identifying the nonlinearity profile of distortion of transmissions by the transmitter based on the ATRS.

    INTRA-SYMBOL VOLTAGE MODULATION IN A WIRELESS COMMUNICATION CIRCUIT

    公开(公告)号:WO2023081068A1

    公开(公告)日:2023-05-11

    申请号:PCT/US2022/048250

    申请日:2022-10-28

    Applicant: QORVO US, INC.

    Inventor: KHLAT, Nadim

    Abstract: Intra-symbol voltage modulation in a wireless communication circuit is disclosed. In a wireless communication circuit, a power amplifier circuit is configured to amplify a radio frequency (RF) signal based on a modulated voltage that tracks a time-variant input power of the RF signal. Herein, intra-symbol voltage modulation means that the modulated voltage can be adapted within a voltage modulation interval(s), such as an orthogonal frequency division multiplexing (OFDM) symbol duration. In embodiments disclosed herein, the voltage modulation interval(s) is divided into multiple voltage modulation subintervals and a respective voltage target is determined for each of the voltage modulation subintervals. Accordingly, the modulated voltage can be adapted in each of the voltage modulation subintervals according to the respective voltage target. By performing intra-symbol voltage modulation during the voltage modulation interval(s), the power amplifier circuit can operate with higher efficiency and prevent distortion (e.g., amplitude clipping) when amplifying the RF signal.

    COMPARATOR INTEGRATION TIME STABILIZATION TECHNIQUE UTILIZING COMMON MODE MITIGATION SCHEME

    公开(公告)号:WO2023080992A1

    公开(公告)日:2023-05-11

    申请号:PCT/US2022/046118

    申请日:2022-10-07

    Abstract: Aspects of the present disclosure provide a method for regulating an integration current (Im at node 122) of a sensing amplifier (110). The sensing amplifier (110) includes a first input transistor (120) and a second input transistor (125), wherein a source of the first input transistor and a source of the second input transistor are coupled to a source node (node 122). The method includes pulling a current (Is) from or sourcing the current to the source node (122), measuring (305) the integration current (Im), comparing (310) the measured integration current (node 312) with a reference signal (node 314), and adjusting (315) the current pulled from or sourced to the source node based on the comparison (signal 318).

    一种Doherty射频集成功率放大器
    7.
    发明申请

    公开(公告)号:WO2023078060A1

    公开(公告)日:2023-05-11

    申请号:PCT/CN2022/125436

    申请日:2022-10-14

    Abstract: 本发明提供一种Doherty射频集成功率放大器,包括驱动放大器、载波输入匹配网络、载波功放、峰值输入匹配网络、峰值功放及功率合成和移相网络;驱动放大器的输出端分两路分别连接载波输入匹配网络的输入端和峰值输入匹配网络的输入端;载波输入匹配网络的输出端连接至载波功放的输入端;载波功放的输出端连接至功率合成和移相网络的第一输入端;峰值输入匹配网络的输出端连接至峰值功放的输入端;峰值功放的输出端连接至功率合成和移相网络的第二输入端;功率合成和移相网络包括巴伦阻抗变压器、电容Cb1、电容Cb2、电容Cb3、电容Cb4及电容Cb5。本发明Doherty射频集成功率放大器的版图面积小且功率附加效率高。

    POWER TRACKING AT A RADIO FREQUENCY CHIP BASED ON A TWO-DIMENSIONAL DIGITAL PRE-DISTORTION CIRCUIT

    公开(公告)号:WO2023075773A1

    公开(公告)日:2023-05-04

    申请号:PCT/US2021/057001

    申请日:2021-10-28

    Applicant: ZEKU, INC.

    Inventor: GENG, Jifeng

    Abstract: According to one aspect of the present disclosure, a digital pre-distortion (DPD) engine of a radio frequency (RF) chip is disclosed. The DPD engine may include a control function circuit configured to estimate a controllable parameter associated with a PA based on a set of samples. The DPD engine may include a memoryless DPD circuit. The memoryless DPD circuit may include a first multiplier configured to apply a first scaling function to the set of samples to generate a first set of scaled samples. The memoryless DPD engine may include a DPD circuit configured to generate a first set of pre-distorted samples based on the controllable parameter and the first set of scaled samples. The first memoryless DPD circuit may include a second multiplier configured to apply a second scaling function to the first set of pre-distorted samples to generate a second set of scaled samples that are output.

    トラッカモジュール
    9.
    发明申请

    公开(公告)号:WO2023074254A1

    公开(公告)日:2023-05-04

    申请号:PCT/JP2022/036657

    申请日:2022-09-30

    Abstract: トラッカモジュール(100)は、モジュール基板(90)の主面(90a及び90b)の一方上に配置された集積回路(80)と、入力電圧に基づいて複数の離散的電圧を生成するよう構成されたスイッチトキャパシタ回路(20)に含まれ、モジュール基板(90)の主面(90a及び90b)の他方上に配置された少なくとも1つのキャパシタと、を備え、集積回路(80)は、スイッチトキャパシタ回路(20)に含まれる少なくとも1つのスイッチと、エンベロープ信号に基づいて複数の離散的電圧のうちの少なくとも1つを選択的に出力するよう構成された出力スイッチ回路(30)に含まれる少なくとも1つのスイッチと、を含み、少なくとも1つのキャパシタ(例えばキャパシタ(C11))は、モジュール基板(90)の平面視において、集積回路(80)と重なっている。

    基于多电压域的电源规划电路、射频放大器及芯片

    公开(公告)号:WO2023071833A1

    公开(公告)日:2023-05-04

    申请号:PCT/CN2022/125453

    申请日:2022-10-14

    Inventor: 唐生东 郭嘉帅

    Abstract: 本实用新型实施例提供了一种基于多电压域的电源规划电路,包括电压检测模块、低压差线性稳压器、第一开关、第二开关以及低噪声放大器;电压检测模块用于将电源电压的电压值与输入的多电压域电压的最小电压值比较产生比较结果,根据比较结果分别控制第一开关开断开或闭合和第二开关断开或闭合。本实用新型实施例提供了一种射频放大器和芯片。本实用新型的基于多电压域的电源规划电路、射频放大器和芯片可用于低噪声放大器工作于最低电压域且工作性能好。

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