US09602256B2

The present invention provides a method including receiving, by a terminal, a switching command is large. The method includes: acquiring designated channel resource information from channel resources used by a source base station; acquiring information of a relevant base station using a designated channel resource except the source base station; sending indication signaling to the relevant base station according to the information of the relevant base station, where the indication signaling carries the designated channel resource information, the indication signaling is used to instruct the relevant base station to stop using the designated channel resource when the mobile terminal switches to a target base station; sending a switching request message to the target base station; and sending the switching command to the mobile terminal through the designated channel resource.
US09602255B2

A method for operating a communications controller includes allocating a number of resource blocks to an enhanced physical downlink shared channel (ePDSCH), and identifying a starting point for the resource blocks of the ePDSCH, the starting point located within a control region of a subframe. The method also includes signaling to a user equipment (UE) the starting point of the resource blocks and the number of resource blocks allocated to the ePDSCH.
US09602254B2

Disclosed are a method, device, and a computer storage medium for component carrier allocation. The method includes that when it is determined that a component carrier which has a frequency exceeding a preset threshold exists in component carriers which are available to be allocated currently in a cell, a FDM of UE in the cell is updated according to the coverage of the component carrier which has a frequency exceeding the preset threshold; and frequency domain priority is determined according to the updated FDM, and the component carrier which has a frequency exceeding the preset threshold is allocated for the UE in the cell according to the frequency domain priority.
US09602253B2

The present invention relates to a method and system for making a hybrid automatic repeat requests (HARQ) in a carrier aggregation system. The method receives downlink data through a first subframe of a first carrier, transmits acknowledgement/negative-acknowledgement (ACK/NACK) for the downlink data through a second subframe of a second carrier, and re-receives the downlink data through a third subframe of the first carrier, wherein the first carrier only includes the downlink subframes, and the second carrier includes the uplink subframes and the downlink subframes.
US09602252B2

The purpose of the present invention is to avoid ACK/NACK collision in a system in which E-PDCCH control information is transmitted, increase the utilization efficiency of ACK/NACK resources, and suppress unnecessary PUSCH band reduction. A wireless communications terminal having a configuration comprising: a reception unit that receives control signals including ACK/NACK indexes, via an expanded physical downlink control channel; a control unit that determines, on the basis of the ACK/NACK indexes, whether to use a dynamically allocated dynamic ACK/NACK resource or a specified resource specified beforehand, to send downlink data ACK/NACK signals; and a transmission unit that sends the ACK/NACK signals using the dynamic ACK/NACK resource or the specified resource, as determined.
US09602249B2

Disclosed in the present invention is a method for a base station to set a backhaul link subframe for a relay node in a wireless communication system, to which a carrier aggregation technique is applied. More particularly, the present invention comprises the steps of: determining one of the plurality of subframe settings as a first subframe setting for a main component carrier allocated to the relay node; composing subframe setting candidates for one or more subcomponent carriers allocated to the relay node, one the basis of the determined first subframe setting; and determining a second subframe setting for each of the one or more subcomponent carriers, using the composed subframe setting candidates, wherein a subframe aggregation according to the first subframe setting and subframe aggregations according to each of the subframe setting candidates do not overlap when downlink subframes and uplink subframes of the different component carriers are identical, and a downlink subframe aggregation according to the second subframe setting is included in a downlink subframe aggregation according to the first subframe setting.
US09602248B2

A method for transmitting and receiving ARQ feedback information in a wireless communication system is disclosed. A method for allowing a mobile station to transmit an ARQ feedback in a broadband wireless access system includes receiving an ARQ block and an ARQ feedback polling from the base station, wherein the ARQ feedback polling requests the mobile station to transmit ARQ feedback information indicating whether the ARQ block is successfully received, receiving a first uplink resource for transmitting the ARQ feedback from the base station, and determining whether the received ARQ block is successfully received. The first uplink resource has a minimum size capable of being allocated to the ARQ feedback information.
US09602246B2

The present subject-matter relates to transmitting a real-time data stream, namely simultaneously to multiple receivers over unreliable networks (e.g. wireless multicast), in a timely and reliable manner, in particular to a method, apparatus and computer program product for feedback-based real-time network coding. It is disclosed a computer-implemented method for a transmitting node, a receiving node, and an intermediate node of feedback-based real-time network coding from a transmitter and to one or more receivers, in particular comprising a linear combination of packets from the transmitter; determining whether the received linear combination of packets is linearly independent of previous linear combinations of packets; determining the validity of a priority level of the packets; determining validity of the deadline of the packets; determining whether a packet is to be removed from a transmit queue, and if determined removing it. There are also disclosed said transmitting, receiving, and intermediate nodes.
US09602241B2

A computing system includes: an inter-device interface configured to communicate content; and a communication unit, coupled to the inter-device interface, configured to process the content based on a polar communication mechanism utilizing multiple processing dimensions for communicating the content, including: generating a node result with a first orthogonal mechanism, and processing the node result from the first orthogonal mechanism with a second orthogonal mechanism.
US09602238B2

Embodiments of the present invention provide a decoding method and apparatus. The method includes: acquiring a demodulation signal; acquiring a first decoding signal, where the first decoding signal is a signal fed back after the ith M-ary differential decoding processing is performed on the demodulation signal, and i is an integer greater than or equal to 0; and performing M-ary differential decoding processing on the demodulation signal according to the first decoding signal, to obtain a second decoding signal. The first decoding signal that is fed back is added and input to a decoder.
US09602222B2

Various embodiments are generally directed to techniques to form and maintain secure communications among two or more body-carried devices disposed in close proximity to the body of a person to form a body area network (BAN). An apparatus to establish secure communications includes a processor component; a signal component for execution by the processor component to compare a signal characteristic of a security test signal to a known signal characteristic of the security test signal to derive a bioelectric characteristic, the security test signal received via a tissue; and a bioelectric component for execution by the processor component to determine whether to allow transmission of data through the tissue based on the bioelectric characteristic. Other embodiments are described and claimed.
US09602221B2

A system for data transmission for an explosive environment comprises an ultrasonic transmitter coupled to a Class 1 device disposed inside an explosive risk zone and adapted to generate an electric signal in response to a predetermined condition, the ultrasonic transmitter being configured to generate and transmit an ultrasonic signal in response to receiving the electric signal, an ultrasonic receiver disposed outside the explosive risk zone configured to receive the ultrasonic signal, and an uplink communication device adapted to communicate an alert to a remote operator in response to the ultrasonic receiver receiving the ultrasonic signal.
US09602208B2

A content distribution system may include a headend server and media converters, the headend server being configured to distribute content items to user devices via the media converters and gateway devices. Each of the media converters may include a media converter cache and may be coupled to the headend server and a subset of the gateway devices, where each of the user devices is communicatively coupled to one of the gateway devices. The headend server may be further configured to determine one of the content items that is expected to be requested by a group of the user devices, determine one of the media converters that is coupled, via the subset of the gateway devices, to a largest number of user devices in the group of the user devices, and coordinate storing the one of the content items in the media converter cache of the one of the media converters.
US09602206B2

Disclosed are an apparatus and method configured to process video data signals operating on a passive optical network (PON). One example method of operation may include receiving a data signal at an optical distribution network node (ODN) and identifying signal interference in the data signal. The method may also include modifying a shape of the data signal in the electrical domain and transmitting the modified data signal to at least one optical termination unit (ONT).
US09602205B2

A multidirectional optical positioning method and a device thereof, and more particularly a signal transmission and positioning method applied to visible light communication and a device thereof. The device includes a transparent board having multiple different light conversion layers on the surface. The light conversion layers are arranged in one single axial direction. A light emitting unit is used to project an incident light onto an incident side of the transparent board. After the incident light passes through the light conversion layers, the incident light is converted into multiple radiating lights with different physical effects, which are emitted from an emission side of the transparent board. A sensor is disposed on the emission side of the transparent board to receive the radiating lights, whereby the position of the sensor can be found according to different extents of the physical effects of the different radiating lights.
US09602199B2

The present invention relates to a method of measuring optical fiber link chromatic dispersion by fractional Fourier transformation (FRFT), belonging to the technical field of optical communication. The method of the present invention performs coherent demodulation for an optical pulse signal output from the optical fiber link to obtain a complex field of the optical pulse signal, then performs FRFT on the complex field; according to the energy focusing effect of the chirp signal in the fractional spectrum, calculates an optimal fractional order of the FRFT, and then calculates chromatic dispersion of the optical fiber link according to the optimal fractional order. The method can be applied to an optical fiber communication system consisting of different types of optical fibers, to perform monitoring of optical fiber link chromatic dispersion.
US09602197B2

A diagnostic testing utility is used to perform single link diagnostics tests including an electrical loopback test, an optical loopback test, a link traffic test, and a link distance measurement test. These diagnostics tests can be performed on trunked links and virtual channels and can be performed while QoS is enabled. Additionally the tests can be performed non-intrusively by using a dedicated VC such that regular traffic is not affected by the diagnostics testing.
US09602195B2

A network design apparatus includes: a memory; and a processor coupled to the memory and configured to execute: accommodation design processing of, based on a traffic of a protection-applied or protection-unapplied first link in a first layer, generating a protection-unapplied second link in a second layer lower than the first layer, and generating a working path and a protection path of the first link on a network configured of the second link, and protection application processing of, based on the protection-unapplied second link and the working path and the protection path of the first link that are generated in the accommodation design processing, selecting or generating a protection-applied link in the second layer from the protection-unapplied second link.
US09602191B2

A method of wirelessly communicating a screen image between a mobile device and a base station coupled to a display terminal includes establishing a wireless display session between the mobile device and the base station. Electromagnetic (“EM”) radiation emitted from the base station is incident upon an antenna of the mobile device. The screen image is transmitted to the base station for display on the display terminal by modulating a radar cross-section of the mobile device between two or more states to encode the screen image on a backscatter channel of the EM radiation.
US09602188B2

A support system (1) for traffic support of ships (20a, 20b, 21a, 21b), having AIS ship reception units for receiving AIS radio signals containing ship traffic data, is characterized in that at least one flight object (2) is provided, comprising at least one AIS flight transmission unit (3), which is designed to transmit AIS radio signals containing ship traffic data inside an AIS transmission range (10) in such a manner that the transmitted AIS radio signals can be received by the ships (20a, 20b, 21a, 21b) located inside the AIS transmission range (10) by means of their respective AIS ship reception units.
US09602183B2

One embodiment of the present invention is a method for reporting channel state information by means of a terminal in a wireless communication system, the method comprising: a step of measuring a channel using at least one channel state information-reference signal (CSI-RS) indicated by at least one feedback type index from among a plurality of feedback type indices; and a step of generating channel state information based on the channel measurement and reporting the channel state information. Each of the plurality of feedback type indices indicates one or more CSI-RS configurations to be used in channel estimation and an effective channel relating to said one or more CSI-RS configurations.
US09602177B2

A method and apparatus for performing effective feedback in a wireless communication system supporting multiple antennas. A method for transmitting CSI of downlink transmission via uplink in a wireless communication system includes transmitting a joint-coded rank indicator (RI) and a first wideband (WB) precoding matrix indicator (PMI) at a first subframe, and transmitting a wideband channel quality indicator (WB CQI) and a second WB PMI at a second subframe. A user equipment (UE) preferred precoding matrix is indicated by a combination of the first PMI and the second PMI. If the RI is Rank-1 or Rank-2, the first PMI indicates one of subsets each having 8 indexes from among 16 indexes of the first PMI of a precoding codebook.
US09602175B2

A master station apparatus modulates downlink digital control data that includes at least a synchronization signal and a control signal, adds resource element information to the modulated control data, and composites downlink digital frequency-domain user data that has not been modulated and data originating from the modulated control data to which the resource element information has been added. A slave station apparatus converts a received optical signal into an electrical signal, separates, from the electrical signal, the frequency-domain user data and the data originating from the modulated control data, modulates the frequency-domain user data, adds resource element information to the modulated user data, and transmits time-domain composite data including a component originating from the modulated user data and a component originating from the modulated control data by radio waves.
US09602169B2

A communication apparatus includes first communication means having a first communication function for wirelessly communicating with a partner apparatus, and second communication means having an electric power supply function for wirelessly supplying electric power to the partner apparatus and a second communication function for wirelessly communicating with the partner apparatus. The second communication function is for transmitting specific data sequence to the partner apparatus in response to reception of specific data from the partner apparatus, and the electric power supply function is for supplying electric power to the partner apparatus in a case of receiving from the partner apparatus, with the first communication means, a signal indicating that the partner apparatus has received the data sequence.
US09602166B2

A configuration method of a multimedia system comprising a first device and at least one adjacent device having a mechanism to communicate with the first device. The first device comprises a mechanism to read/write data from/to an NFC data carrier. The method comprises a set-up phase and an exploitation phase.
US09602159B2

In one embodiment, a device in a network receives a message from a neighboring device that identifies the electrical phase on which the message was sent. Crosstalk is identified between the device and the neighboring device by determining that the message was received on a different electrical phase than the phase on which the message was sent. One or more distinct communication channels between the device and the neighboring device are identified based on the identified crosstalk with each communication channel including or more electrical phases.
US09602156B2

Apparatus and methods for diversity modules are provided herein. In certain configurations, a diversity module includes a first antenna-side multi-throw switch, a second antenna-side multi-throw switch, a first transmitter-side multi-throw switch, a second transmitter-side multi-throw switch, a low band (LB) processing circuit, a mid band (MB) processing circuit, and a high band (HB) processing circuit. The LB processing circuit is electrically coupled in a first signal path between the first antenna-side multi-throw switch and the first transceiver-side multi-throw switch, the MB processing circuit is electrically coupled in a second signal path between the second transceiver-side multi-throw switch and the second transceiver-side multi-throw switch, and the HB processing circuit is electrically coupled in a third signal path between the second antenna-side multi-throw switch and the first transmitter-side multi-throw switch.
US09602155B2

A transceiver element for an active, electronically controlled antenna system includes a transmit path, a receive path and single-pole change-over switches having a common central connection and two connections for switching between the transmit path and the receive path. An amplitude controller and a phase adjuster are arranged between the common center connections of a first and second single-pole change-over switch. Single-pole multiple toggle switches having a common central connection and a number N of connections are present. The common central connection of the first and second single-pole change-over switch is connected to the common central connection of a first and a second single-pole multiple toggle switch respectively, and an amplitude controller and a phase adjuster are connected between each connection of the number N of connections of the first multiple toggle switch and the second multiple toggle switch.
US09602152B2

Systems, methods, apparatuses, and computer readable media are disclosed for determining events and outputting events based on real-time data for location and movement of objects and audio data. In one embodiment, a method is provided for a method of determining play events that at least includes receiving audio data, wherein the audio data is received from at least one of a memory or a sensor; determining an event probability based on comparing the audio data to an audio profile; and generating an event based on the event probability satisfying a predetermined threshold.
US09602151B1

Provided is an apparatus and method for transmitting and receiving wireless signals. A transmitting apparatus has a signal processor and a transmitter. The signal processor is configured to generate a signal having a middle channel and at least one side channel. The transmitter is configured to wirelessly transmit the signal subject to a spectral mask that has shoulder regions. According to an embodiment of the invention, the signal processor generates the signal such that each side channel is positioned in one of the shoulder regions of the spectral mask. In this manner, bandwidth from the shoulder regions can be utilized by one or more side channels. Also provided is a receiving apparatus having a receiver configured to wirelessly receive the signal, and a signal processor configured to process the signal.
US09602142B2

An encoder and decoder using LDPC-CC which avoid lowering the transmission efficiency of information while not deteriorating error correction performance, even at termination; and an encoding method of the same. A termination sequence length determining unit determines the sequence length of a termination sequence transmitted added to the end of an information sequence, according to the information length (information size) and encoding rate of the information sequence. A parity calculation unit carries out LDPC-CC coding on the information sequence and the known-information sequence necessary for generating a termination sequence of the determined termination sequence length, and calculates a parity sequence.
US09602136B2

A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
US09602130B2

A system and method for comparing a character from a search space simultaneously to each of a set of search characters. The set of search characters may correspond to a regular expression. In one embodiment, the search space character is encoded to a short binary presentation (e.g., to an 8-bit representation), which is then converted to a long binary representation one bit of which is set, at a first position in the long binary representation corresponding to the value of the short representation. Each character of the set of search characters is similarly encoded and converted to a respective long binary representation. If the bit in one of the long binary representations corresponding to the set of search characters is set, it indicates that the search character matches the corresponding character of the set of search characters.
US09602129B2

Mechanisms are provided for the compact storage of geographical geometries as a collection of points, where individual points are encoded as binary/ternary strings (with the property that points closer to each other share a longer binary/ternary prefix) and the geometry is encoded by compressing the binary/ternary representation of common-prefix points. Mechanisms are also provided for the representation of a geometry using a ternary string that allows efficient storage of arbitrary shapes (e.g., long line segments, oblong polygons) as opposed to binary representations that are more efficient when the geometries are square or nearly square shaped.
US09602123B2

A cognitive signal converter adapted to produce a digital output signal based on an analog input signal comprises an analog-to-digital converter (ADC) and a cognitive network. The ADC is adapted to produce a digital converted signal based on the analog input signal, a sample clock signal and a process clock signal by sampling the analog input signal in accordance with the sample clock signal and quantizing each analog input signal sample based on the process clock signal. The cognitive network is adapted to receive the digital converted signal of the ADC, control at least one of the sample clock signal and the process clock signal based on the received digital converted signal and one or more characteristics of the analog signal source, and produce the digital output signal based on the received digital converted signal. Corresponding integrated circuit, electronic device and method are also disclosed.
US09602118B2

A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.
US09602114B2

A design method for a phase-locked loop comprises: a controlled-frequency oscillator; a phase comparator, to determine a phase difference between an output signal of the controlled-frequency oscillator and a reference signal; a corrector to receive as input a signal representative of the phase difference and to generate at its output a first correction signal; at least one second corrector, to receive as input a signal representative of or affected by a phase noise of the reference signal or of the output signal of the controlled-frequency oscillator and to generate at its output a second correction signal; and a circuit for generating a slaving signal for the controlled-frequency oscillator on the basis of the first and second correction signals; the method using the H-infinity method. Method for fabricating such a loop comprising a design step implementing this method. Phase-locked loop thus obtained.
US09602113B2

Certain aspects of the present disclosure support a method and apparatus for fast frequency throttling and re-locking in a phase-locked loop (PLL) device. Aspects of the present disclosure present a method and apparatus for operating in an open loop control (OLC) mode of the PLL device for generating a periodic signal. During the OLC mode, clocking of circuitry interfaced with a digitally-controlled oscillator (DCO) of the PLL device can be disabled. A PLL output frequency associated with the periodic signal generated by the DCO can be controlled directly through a digital control word input into the DCO.
US09602110B1

An oscillator amplifier biasing technique configures an oscillator amplifier to operate at a bias point causing loading on a tank circuit to have reduced or negligible dependence on amplifier bias conditions or device characteristics. The bias signal level may vary with variation in temperature. The oscillator amplifier biasing technique includes determining a bias signal level that has a minimum sensitivity of the frequency of oscillation as a function of temperature. The technique may store associated data in non-volatile memory to describe the bias signal level dependence on temperature. A digital-to-analog converter may drive the bias signal of the oscillator to the minimum sensitivity point as a function of temperature. The technique may substantially reduce effects of up-conversion of flicker noise in the oscillator output signal as well as improve frequency accuracy in the presence of effects such as mechanical strain and/or aging.
US09602106B1

An integrated circuits with sequential logic circuitry is provided. The sequential logic circuitry may including latching circuits that receive clock signals from on-chip or off-chip clock sources. The clock signals may exhibit clock skew that is native to the integrated circuit. The natively existing clock skew can be leverage to perform time borrowing to help optimize circuit performance. The desired clock skew can be achieved by intelligent placement of the clock sources and deliberate routing of the clock signals from the clock sources to respective types of clock distribution networks on the integrated circuit.
US09602088B1

Methods and apparatus for minimizing average quiescent current for a desire voltage error in a comparator are disclosed. An example method includes receiving a first voltage and a reference voltage, outputting a second voltage when the first voltage is lower than the reference voltage, wherein the outputting of the second voltage increases the first voltage, counting a number of clock cycles while the first voltage is higher than the reference voltage, comparing the number of clock cycles to a maximum number of clock cycles and a minimum number of clock cycles, when the number of clock cycles is above the maximum number of clock cycles, decreasing a frequency of a clock associated with the number of clock cycles, and when the number of clock cycles is below the minimum number of clock cycles increase the frequency of the clock.
US09602087B2

A linear transformer driver includes at least one ferrite ring positioned to accept a load. The linear transformer driver also includes a first, second, and third power delivery module. The first power delivery module sends a first energy in the form of a first pulse to the load. The second power delivery module sends a second energy in the form of a second pulse to the load. The third power delivery module sends a third energy in the form of a third pulse to the load. The linear transformer driver is configured to form a flat-top pulse by the superposition of the first, second, and third pulses. The first, second, and third pulses have different frequencies.
US09602086B2

A double half latch circuit includes a first stage coupled to receive a local input enable signal on an input of a second logic gate, and a complement of the clock signal on an input of a third logic gate, and further includes a fourth logic gate coupled to generate an intermediate enable signal based on states of the local input enable signal the complement of the clock signal. A second stage includes a fifth logic gate coupled to receive the complement of the clock signal, and a sixth logic gate coupled to receive the intermediate enable signal, and is configured to generate the output enable signal. The double half-latch circuit is transparent to the state changes of the local input enable signal when the clock signal is low and opaque to state changes of the local input enable signal when the clock signal is high.
US09602085B2

A data storage element comprises a master stage (MS) with a first and a second latch (LI, L2), an error stage (ES) and a slave stage (SLS). The first latch (LI) generates in a clocked fashion based on a clock signal (CLK, CLKT, CLKB) a first logical signal (DOUT1) based on an input signal (DATA) in relation to a first threshold level (TP1). The second latch generates (L2) in a clocked fashion based on the clock signal (CLK, CLKT, CLKB) a second logical signal (DOUT2) based on the input signal (DATA) in relation to a second threshold level (TP2). The second threshold level (TP2) is distinct from the first threshold level (TP1). The error stage provides an error signal (ER) with a first logical state if the first and the second logical signal (DOUT1 , DOUT2) have the same logical state, and with a second logical state they have different logical states. The slave stage (SLS) sets an output value (Q) of the data storage element to a common logical state of the first and the second logical signal (DOUT1 , DOUT2) when the error signal (ER) has the first logical state, and keeps the output value (Q) unchanged otherwise.
US09602082B2

Techniques for correcting clock distortion. The techniques include use of circuitry for detecting and correcting duty cycle distortion and quadrature clock phase distortion. For phase detection, detection circuitry is made simpler and more accurate through the use of a sampling operation in which device mismatch within detection circuitry is accounted for by sampling charge associated with an ideal clock signal across sampling capacitors. When phase detection is performed with the detection circuitry, the stored charge compensates for the device mismatch, improving the accuracy of the detection circuit. The sampling operation is used for duty cycle distortion detection as well. Specifically, a common mode voltage is applied to sampling capacitors, which effectively zeroes the voltage differential between the sampling capacitors, compensating for offset that might exist due to operation of other components of the detection circuit. A digital value is used by a feedback algorithm to correct the clock distortion.
US09602081B2

A method of operating a single-tuner radio includes tuning into a first frequency. A pause in a first signal associated with the first frequency is detected. Tuning is switched from the first frequency to a second frequency during the pause. Fieldstrength, multipath, adjacent channel energy, frequency offset and FM modulation for the second frequency are measured. Tuning is switched from the second frequency to the first frequency. Tuning is switched from the first frequency to the second frequency dependent upon the measuring step.
US09602079B2

In an exemplary embodiment, the communication device including an analog filter, where a digital signal processor sets the gain of the analog filter and the pole location of the filter simultaneously in order to maintain the filter pole location at a desired value or within a desired range. In further exemplary embodiments, the methodology to simultaneously set the gain and the pole location of the filters.
US09602078B2

A high-frequency module includes a filter unit and first and second external connection terminals. The filter unit includes first and second terminals and a plurality of SAW resonators. The plurality of SAW resonators are connected to one another by connection conductors. A matching element is connected between the first terminal and the first external connection terminal, and a matching element is connected between the second terminal and the second external connection terminal. At least one of the matching elements is inductively coupled or capacitively coupled to at least one of the connection conductors located at a position such that at least one of the SAW resonators is interposed between the matching element and the connection conductor.
US09602077B2

Described embodiments include a surface acoustic wave device, method, and apparatus. The device includes a piezoelectric substrate and a configurable electrode assembly. The configurable electrode assembly includes a plurality of spaced-apart elongated electrode elements electromechanically coupled with the piezoelectric substrate. The assembly includes a first signal bus crossing each of the plurality of electrode elements and electrically isolated therefrom. The assembly includes a first matrix of addressable switches. Each addressable switch of the first matrix configured to electrically couple a respective electrode element of the plurality of electrode elements with the first signal bus. The assembly includes a second signal bus crossing each of the plurality of electrode elements and electrically isolated therefrom. The assembly includes a second matrix of addressable switches. Each addressable switch of the second matrix configured to electrically couple a respective electrode element of the plurality of electrode elements with the second signal bus.
US09602072B1

A new slide screw impedance tuner structure uses a circular slabline, eccentrically rotating disc probes and a rotating carriage allowing reducing the linear size of the tuner by a factor of 3. The slabline lies flat on the bench table surface and the disc probe rotates at the end of a rotating arm, which acts as a mobile carriage, forming a planetary configuration. The rotation of the arm controls the phase of GAMMA and the rotation of the disc-probe controls its amplitude.
US09602066B2

A polarity-switching amplifier circuit includes: a first amplifying transistor and a second amplifying transistor, a transformer which includes a primary winding and a secondary winding, and a polarity-switching controller. An unbalanced input signal is input to the first amplifying transistor and the second amplifying transistor. The transformer receives an output signal of the first amplifying transistor and an output signal of the second amplifying transistor as a balanced signal input to the primary winding, and outputs a signal from the secondary winding. The polarity-switching controller turns on one of the first amplifying transistor and the second amplifying transistor and turns off the other thereof.
US09602063B2

An amplifier with switchable and tunable harmonic terminations and a variable impedance matching network is presented. The amplifier can adapt to different modes and different frequency bands of operation by appropriate switching and/or tuning of the harmonic terminations and/or the variable impedance matching network.
US09602060B2

An RF power amplifier circuit and input power limiter circuits are disclosed. A power detector generates a voltage output proportional to a power level of an input signal. There is a directional coupler with a first port connected to a transmit signal input, a second port connected to the input matching network, and a third port connected to the power detector. A first power amplifier stage with an input is connected to the input matching network and an output is connected to the transmit signal output. A control circuit connected to the power detector generates a gain reduction signal based upon a comparison of the voltage output from the power detector to predefined voltage levels corresponding to specific power levels of the input signal. Overall gain of the RF power amplifier circuit is reduced based upon the gain reduction signal that adjusts the configurations of the circuit components.
US09602059B2

An amplifier has an input port for receiving an input signal and an envelope port for receiving an envelope signal indicative of an envelope of the input signal, and an output port for delivering an amplified signal. The amplifier has a first transistor and a second transistor. A first biasing circuit is coupled to the envelope port and is arranged to generate a first bias voltage dependent on the envelope signal. A summing stage is coupled to the input port for receiving the input signal, to the first biasing circuit for receiving the first bias voltage, and to the gate of the first transistor. A second biasing circuit is coupled between the envelope port and the gate of the second transistor, and is arranged to generate a second bias voltage dependent on the envelope signal.
US09602058B1

Aspects of the disclosure provide a circuit that includes an envelope processing circuitry and a voltage modulator. The envelope processing circuitry is configured to receive a stream of envelope values of a signal for transmission and output a supply modulation signal in response to the stream of envelope values based on an average-power-tracking (APT) calibration. The voltage modulator is configured to modulate a supply voltage to an amplifier according to the supply modulation signal. The amplifier operates under the supply voltage to amplify the signal for transmission.
US09602053B2

An audio FM transmitter is disclosed that may achieve high-precision frequency control as well as compact size and low cost by enabling FM modulation using a fractional-N type PLL circuit.
US09602052B2

An oscillator includes first, second, and third current sources, a resistor having first and second terminals, first and second capacitors each having first and second terminals, a switch circuit through which each of the current sources is connectable to the first terminal of one of the resistor and the two capacitors to supply current thereto, a comparator, and switch controller configured to generate control signals for the switch circuit and an oscillation output signal for each of multiple periods based on an output signal from the comparator. During one of the periods, the switch circuit is controlled to connect the first current source to the first terminal of the first capacitor, the second current source to the first terminal of the resistor, the first terminal of the resistor to a first input of the comparator, and the first terminal of the first capacitor to a second input of the comparator.
US09602034B2

A CPU obtains a difference between a data number at timing when an ENC0 signal or an ENC1 signal changes in a case where there is no follow-up delay of a rotor relative to a voltage signal applied to an A-phase coil and a B-phase coil and a data number at timing when the ENC0 signal or the ENC1 signal changes in a case where there is a follow-up delay of the rotor relative to the voltage signal applied to the A-phase coil and the B-phase coil. Then, the CPU controls the voltage signal applied to the A-phase coil and the B-phase coil based on the obtained difference.
US09602031B2

An electronic circuit comprises at least one semiconductor switch mounted with its switching path in series with an inductive load to be triggered, and at least one freewheeling element that interacts with the semiconductor switch during switching phases and is also mounted in series with the load. A control unit controls a control connection of the semiconductor switch with a variable control current as a function of the time profile of a voltage measured at the freewheeling element and/or as a function of the time profile of the voltage measured at the switching path. A method for triggering a semiconductor switch of such a circuit, triggered by a variable control current for switching, the control current predefined as a function of the time profile of a voltage measured at the freewheeling element and/or as a function of the time profile of the voltage measured at the switching path.
US09602030B2

The present disclosure illustrates a motor drive circuit. The motor drive circuit includes a resistor module, a multiplexer, a data control unit, an analog-to-digital converter and a register. The resistor module receives an input voltage and generates at least one parameter voltage. The parameter voltage is associated with a motor speed curve of a motor. The multiplexer receives the parameter voltage. The data control unit controls the multiplexer to output the parameter voltage. The analog-to-digital converter receives the parameter voltage and converts the parameter voltage to digital form, and then outputs the digital parameter voltage to the data control unit. The register stores the digital parameter voltage outputted by the data control unit. A controller determines the motor speed curve according to the digital parameter voltage stored in the register, and drives the motor in response to the motor speed curve.
US09602028B2

An apparatus and a method actuate a frequency converter of an electric machine having a safety function, in particular a safe-torque-off (STO) function. Wherein, by a preferably clocked converter circuit, an electrically isolated output voltage is generated from an input voltage, from which output voltage a control signal is generated for the frequency converter for the operation thereof in accordance with standards and for triggering the safety function. An actuation signal is generated for a semiconductor switch which is periodically connected to the input voltage, and the output voltage is limited when the output voltage exceeds a switching threshold.
US09602024B2

A DC/AC converter for converting DC power of a number of inductively connected generators into power grid conformal AC power for feeding into a connected power grid with a number of phases, includes an intermediate circuit with a positive and a negative intermediate circuit connection, and for each phase, a bridge. Each bridge includes a first switch between the positive intermediate circuit connection and a phase terminal, a second switch connected between a positive generator terminal of the generator and the phase terminal, a third switch connected between a negative generator terminal of the generator and the phase terminal, and a fourth switch between the negative intermediate circuit connection and the phase terminal.
US09602021B2

A hybrid HVDC converter system includes a DC bus, at least one capacitor commutated converter (CCC) and at least one self-commutated converter (SCC) coupled in series through the DC bus. The CCC induces a first voltage on the DC buses, the SCC induces a second voltage on the DC bus, the first voltage and the second voltage are summed to define a total DC voltage. The method includes at least one of regulating the total DC voltage induced on the DC buses including regulating the first DC voltage through the CCC and regulating the second DC voltage through the SCC substantially simultaneously, regulating the total DC voltage induced on the DC bus including regulating the second DC voltage through the SCC, and regulating the total DC voltage induced on the DC bus including regulating the first DC voltage through the CCC.
US09602016B2

An electrical circuit for providing electrical power for use in powering electronic devices, such as monitors, televisions, white goods, data centers, and telecom circuit boards, is described herein. The electrical circuit includes an input terminal configured to receive an input power signal, an output terminal configured to provide an output power signal, and a forward converter coupled to the input and output terminals. The forward converter includes a transformer, and a primary side regulation circuit coupled to a primary side of the transformer. The primary side regulation circuit includes a switching device coupled to the primary side, a current sense circuit configured to sense a current level on the primary side, and a controller configured to generate a pulse-width modulated control signal delivered to the switching device as a function of the sensed current level to regulate the transformer to deliver the output power signal at a desired voltage level.
US09602013B2

A controller for controlling a power supply includes a feedback signal generator to generate a feedback signal representative of an output current in response to an output sense signal. A state selector circuit receives the feedback signal and outputs a digital state signal to set an operational state of a switch of the power supply. The state selector circuit adjusts the digital state signal in response to feedback information at an end of a feedback period. A driver circuit receives the digital state signal and generates a drive signal in response to the digital state signal. The drive signal drives switching of the switch in accordance with the operational state of the switch.
US09602001B1

A buck converter includes a power stage circuit and a control circuit. The power stage circuit has a pair of switches, an output inductor, and an output capacitor. The control circuit has a current-sensing unit (CCS), an error-amplifying (EA) and transient-holding (TH) unit, a transient-optimized feedback unit (TOF), and a PWM generation unit. The CCS senses an output capacitor current. The EA with the TH receives a feedback voltage and a reference voltage to generate an error signal. The TOF receives the feedback voltage and the reference voltage to generate a proportional voltage signal by a variable gain value. The PWM generation unit receives the proportional voltage signal and a sensing voltage signal to generate a PWM signal. When the proportional voltage signal equals the sensing voltage signal, the switches are controlled by the PWM signal at an optimal time point so that transient responses are optimized.
US09601996B2

In a switching power supply apparatus, a switching element is turned on/off to intermittently conduct current input via an inductor. Current input during a period in which the switching element is turned off is supplied to an electrolytic capacitor via a conduction path. A rectifier diode is provided in the conduction path to face toward the electrolytic capacitor. An inductor is provided in the conduction path to be connected in series with the rectifier diode. A high speed diode has a reverse recovery time shorter than the reverse recovery time of the rectifier diode, and is connected in parallel with the inductor to face toward the electrolytic capacitor.
US09601993B2

A boosting circuit of charge pump type includes: charging portion for applying an input voltage to a first capacitor; double boosting portion for applying the input voltage to a second capacitor and applying a sum of the input voltage and a voltage across the first capacitor to an output capacitor in a first predetermined period after start of a boosting operation; and triple boosting portion for repeating in order, after end of the first predetermined period, a step of applying the sum of the input voltage and the voltage across the first capacitor to the second capacitor and a step of applying a sum of the voltage across the first capacitor and a voltage across the second capacitor to the output capacitor.
US09601986B2

The invention relates to a method and an arrangement for the surge protection of inverters for photovoltaic systems, comprising at least one surge protection device which is physically integrated in the inverter or can be found in the vicinity of the inverter. The at least one surge protection device is connected to the DC side of the inverter. According to the invention, the inverter supplies a signal for setting or tracking the operating point at an operating level in the maximum power point (MPP) range, the response voltage of the surge protection device being predetermined, set, or selected on the basis of said signal.
US09601982B1

A method of and device for reducing power loss in a voltage conversion circuit. The voltage conversion circuit comprises a main power circuit and a switchable auxiliary circuit, which comprises a first and a second winding circuits. A switch controls the use of the first winding circuit, the second winding circuit, or both to reduce power lose during the voltage conversion.
US09601979B2

An alloy material for an R-T-B system rare earth permanent magnet having a high orientation rate and high coercivity (Hcj), and a method for producing an R-T-B system rare earth permanent magnet using the alloy material. The alloy material includes a plurality of R-T-B system alloys having different compositions and a metal powder. The respective R-T-B system alloys are formed of R which is composed of two or more kinds selected from rare earth elements, T which is composed of a transition metal essentially containing Fe, B, and unavoidable impurities. A first alloy having the greatest Dy content contains 17 mass % or greater of Dy, and a Dy concentration difference between the first alloy and a second alloy having the smallest Dy concentration difference with respect to the first alloy among the plurality of R-T-B system alloys is 5 mass % or greater.
US09601975B2

A disclosed terminal block assembly for a generator includes a terminal block with a base with first and second transverse terminal surfaces adjoining one another. One of the terminal surfaces includes an increased width greater than a length of a cable terminal lug for providing a lightning strike and creepage barrier. The terminal surfaces include spaced apart protrusions extending from the first and second surfaces to provide spaced apart terminal areas overlapping the first and second surfaces. First and second terminal studs are disposed within each corresponding first and second terminal areas and are electrically connected by a bus bar.
US09601969B2

An apparatus includes a load and a first armature. A first lever mechanically couples the first armature and the load. Motion of the first armature causes the first lever to pivot about a first pivot axis. The apparatus also includes a second armature and a second lever that mechanically couples the second armature and the load. Motion of the second armature causes the second lever to pivot about a second pivot axis. At least one stator is provided for creating magnetic flux for the first and second armatures to interact with, thereby to drive motion of the load. The apparatus also includes a coupling mechanism that couples the first lever and the second lever. The coupling mechanism is arranged to encourage common mode oscillation of the first and second levers and inhibit differential mode oscillation of the first and second levers, thereby to inhibit rocking of the load.
US09601968B2

The disclosure provides an anti-tilt electromagnetic motor, including a flame, a support base, a contact assembly, a drive assembly, and an elastic assembly. The support base is arranged movably relative to the frame along an axis. The contact assembly is disposed between the frame and the support base and directly contacts the frame and the support base. The drive assembly is configured to drive the support base to move. The elastic assembly is configured to provide a pre-loading force so as to enable the contact assembly to be compressed by the frame and the support base simultaneously.
US09601963B2

A motor waterproof structure includes a stator assembly, a casing and a cover body. The casing has a receiving space formed with an open side. A circuit board is disposed in the receiving space. The cover body is disposed on the open side of the receiving space to cover the circuit board. The motor waterproof structure serves to effectively protect the circuit board from being short-circuited and burned out in a humid environment.
US09601957B2

The invention is the compact multiphase wave winding of a high specific torque electric machineThe invention is the compact multiphase wave winding (6) of the electric machine. Winding (6) is filling the slots (5) of the stator ferromagnetic core (3) and comprise one or multiple layers (40). Winding (6) fills the slots (5). Winding comprise N or a multiple on N conductors (8), where N represents the number of winding phases. Conductor (8) comprises or is assembled by parallel straight segments (10) and winding overhangs (11). Between the two straight segments (10) of one conductor (8) there are N teeth (4) and N−1 slots (5) or N+1 teeth (4) and N slots (5). Straight segments are connected by winding overhangs which shape in tangential axial plane differs for less than one sixth of magnetic period (7) from ellipse shape with one axis equal to half of magnetic period (7) and other axis length between half and three quarters of magnetic period (7) length.
US09601956B2

A three-phase permanent magnet type motor has a stator in which a plurality of windings wound in a same direction are disposed, and the number of slots is 12n; a rotor in which the number of poles of the permanent magnet is 10n or 14n; and multilayer wiring boards for performing the connection so as to be 2m parallel. The three-phase permanent magnet type motor has a circuit configuration in which, among U-phase, V-phase, and W-phase, adjacent in-phase windings are connected in parallel and are connected in series with a like-pole winding of a symmetrical in-phase second winding group facing at 6-slot pitch angle, when a center of a first winding group of the adjacent in-phase windings is set as a reference axis, and in-phase transition wiring patterns are disposed on the same layer of the multilayer wiring boards in a line symmetrical manner.
US09601940B2

Embodiments of the present invention are directed to an improved battery packaging design. The battery pack design may include a battery cell, a plurality of transistors, and a controller. The transistors may be coupled to the terminals of the battery cell in an H-bridge configuration. The controller may control the transistors to bypass the battery cell based on the current flowing between the output terminals of the battery pack. In such a manner, the controller may prevent damage to the battery cell and improve the overall safety of the battery pack in hazardous conditions.
US09601934B2

Provided is a charging stand which, with a simple structure, prevents a force applied to a power cord from being transmitted directly to a connecting portion between the charging stand and the power cord.A charging stand 100 comprises a housing 110 having a seat portion 114 for placing an electronic apparatus 300 thereon and a charging mechanism for charging the electronic apparatus 300 when the electronic apparatus 300 is placed on the seat portion 114. A cord winding structure 140 for winding thereon a power cord 220 adapted to be connected to the charging stand 100 is provided at a bottom surface of the housing 100.
US09601933B2

A system for inductive power transmission includes at least one interface surface and a plurality of triangular coil elements positioned underneath the interface surface such that at least one edge of the respective triangular coil element is adjacent to an edge of at least one other of the triangular coil elements. Each of the triangular coil elements may be operable to inductively transmit power to at least one coil of at least one electronic device and/or inductively receive power from the coil of the electronic device. Each triangular coil element may be operable to detect the proximity of one or more inductive coils of one or more electronic devices and inductively transmit power upon such detection at different frequencies, power levels, and/or other inductive power transmission characteristics.
US09601931B2

The present disclosure relates to a device for monitoring and balancing the cell voltages of at least two energy storage cells, which are electrically connected in series, of a multi-cell energy storage stack having at least one energy storage element, a voltage measuring unit, a first combinatorial circuit that is connected to each energy storage cell and the voltage measuring unit, a second combinatorial circuit that is connected to the energy storage element, the voltage measuring unit, and the first combinatorial circuit, and controls a control unit, which is connected to the voltage measuring unit and the first and second combinatorial circuit.
US09601926B2

An exemplary Multi-Terminal High Voltage Direct Current (MTDC) system includes at least three terminals, where each terminal including a Voltage Source Converter (VSC) controlled by a VSC controller. A method for controlling the MTDC system includes providing a converter schedule including at least one of a desired power flow value and a DC voltage; determining, by a MTDC master controller, a present state of the MTDC system including a dynamic topology of the MTDC system; determining, by the MTDC master controller, based on the present state of the MTDC system, based on the schedule and based on MTDC system constraints, VSC controller parameters including droop settings for local control by the VSC controllers; and transmitting the VSC controller parameters to the VSC controllers.
US09601923B2

Exemplary methods are disclosed, which may include providing a conductive component configured to conduct a current to at least two electrical systems or elements. Methods may further include determining one of the electrical elements as a low-priority system and a second one of the electrical elements as a high-priority system, measuring or estimating a current associated with the at least two electrical systems to establish the current exceeds a predetermined parameter, and deactivating the low-priority system in response to at least the determination of the current exceeding the predetermined parameter.
US09601911B2

A wire harness includes a first conductive path, a second conductive path, a first exterior member having a tubular shape and accommodating the first conductive path, and a second exterior member having a tubular shape and accommodating the second conductive path. An exterior accommodating groove is formed in a wall of the first exterior member. The exterior accommodating groove is recessed inward of the first exterior member. The second exterior member is accommodated in the exterior accommodating groove so as to be parallel to the first exterior member.
US09601907B2

A universal load control module may include a power supply that operates over a wide voltage range, a microcontroller, and one or more functional control blocks. A functional control block may include a dimmer circuit for controlling a lighting load that provides reverse phase cut mode dimming, forward phase cut mode dimming, and hybrid phase cut mode dimming, as well as thermal protection. One or more universal control modules may be housed in a cabinet that include a cabinet control module. The cabinet may include additional thermal protection measures.
US09601904B1

A high-power laser system includes a plurality of cascaded diode drivers, a pump source, and a laser element. The diode drivers are configured to generate a continuous driver signal. The pump source is configured to generate radiated energy in response to the continuous driver signal. The laser element is disposed downstream from the pump source and is configured to generate a laser beam in response to stimulation via the radiated energy. The high-power laser system further includes an electronic controller configured to output at least one driver signal that operates the plurality of diode drivers at a fixed frequency. The at least one driver signal operates a first cascade diode driver among the plurality of diode drivers 90 degrees out of phase with respect to a second cascade diode driver among the plurality of diode drivers.
US09601903B2

A horizontal cavity surface emitting laser device includes an active layer configured to generate light to be emitted in one direction along the one surface of a semiconductor substrate and in another direction opposite to the one direction. The device also includes a rear distributed Bragg reflector unit configured to reflect the light. The rear distributed Bragg reflector unit includes a waveguide layer configured to guide light and a distributed Bragg reflector configured to reflect the light in the waveguide layer. The device further includes an optical component configured to guide, in a direction different from the one direction and the other direction, the light emitted from an end of the rear distributed Bragg reflector unit in the one direction. The device further includes a front reflecting mirror configured to reflect the light emitted from the active layer in the other direction toward another surface side of the semiconductor substrate.
US09601882B2

Enclosures for electronic devices are provided. These enclosures can be integrally formed with a full or partial receptacle connector shell for receiving electrical connectors such as audio connectors or plugs. For example, an enclosure made from a polymer can be integrally formed with an audio jack shell in an injection molding process. As another example, an enclosure can be integrally formed with one or more full or partial walls of an audio jack shell to form a single piece of polymer or metal and the remaining walls of the audio jack shell can be overmolded or assembled to the polymer or metal walls of the audio jack and proximate portions of the enclosure to form a full or complete audio jack shell.
US09601870B1

A locking structure of a connector assembly has a plug and a receptacle, the plug including a plug shell, a sleeve disposed on outer periphery of the plug shell, and a C-ring disposed between the plug shell and the sleeve, the receptacle including a receptacle shell having an end that is inserted between the plug shell and the sleeve when the receptacle is fitted to the plug, the C-ring having an inclined sleeve contacting surface on its outer periphery and an inclined receptacle shell contacting surface on its inner periphery, the C-ring being elastically deformable between a first state and a second state, a fitted state between the plug and the receptacle being locked when, with the C-ring being in the first state, the sleeve contacting surface comes in contact with the sleeve and the receptacle shell contacting surface comes in contact with the receptacle shell.
US09601869B2

This connector is provided with a male connector part (10) including male terminals (11), and a female connector part including female terminals. The male connector pan (10) and a second connector part are fitted together in a fixed fitting direction, and the male terminals (11) and the female terminals are connected. At least one of the outer peripheral surfaces (12a, 23a) of the male connector part (10) and the female connector part has, provided thereto, a plurality of front-alignment indicators (16a, 16b, 16c, 26a, 26b, 26c) which have an appearance that changes in accordance with the rotational angle of the viewing direction. At least one of the front-alignment indicators (16a, 16b 16c, 26a, 26b, 26c) can be seen in cases in which the at least one of the outer peripheral surfaces (12a, 23a) is viewed from a direction at rotational angle.
US09601867B2

A fluid-tight strain relief seal for a cable connecting an electric device is disclosed. In a housing for an electrical device an integrally molded nipple is provided that is configured to carry an electrical cable therethrough. The nipple comprises a proximal portion and a distal portion, the distal portion being closer to an exterior wall of the housing and the proximal portion shaped like a barb. A sleeve is fixed over the cable, the barb and the nipple to provide the seal.
US09601866B1

A joint support and strain relief that provides support for the entire joint between a power cord and a strip light is disclosed. The joint support and strain relief is comprised of a cuff portion that defines a curved interior channel designed to cradle a power cord and a contiguous spade portion in the form of a thin, flat, generally rectangular plate. The strip light is typically secured to the spade portion with adhesive. The spade portion may have sidewalls to assist with the alignment of the strip light, and those sidewalls may have attached to their upper edges horizontally inwardly-extending tabs parallel to and above the bottom of the spade portion. The joint support and strain relief may also have tabs with holes or openings that allow the piece to be attached to a substrate.
US09601862B2

A charge connector includes a connector case and a connector body. The connector case includes a pair of case split members to be coupled together. The connector body is housed in the connector case and includes charge terminals connected with electric wires and housed in a connector housing. The connector housing is provided with rotation direction regulation projections. The case split members are provided with rotation direction regulation holes that engage with the rotation direction regulation projections. The case split member is provided with a temporarily holding portion for holding the connector housing at a temporarily housed position. The connector housing is provided with a temporarily held portion at which the temporarily holding portion is locked.
US09601858B2

A magnet package is created, which includes a package body, wherein the package body is formed of a permanent magnetic material, and at least one electric contact, which is covered by the package body.
US09601856B2

A connecting-device for a switchgear apparatus, includes: tulip-cluster-portions for electrically engaging with a contact-stud-element; a mounting-end-part for the mechanical connection to a pole-terminal, and conductive-transmitting-portions for transmitting electrical current from the contact-stud-element to the pole-terminal, each of the conductive-transmitting-portions extending from the respective tulip-cluster-portion to a respective base-portion of the mounting-end-part. The tulip-cluster-portions with the respective conductive-transmitting-portions and with the respective base-portions are integral with one other so as to define respective single-piece-portions.
US09601850B2

The invention relates to an arrangement for increasing the insulation coordination between at least two electric potentials on a printed circuit board (2), said arrangement comprising the printed circuit board (2) and an insulation barrier (3), wherein the printed circuit board (2) has an opening (7) between the electric potentials, and the insulation barrier (3) is disposed on the printed circuit board (2) so as to be displaceble through the opening (7) and is designed such that the isolating distance between the two electric potentials can be enlarged by displacing the insulation barrier (3) relative to the printed circuit board (2). The arrangement makes it possible obtain a high packing density on the printed circuit board (2).
US09601842B2

The present invention discloses a matable and dematable electrical connecting structure characterized by comprising: a female coupling member having a first connecting portion; a male coupling member having a second connecting portion; and a connecting unit coupling the female coupling member and the male coupling member and electrically connecting the first and second connecting portions, wherein the connecting unit includes an inner conductive material which is electrically connected to the first connecting portion and is provided on the inner wall of an insert hole formed in the female connecting member, a column including a conductive material which is electrically connected to the second connecting portion, protruding from the male connecting member, and can be inserted in the insert hole, and one or more elastic pin including a surface of a conductive material which is extending in an outward direction from the column and elastically contacting the inner conductive material.
US09601840B2

The terminal connection strip includes: a carrier formed in a strip shape; and a plurality of terminal fitting which project from at least one edge side of the carrier in a width direction. The terminal fitting includes a crimping section which connects by crimping at least a conductor tip of an insulated wire provided with the conductor tip where a conductor is covered with an insulating cover and the conductor is exposed by peeling off the insulating cover on a distal end side of the insulated wire to the terminal fitting. The crimping section is formed into a hollow shape which allows the insertion of at least the conductor tip from a proximal end side of the crimping section and allows the crimping section to surround the conductor tip.
US09601831B2

A radio device of the present invention includes a radiation conductor which converts a radio frequency signal into an electric wave and radiates the electric wave; a circuit board electrically connected to the radiation conductor and incorporating an electric circuit for supplying the radio frequency signal to the radiation conductor a planar grounded conductor electrically connected to the electric circuit on the circuit board and placed such that the grounded conductor faces the radiation conductor, the grounded conductor constituting a ground of the radiation conductor; and a resin-made casing for accommodating the radiation conductor, the circuit board and the grounded conductor; wherein the grounded conductor, the circuit board and the radiation conductor are placed in this order in a thickness direction of the circuit board.
US09601829B2

An antenna including a substrate formed of a non-conductive material, a ground plane disposed on the substrate, a wideband radiating element having one end connected to an edge of the ground plane and an elongate feed arm feeding the wideband radiating element and having a maximum width of 1/100 of a predetermined wavelength, the predetermined wavelength being defined by formula (I) wherein λp is the predetermined wavelength, f is a lowest operating frequency of the wideband radiating element, μ is a permeability of the substrate, εr is a relative bulk permittivity of the substrate, W is a width of a conductive trace disposed above the substrate and H is a thickness of the substrate, wherein formula (II).
US09601827B2

Beam direction controlling unit includes a relative position determining unit that determines a relative position between a reflector antenna and an array antenna by controlling a driver, e.g., driving unit, a drive controlling unit, such that a range on the array antenna onto which a parallel light beam from a desired beam direction is projected is a range in which element antennas are arranged, an excitation element selector that selects, as element antennas to be excited, element antennas onto which the parallel light beam is projected at the determined relative position, an excitation amplitude phase determining unit that sets an excitation amplitude phase of the selected element antennas, and sets the excitation amplitude phase to an excitation amplitude phase controller, e.g., an amplitude controller, a phase shifter, and an excitation amplitude phase controlling unit, and a transmitter/receiver connecting unit that connects the selected element antennas to a transmitter/receiver.
US09601823B2

Embodiments of systems and methods for providing in-mold laminate antennas are generally described herein. Other embodiments may be described and claimed.
US09601820B2

A dielectric waveguide interconnect system has a dielectric waveguide (DWG) a core surrounded by a cladding along the length of the DWG. One or more periodic structures are embedded along the length of the DWG such that the core of the DWG is integral to each of the one or more periodic structures.
US09601813B2

A battery pack includes a battery cell having an electrode tab and a protective circuit module electrically connected to the electrode tab. The protective circuit module has a first surface in an assembling direction of the electrode tab and a second surface opposite the first surface. The electrode tab is separated from the first surface. Therefore, the battery pack has an improved connection structure between the battery cell and the protective circuit module, and short circuits can be prevented or substantially prevented.
US09601811B2

Provided is a nonaqueous electrolyte secondary cell including: a case; an element housed in the case, including at least a positive electrode member, a negative electrode member and a separator; and an electrolyte solution poured into the case, wherein when in the state of the case being installed, in the direction perpendicular to the liquid surface of the electrolyte solution, the length between the highest position and the lowest position of the element is represented by L1 and the length between the liquid surface and the lowest position of the element is represented by L2, the ratio calculated with the formula L2/L1×100 is 10% or more and 100% or less.
US09601808B2

A nonaqueous electrolytic solution includes a cyclic carbonate and a chain carbonate, and contains a glycol sulfate derivative represented by formula (I) below and fluoroethylene carbonate: [wherein each of R1 and R2 independently represents at least one selected from the group consisting of a hydrogen atom and a hydrocarbon group having 1 to 5 carbon atoms].
US09601806B2

An electro lye includes a compound of Formula I or IA: where each instance of R1 is independently H, alkyl, alkoxy, alkenyl, aryl, heteroaryl, or cycloalkyl; each instance of R2 is independently H, alkyl, alkoxy, alkenyl, aryl, heteroaryl, or cycloalkyl; each instance of R3 is independently H, alkyl, alkenyl, aryl, or cycloalkyl; each instance of R4 is independently H, halogen, CN, NO2, phosphate, alkyl, alkenyl, aryl, heteroaryl, or cycloalkyl; x is 1, 2, 3, 4, or 5; y is 1 or 2; and z is 0, 1, 2, 3, or 4.
US09601805B2

A process for producing a separator-electrolyte layer for use in a lithium battery, comprising: (a) providing a porous separator; (b) providing a quasi-solid electrolyte containing a lithium salt dissolved in a first liquid solvent up to a first concentration no less than 3 M; and (c) coating or impregnating the separator with the electrolyte to obtain the separator-electrolyte layer with a final concentration≧the first concentration so that the electrolyte exhibits a vapor pressure less than 0.01 kPa when measured at 20° C., a vapor pressure less than 60% of that of the first liquid solvent alone, a flash point at least 20 degrees Celsius higher than a flash point of the first liquid solvent alone, a flash point higher than 150° C., or no detectable flash point. A battery using such a separator-electrolyte is non-flammable and safe, has a long cycle life, high capacity, and high energy density.
US09601802B2

A nonaqueous electrolyte for a lithium-ion secondary battery containing 0.1 ppm to 20 ppm of vanadium in terms of vanadium ions, and containing cyclic carbonate and chain carbonate is used.
US09601801B2

An electrolyte includes compounds of formula M1Xn and M2Zm; and a solvent wherein M1 is Mg, Ca, Sr, Ba, Sc, Ti, Al, or Zn; M2 is Mg, Ca, Sr, Ba, Sc, Ti, Al, or Zn; X is a group forming a covalent bond with M1; Z is a halogen or pseudo-halogen; n is 1, 2, 3, 4, 5, or 6; and m is 1, 2, 3, 4, 5, or 6.
US09601791B2

The present invention provides an intake circulatory system for a zinc air fuel cell, including a housing, a zinc air cell, an air supply system and an air collecting system. The housing is partitioned on the inside of the intake circulatory system for a zinc air fuel cell to form a first space and a second space. The zinc air cell is assembled on the inside of the housing, and includes a discharging region that is located in the first space and a charging region that is located in the second space. Moreover, the air supply system includes an air supply device and an air intake device that is in connection with the air supply device and the first space. In addition, the air collecting system includes an air collecting device that is in connection with the air intake device, and at least one air output pipe exists in between the air collecting device and the second space. Further, in accordance with the present invention, the air supply device transmits external air to the first space via the air intake device. The discharging region of the zinc air cell has a chemical reaction with oxygen from the external air to generate electricity. The charging region produces oxygen by generating electricity to perform a reduction reaction. The air collecting device absorbs oxygen and also transmits the oxygen to the air intake device. The external air and the oxygen are mixed and subsequently enter the first space. As such, the power supply efficiency of the discharging region is increased in accordance with the present invention.
US09601790B2

In a fuel cell system which executes a stop process of stopping an output from a fuel cell when a required power generation amount for the fuel cell is smaller than a predetermined power generation amount and supplies oxidant during a stop process period, fuel gas is intermittently supplied to a fuel electrode at a basic supply interval, which is set in advance and at which carbon dioxide is not generated in an oxidant electrode, during the stop process period.
US09601787B2

A radiator cap is connected to a circulating circuit at a connecting point located upstream of a water pump in a flow direction of coolant and that regulates a pressure in the circulating circuit to be within a predetermined pressure range that is higher than or equal to an atmospheric pressure at the connecting point. A rotary valve is disposed in the circulating circuit at upstream of the connecting point of the radiator cap in the flow direction of coolant. Accordingly, a cavitation is restricted from occurring, and the water pump can perform enough efficiency. A communication passage that has an upstream end and a downstream end connected to the circulating circuit may be disposed instead of the radiator cap. In this case, a pressure regulating valve is disposed in the communication passage.
US09601773B2

The current disclosure relates to an anode material with the general formula MySb-M′Ox—C, where M and M′ are metals and M′Ox—C forms a matrix containing MySb. It also relates to an anode material with the general formula MySn-M′Cx—C, where M and M′ are metals and M′Cx—C forms a matrix containing MySn. It further relates to an anode material with the general formula Mo3Sb7—C, where —C forms a matrix containing Mo3Sb7. The disclosure also relates to an anode material with the general formula MySb-M′Cx—C, where M and M′ are metals and M′Cx—C forms a matrix containing MySb. Other embodiments of this disclosure relate to anodes or rechargeable batteries containing these materials as well as methods of making these materials using ball-milling techniques and furnace heating.
US09601772B2

The present invention provides a cathode active material that makes possible a high capacity nonaqueous electrolyte secondary battery that has excellent discharge load characteristics that provide both good cycle characteristics and thermal stability. The cathode active material comprises a lithium nickel composite oxide having the compositional formula LiNi1−aMaO2 (where, M is at least one kind of element that is selected from among a transitional metal other than Ni, a group 2 element, and group 13 element, and 0.01≦a≦0.5) to which fine lithium manganese composite oxide particle adhere to the surface thereof. This lithium nickel composite oxide is obtained by adding manganese salt solution to a lithium nickel composite oxide slurry, causing manganese hydroxide that contains lithium to adhere to the surface of the lithium nickel composite oxide particles, and then baking that lithium nickel composite oxide.
US09601768B2

The present invention relates to a method of preparing silicon oxide, in which the amounts of silicon and oxygen are appropriately controlled by decreasing the amount of the oxygen from silicon oxide containing a relatively large amount of oxygen, silicon oxide prepared by the method, and a secondary battery including the same. According to the method of preparing silicon oxide, silicon oxide (first silicon oxide) including a relatively large amount of oxygen is heat treated in a reducing atmosphere to decrease the amount of the oxygen in the silicon oxide (first silicon oxide) and to prepare silicon oxide (second silicon oxide) including silicon and oxygen in an appropriate amount (Si:SiO2=1:0.7-0.98), thereby improving capacity and initial efficiency and securing stability and cycle properties (lifetime characteristics) of the secondary battery.
US09601766B2

A negative active material including: a composite particle including a non-carbonaceous nanoparticle that allows lithiation and delithiation of lithium ions, and a (meth)acryl polymer disposed on a surface of the non-carbonaceous nanoparticle; and a crystalline carbonaceous nanosheet.
US09601762B2

A particulate lithium metal composite materials having a layer containing phosphorous and a method for producing said phosphorous-coated lithium metal products, characterized in that melted, droplet-shaped lithium metal is reacted in a hydrocarbon solvent with a phosphorous source that contains the phosphorous in the oxidation stage 3, and use thereof for the pre-lithiation of electrode materials and the production of battery anodes.
US09601747B2

A process of forming and the resulting nano-pitted metal substrate that serves both as patterns to grow nanostructured materials and as current collectors for the resulting nanostructured material is disclosed herein. The nano-pitted substrate can be fabricated from any suitable conductive material that allows nanostructured electrodes to be grown directly on the substrate.
US09601746B2

A method for injecting an electrolyte includes heating a case in which an electrode assembly is accommodated, and injecting an electrolyte into the case after the heating of the case. Here, the heating of the case may include heating the case through high-frequency induction heating using a coil. Also, the coil may have a spiral shape to surround the outside of the case along a longitudinal direction of the case.
US09601744B2

A secondary battery includes: a case; an electrode assembly housed in the case and including a first electrode, a second electrode, and a separator between the first electrode and the second electrode, the first electrode having a coating portion coated with a first active material and a non-coating portion absent the first active material; and a collector plate including first and second collector plates enmeshed together with the non-coating portion therebetween.
US09601737B2

A lithium-ion secondary battery separator resolves defects of a non-woven fabric separator which is not suitable for use in such a battery. The separator is thin and does not short-circuit and has excellent electrolyte retainability and rate characteristics. The separator includes a composite of a non-woven fabric having a basis weight of 2 to 20 g/m2 formed from fibers of a thermoplastic material having an average fiber diameter of 5 to 40 μm and ultra-microfibers having an average fiber diameter of 1 μm or less in an amount of ⅓ to 3 times the mass of the non-woven fabric. The composite has a thickness of 10 to 40 μm after heat-pressing treatment under conditions that the non-woven fabric has a glossiness (JIS Z 8741) measured at 60° in the range of 3 to 30 and a thickness of 10 to 40.
US09601734B2

In general, according to one embodiment, there is provided a battery. This battery includes a container, a lid, a gas-relief vent, an electrode group, an intermediate lead, and a terminal lead. The gas-relief vent is provided in the lid. The intermediate lead includes a first lead-joint part, an electrode-group-joint part, and a leg part. The leg part connects the first lead-joint part and the electrode-group-joint part to each other. The first lead-joint part and the electrode-group-joint part are located on planes different from each other.
US09601729B2

A power-tool battery pack usable as a power supply of a power tool and capable of slidably attaching to and detaching from a tool main body of the power tool includes a battery main body and a case that houses the battery main body. The battery main body includes a female terminal having inner sides configured to electrically connect to and sandwich a male terminal slidably attachable to the battery pack. The case includes a case main body and a case-cover part. The case-cover part has an opening for receiving the male terminal and sandwiching-wall parts for sandwiching the female terminal from outer sides of the female terminal. The female terminal and the sandwiching-wall parts are configured such that, at least when the female terminal sandwiches the male terminal, parts of the female terminal facing the sandwiching-wall parts are caused to touch the sandwiching-wall parts.
US09601728B2

Provided is a battery pack including a pair of end plates facing each other, a plurality of battery cells arrayed between the end plates, and a pair of side plates each extending along a length of the plurality of battery cells, and coupled to the end plates, wherein each of the end plates includes a base plate, bending portions bent from each edge of the base plate in a direction away from the plurality of battery cells, each bending portion having a reinforcing bead unit, and a flange portion connected to the base plate at each bending portion. According to one or more embodiments of the present invention, deformation of the battery pack may be efficiently suppressed and deterioration of a function of a battery cell may be prevented by blocking volume expansion due to recharging and discharging operations of the battery cell.
US09601726B2

A sealing material for secondary battery contains a conjugated diene-based polymer and a cyclic olefin-based polymer. The weight ratio between the conjugated diene-based polymer and the cyclic olefin-based polymer, as expressed in (conjugated diene-based polymer/cyclic olefin-based polymer), ranges from 40/60 to 80/20, and the total amount of the diene-based polymer and the cyclic olefin-based polymer is 80 wt % or more of an entire amount.
US09601725B2

An energy storage element includes a container that includes a container body including an opening and a cap part formed on the opening, an electrode assembly housed in the container, an electrode terminal, and a current collector which electrically connects the electrode terminal and the electrode assembly. The cap part of the container includes an outer surface including a protrusion part formed to protrude outward from the outer surface, and an inner surface including a recess part formed at a position corresponding to a position of the protrusion part.
US09601722B2

A method of manufacturing a display device, the method including providing a first electrode on a base substrate; providing a fluorine-containing pixel defining layer on the base substrate and the first electrode such that the pixel defining layer exposes at least a portion of the first electrode; pretreating the first electrode; and providing an organic layer on the first electrode after pretreating the first electrode, wherein pretreating the first electrode includes performing a first treatment operation of treating an exposed surface of the first electrode using a first plasma gas; and performing a second treatment operation after performing the first treatment operation, the second treatment operation including treating the exposed surface of the first electrode using a second plasma gas, wherein the second plasma gas is different from the first plasma gas and includes hydrogen.
US09601716B2

An organic light emitting diode comprising a first electrode layer, a second electrode layer, a stack of functional layers, including an organic light-emitting layer, sandwiched between said first electrode layer and said second electrode layer, and an passivation layer arranged adjacent to said first electrode layer is disclosed. The passivation layer reacts with the first electrode layer to form an oxide at a reaction temperature that is induced by an evolving short circuit between the first electrode layer and the second electrode layer. The passivation layer is unreactive at temperatures lower than the reaction temperature.
US09601687B2

A magnetic tunnel junction (MTJ) and methods for fabricating a MTJ are described. An MTJ includes a fixed layer and a barrier layer on the fixed layer. Such an MTJ also includes a free layer interfacing with the barrier layer. The free layer has a crystal structure in accordance with the barrier layer. The MTJ further includes an amorphous capping layer interfacing with the free layer.
US09601680B2

The present invention relates to a thermoelectric conversion element and a method for manufacturing the same and relates to suppression of breakage and deterioration of the thermoelectric conversion element due to partial pressurization from the vertical direction. This thermoelectric conversion element has: at least one n-type semiconductor body; at least one p-type semiconductor body; a first connecting electrode; a first out-put electrode for n-side output; and a second output electrode for p-side output, wherein areas of respective joint sections of the n-type semiconductor body with the first connecting electrode, the first output electrode, and the second output electrode and of the p-type semiconductor body with the first connecting electrode, the first output electrode, and the second output electrode are greater than respective cross-sectional areas in other positions, in an axial direction, of the n-type semiconductor body and the p-type semiconductor body.
US09601671B2

Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity.
US09601668B2

A light emitting device has a plurality of light emitting elements that are arranged with gaps between the devices on a mounting board in a first direction, a wavelength-conversion member that covers the plurality of light emitting elements, a light reflective resin. Each light emitting element has an n-type semiconductor layer, an active layer provided in a part of the n-type semiconductor layer, and a p-type semiconductor layer provided on the active layer. In a second direction which is perpendicular to the first direction, an n-side electrodes are provided at least in regions at both ends of the n-type semiconductor layer, and a p-side electrode is provided on the surface of the p-type semiconductor layer, and wherein in the second direction, the wavelength-conversion member is positioned to approximately align both sides with both active layer side faces, or to dispose its sides outward of the active layer side faces.
US09601667B2

A light-emitting device is provided. The light-emitting device comprises: a light-emitting stack having an active layer; an electrode structure on the light-emitting stack and comprising a first electrode and an extension electrode protruding from the first electrode toward an edge of the light-emitting device in a first extending direction; a transparent insulating layer between the light-emitting stack and the electrode structure, wherein the transparent insulating layer comprises a first part and an extension part protruding from the first part toward the edge of the light-emitting device in a second extending direction; wherein a surface area of a surface of the first electrode distal from the transparent insulating layer is smaller than a surface area of a surface of the transparent insulating layer distal from the light-emitting stack, the first electrode is right above the first part, and a part of the extension electrode is right above the extension part.
US09601656B1

A low cost, high efficiency light-emitting diode design is disclosed. In some embodiments, a p-n junction of a light-emitting diode is formed in an epitaxial layer grown on a substrate. Grinding the backside of an associated wafer after encapsulation not only opens a light path for the light emitting diode but removes most residual defects.
US09601649B2

A method for producing a micro system, said method comprising: providing a substrate (2) made of aluminum oxide; producing a thin film (6) on the substrate (2) by depositing lead zirconate titanate onto the substrate (2) with a thermal deposition method such that the lead zirconate titanate in the thin film (6) is self-polarized and is present predominantly in the rhombohedral phase; and cooling down the substrate (2) together with the thin film (6).
US09601644B2

A method for manufacturing a solar cell according to an embodiment of the present invention includes preparing a semiconductor substrate having a first conductivity type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductivity type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductivity type dopant. The method further includes forming a back surface field layer at a back surface of the semiconductor substrate by ion-implanting a first conductivity type dopant.
US09601631B2

A semiconductor device in which a shift of the threshold voltage of a transistor is suppressed is provided. A semiconductor device in which a decrease in the on-state current of a transistor is suppressed is provided. The semiconductor device is manufactured as follows: forming a gate electrode layer over a substrate; forming a gate insulating film over the gate electrode layer; forming an oxide semiconductor film over the gate insulating film; forming a metal oxide film having a higher reducing property than the oxide semiconductor film over the oxide semiconductor film; performing heat treatment while the metal oxide film and the oxide semiconductor film are in contact with each other, thereby the metal oxide film is reduced so that a metal film is formed; and processing the metal film to form a source electrode layer and a drain electrode layer.
US09601630B2

Metal quantum dots are incorporated into doped source and drain regions of a MOSFET array to assist in controlling transistor performance by altering the energy gap of the semiconductor crystal. In a first example, the quantum dots are incorporated into ion-doped source and drain regions. In a second example, the quantum dots are incorporated into epitaxially doped source and drain regions.
US09601621B1

A semiconductor device includes at least one semiconductor fin on an upper surface of a semiconductor substrate. The semiconductor fin includes a channel region formed of a first semiconductor material interposed between opposing embedded source/drain regions formed of a second semiconductor material different from the first semiconductor material. At least one gate stack is formed on the upper surface of the semiconductor substrate and wraps around the channel region. The embedded source/drain regions have a symmetrical shape and a uniform embedded interface.
US09601618B2

A semiconductor device includes a fin-shaped semiconductor layer on a semiconductor substrate and that extends in a first direction with a first insulating film around the fin-shaped semiconductor layer. A pillar-shaped semiconductor layer resides on the fin-shaped semiconductor layer. A width of the bottom of the pillar-shaped semiconductor layer is equal to a width of the top of the fin-shaped semiconductor layer. A gate insulating film is around the pillar-shaped semiconductor layer and a metal gate electrode is around the gate insulating film. A metal gate line is connected to the metal gate electrode, and a nitride film is on an entire top surface of the metal gate electrode and the metal gate line, except at a bottom of a contact.
US09601612B2

A semiconductor device includes MOSFET cells having a drift region of a first conductivity type. A first and second active area trench are in the drift region. A split gate uses the active trenches as field plates or includes planar gates between the active trenches including a MOS gate electrode (MOS gate) and a diode gate electrode (diode gate). A body region of the second conductivity type in the drift region abutts the active trenches. A source of the first conductivity type in the body region includes a first source portion proximate to the MOS gate and a second source portion proximate to the diode gate. A vertical drift region uses the drift region below the body region to provide a drain. A connector shorts the diode gate to the second source portion to provide an integrated channel diode. The MOS gate is electrically isolated from the first source portion.
US09601597B2

A method of manufacturing a substantially planar electronic device is disclosed. The method employs a resist having three different thicknesses used for defining different structures in a single masking step. Exemplary structures are substantially planar transistors having side-gates and diodes.
US09601596B2

There is provided an electronic device including at least a first electrode, a second electrode disposed to be spaced apart from the first electrode, and an active layer disposed over the second electrode from above the first electrode and formed of an organic semiconductor material. A charge injection layer is formed between the first electrode and the active layer and between the second electrode and the active layer, and the charge injection layer is formed of an organic material having an increased electric conductivity when the charge injection layer is oxidized.
US09601575B2

A semiconductor device includes a substrate, an active fin protruding from the substrate, and an asymmetric diamond-shaped source/drain disposed on an upper surface of the active fin. The source/drain includes a first crystal growth portion and a second crystal growth portion sharing a plane with the first crystal growth portion and having a lower surface disposed at a lower level than a lower surface of the first crystal growth portion.
US09601572B2

A gate pad and a source pad are disposed on a semiconductor layer. The gate pad is disposed at the center portion of the semiconductor layer and has the shape of a circle centered on the center of the semiconductor layer as viewed in plan. The source pad is disposed so as to surround the gate pad, and has the shape of a circular ring centered on the center of the semiconductor layer as viewed in plan. A plurality of unit cells that compose a trench type MOSFET element are formed in the semiconductor layer.
US09601567B1

A semiconductor device includes first and second FETs including first and second channel regions, respectively. The first and second FETs include first and second gate structures, respectively. The first and second gate structures include first and second gate dielectric layers formed over the first and second channel regions and first and second gate electrode layers formed over the first and second gate dielectric layers. The first and second gate structures are aligned along a first direction. The first gate structure and the second gate structure are separated by a separation plug made of an insulating material. The first gate electrode layer is in contact with a side wall of the separation plug.
US09601562B2

A highly reliable semiconductor device including an oxide semiconductor is provided. Provided is a semiconductor device including an oxide semiconductor layer, an insulating layer in contact with the oxide semiconductor layer, a gate electrode layer overlapping with the oxide semiconductor layer, and a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The oxide semiconductor layer includes a first region having a crystal whose size is less than or equal to 10 nm and a second region which overlaps with the insulating layer with the first region provided therebetween and which includes a crystal part whose c-axis is aligned in a direction parallel to a normal vector of the surface of the oxide semiconductor layer.
US09601557B2

A flexible display having an array of pixels or sub-pixels is provided. The display includes a flexible substrate and an array of thin film transistors (TFTs) corresponding to the array of pixels or sub-pixels on the substrate. The display also includes a first plurality of metal lines coupled to gate electrodes of the TFTs and a second plurality of metal lines coupled to source electrodes and drain electrodes of the TFTs. At least one of the first plurality of metal lines and the second plurality of metal lines comprises a non-stretchable portion in the TFT areas and a stretchable portion outside the TFT areas.
US09601553B2

An organic light-emitting display having an improved aperture ratio, the organic light-emitting display including a rear electrode, an opposite electrode, and a pixel electrode between the rear electrode and the opposite electrode. Here, an insulating layer is interposed between the pixel electrode and the rear electrode, wherein the pixel electrode, the insulating layer, and the rear electrode are configured as a capacitor of the organic light-emitting display. In such a structure, as the capacitor is disposed in a light-emitting area where the pixel electrode exists, it is not necessary to provide an additional space for a capacitor, thus improving an aperture ratio of the display.
US09601547B2

A solid-state image pickup device includes at least two stacked first and second photoelectric conversion sections in each of a plurality of pixels. Sensitivity of the first photoelectric conversion section to a light incident angle is equivalent to sensitivity of the second photoelectric conversion section to a light incident angle, for each of the pixels.
US09601545B1

The present disclosure relates to a method of forming an integrated circuit that prevents damage to MIM decoupling capacitors, and an associated structure. In some embodiments, the method comprises forming one or more lower metal interconnect structures within a lower ILD layer over a substrate. A plurality of MIM structures are formed over the lower metal interconnect structures, and one or more upper metal interconnect structures are formed within an upper ILD layer over the plurality of MIM structures. Together the lower and upper metal interconnect structures electrically couple the plurality of MIM structures in a series connection between a first voltage potential and a second voltage potential. By placing the MIM structures in a series connection, dissipation of the first voltage potential (e.g., a supply voltage) is spread out over the MIM structures, thereby reducing the voltage potential difference between electrodes of any one of the MIM structures.
US09601544B2

The disclosed technology relates to a magnetic memory device. In one aspect, the device includes a first electrode comprising a conductive pillar formed over the substrate and elongated in a vertical direction crossing a lateral surface of the substrate. The device additionally includes a second electrode extending in a lateral direction crossing the first direction, where the second electrode intersects the first electrode. The device additionally includes a magnetic tunnel junction (MTJ) formed at an intersection between the first electrode and the second electrode, where the MTJ continuously surrounds the first electrode. The MTJ includes a reference layer continuously surrounding the pillar of the first electrode, a free layer continuously surrounding the free layer, and a dielectric tunnel barrier interposed between the reference layer and the free layer.
US09601539B2

A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of the semiconductor layer, a second antireflection film located over the first antireflection film, a light shielding layer having side surfaces which are adjacent to at least one of first and the second antireflection film.
US09601537B2

An image pickup device which suppresses an increase in chip area of peripheral circuits without degrading the performance of a pixel section and makes it possible to prevent costs from being increased. The image pickup device includes a first semiconductor substrate and a second semiconductor substrate. A pixel section includes photo diodes each for generate electric charges by photoelectric conversion, floating diffusions each for temporarily storing the electric charges generated by the photo diode, and amplifiers each connected to the floating diffusion, for outputting a signal dependent on a potential of the associated floating diffusion. Column circuits are connected to vertical signal lines, respectively, for performing predetermined processing on signals output from the pixel section to vertical signal lines.
US09601523B2

The present invention provides a dual gate TFT substrate structure utilizing COA skill, comprising a substrate (1), a bottom gate (2) positioned on the substrate (1), a bottom gate isolation layer (3) covering the bottom gate (2) and the substrate (1), an active layer (4) positioned on the bottom gate isolation layer (3) above the bottom gate (2), an etching stopper layer (5) positioned on the active layer (4) and the bottom gate isolation layer (3), a source/a drain (6) positioned on the etching stopper layer (5) and respectively contacted with two ends of the active layer (4), color filter (8) positioned on the source/the drain (6) and the etching stopper layer (5), and a top gate (9) positioned on the color filter (8) and contacted with the bottom gate (2); the active layer (4) and the thin film of the previous manufacture process can be effectively protected and the original property and the stability of the active layer (4) and the thin film of the previous manufacture process can be ensured.
US09601514B1

Described herein is a FinFET device in which epitaxial layers of semiconductor material are formed in the source/drain regions on dielectrically isolated fin portions. The fin portions are located within a dielectric layer that is deposited on a semiconductor substrate. Surfaces of the fin portions are oriented in the {100} lattice plane of the crystalline material of the fin portions, providing for good epitaxial growth. Further described are methods for forming the FinFET device.
US09601513B1

Various embodiments include methods and integrated circuit structures. One method includes masking a structure with a mask to cover at least a portion of the structure under the mask, selectively implanting a material through a semiconductor layer and into a buried insulator layer forming an implant region. The implant region is substantially parallel to and below an upper surface of the structure. The method may also include masking an additional portion of the structure; etching a set of access ports though the semiconductor layer and partially through the insulator layer into the implant region; etching at least one tunnel below the upper surface of the structure in the implant region using the set of access; and depositing a conductor into the at least one tunnel and the set of access ports.
US09601512B2

A semiconductor device includes a semiconductor substrate, an insulating layer on a top surface of the substrate, and a first semiconductor transistor on the insulating layer, the transistor including an active region with a source region, a drain region, a channel region between the source and drain regions and a gate structure over the channel region, the gate structure extending beyond the transistor to an adjacent area. An outer well is included in the substrate, an inner well of an opposite type as the outer well situated within the outer well and under the active region and adjacent area, and a contact for the inner well in the adjacent area, the contact surrounding the gate structure. Operating the device includes applying a variable voltage at the contact for the inner well, a threshold voltage for the first transistor being altered by the variable voltage. The inner well and gate may be exposed and contacts created therefor together.
US09601507B2

According to one embodiment, a semiconductor device includes an insulating layer provided on a semiconductor substrate, an opening provided on the insulating layer, a spacer film provided in a side wall of the opening in a stepped shape, and configured to have an etching resistance lower than that of the insulating layer, and a conductive body provided in the opening to be configured to cover the spacer film.
US09601505B2

A semiconductor device includes a first selection gate insulating film surrounding a first pillar-shaped semiconductor layer, a first selection gate surrounding the first selection gate insulating film, a first bit line connected to the first pillar-shaped semiconductor layer, a layer including a first charge storage layer which surrounds a second pillar-shaped semiconductor layer, a first control gate surrounding the layer, a layer including a second charge storage layer which surrounds the second pillar-shaped semiconductor layer, a second control gate surrounding the layer, a first lower-portion internal line connecting the first and second pillar-shaped semiconductor layers, a layer including a third charge storage layer, a third control gate, a layer including a fourth charge storage layer, a fourth control gate, a second selection gate insulating film, a second selection gate, a first source line, and a second lower-portion internal line.
US09601503B2

A nonvolatile semiconductor memory device, includes: a stacked structural unit including a plurality of insulating films alternately stacked with a plurality of electrode films in a first direction; a selection gate electrode stacked on the stacked structural unit in the first direction; an insulating layer stacked on the selection gate electrode in the first direction; a first semiconductor pillar piercing the stacked structural unit, the selection gate electrode, and the insulating layer in the first direction, a first cross section of the first semiconductor pillar having an annular configuration, the first cross section being cut in a plane orthogonal to the first direction; a first core unit buried in an inner side of the first semiconductor pillar, the first core unit being recessed from an upper face of the insulating layer; and a first conducting layer of the first semiconductor pillar provided on the first core unit to contact the first core unit.
US09601487B2

A power transistor includes a number of transistor cells. Each transistor cell includes a source region, a drain region, a body region and a gate electrode. Each source region is arranged in a first semiconductor fin of a semiconductor body. Each drain region is at least partially arranged in a second semiconductor fin of the semiconductor body. The second semiconductor fin is spaced from the first semiconductor fin in a first horizontal direction of the semiconductor body. Each gate electrode is arranged in a trench adjacent the first semiconductor fin, is adjacent the body region, and is dielectrically insulated from the body region by a gate dielectric. Each of the first and second semiconductor fins has a width in the first horizontal direction and a length in a second horizontal direction, wherein the length is larger than the width.
US09601481B2

A semiconductor device includes a first electrode, a first semiconductor layer of a first dopant type on the first electrode. A first region of the semiconductor device includes a second semiconductor layer of the second dopant type on the first semiconductor layer, a third semiconductor layer of the first dopant type on the second semiconductor layer, and a second electrode extending though the second and third semiconductor layers and inwardly of the first semiconductor layer. A second region of the semiconductor device includes an insulating layer over the first semiconductor layer, a fourth semiconductor layer of the first or second dopant type on the insulating layer, a fifth semiconductor layer of a different dopant type on the insulating layer and surrounding the fourth semiconductor layer, and a sixth semiconductor layer of the same dopant type on the insulation layer and surrounding the fifth semiconductor layer.
US09601479B2

A buffer or voltage protection circuit, a circuit including same, and an associated method of operation are disclosed. In one example embodiment, the integrated circuit includes a first input terminal, a first circuit portion having a second input terminal, and a second circuit portion. The second circuit portion includes a transistor device having first, second, and third ports, where the first and second ports are respectively electrically coupled to the first input terminal and second input terminal, respectively. Additionally, the second circuit portion also includes a diode-type device that is electrically coupled between the third port and either a power source or a power input terminal, and a buffer/driver circuit and a capacitor coupled in series between the third and second ports. The second circuit portion operates to prevent the second input terminal from being exposed to an undesirably-high voltage level.
US09601478B2

An integrated circuit (IC) semiconductor device has a high oxide definition (OD) density region, a low OD density region adjacent to the high OD density region, and dummy cells in the high OD density region and the low OD density region to smooth a density gradient between the high OD density region and the low OD density region.
US09601477B2

Aspects of the disclosure include an integrated circuit that includes a plurality of functional circuit cells and a plurality of inactive spare functional circuit cells. Ones of the functional circuit cells respectively includes a set of first electrically interconnected transistors that define a first logic component and a first power rail configured to carry a first supply voltage. Ones of the inactive spare functional circuit cells respectively includes a set of second electrically interconnected transistors configured to define a second logic component and a second power rail configured to carry the first supply voltage. The set of electrically interconnected transistors is interconnected through a second set of conductive lines formed in the first conductive layer. The set of second electrically interconnected transistors is electrically disconnected from the second power rail.
US09601475B2

A workpiece has at least two semiconductor chips, each semiconductor chip having a first main surface, which is at least partially exposed, and a second main surface. The workpiece also comprises an electrically conducting layer, arranged on the at least two semiconductor chips, the electrically conducting layer being arranged at least on regions of the second main surface, and a molding compound, arranged on the electrically conducting layer.
US09601472B2

Some features pertain to a package on package (PoP) device that includes a first package, a first solder interconnect coupled to the first integrated circuit package, and a second package coupled to the first package through the first solder interconnect. The second package includes a first die, a package interconnect comprising a first pad, where the first solder interconnect is coupled to the first pad of the package interconnect. The second package also includes a redistribution portion coupled to the first die and the package interconnect, an encapsulation layer at least partially encapsulating the first die and the package interconnect. The first pad may include a surface that has low roughness. The encapsulation layer may encapsulate the package interconnect such that the encapsulation layer encapsulates at least a portion of the first solder interconnect.
US09601471B2

Vertically stacked system in package structures are described. In an embodiment, a package includes a first level molding and fan out structure, a third level molding and fan out structure, and a second level molding and fan out structure between the first and third levels. The second level molding and fan out structure includes back-to-back facing die, with a front surface of each die bonded to a redistribution layer.
US09601468B2

Embodiments of the present disclosure are directed to integrated circuit (IC) package assemblies with magnetic contacts, as well as corresponding fabrication methods and systems incorporating such magnetic contacts. A first IC substrate may have a first magnet coupled with a first electrical routing feature. A second IC substrate may have a second magnet coupled with a second electrical routing feature. The magnets may be embedded in the IC substrates and/or electrical routing features. The magnets may generate a magnetic field that extends across a gap between the first and second electrical routing features. Electrically conductive magnetic particles may be applied to one or both of the IC substrates to form a magnetic interconnect structure that extends across the gap. In some embodiments, magnetic contacts may be demagnetized by heating the magnets to a corresponding partial demagnetization temperature (PDT) or Curie temperature. Other embodiments may be described and/or claimed.
US09601465B2

A chip-stacked semiconductor package includes a first chip having a first front surface, a first back surface, and a first connection member on the first front surface, the first back surface being opposite to the first front surface; a second chip having a second front surface, a second back surface, a second connection member and a first through-silicon via (TSV) electrically connected to the second connection member, the second back surface opposite to the second front surface, and the second connection member on the second front face; and a first sealing member between the first front surface and the second front surface, the first sealing member filling a space between the first connection member and the second connection member, the first connection member of the first chip and the second connection member of the second chip being symmetric with respect to each other.
US09601462B2

A semiconductor device has a plurality of conductive vias formed through the semiconductor die with a first insulating layer around the conductive vias. A recess is formed in the first insulating layer around the conductive vias by LDA. A portion of the semiconductor wafer is removed by LDA after forming the recess in the first insulating layer so that the conductive vias extend above a surface of the semiconductor wafer. The first insulating layer extends to the surface of the semiconductor wafer or above the surface of the semiconductor wafer. A second insulating layer is formed over the surface of the semiconductor wafer and conductive vias. A first portion of the second insulating layer is removed by LDA, while leaving a second portion of the second insulating layer over the surface of the semiconductor wafer around the conductive vias. An electroless plated bump is formed over the conductive vias.
US09601458B2

A stacked semiconductor package has a first semiconductor package including a first package substrate and a first semiconductor chip mounted on the first package substrate, a second semiconductor package including a second package substrate and a second semiconductor chip mounted on the second package substrate, and a plurality of connections electrically connecting the first and second semiconductor packages. The connections are disposed on an outer region of the first package substrate outside the first semiconductor chip. The connections are disposed along opposite first longer sides and opposite shorter second sides of the first package substrate. The heights of those connections disposed along each longer first side gradually vary from a central to an outer region (i.e., the ends) of the longer first side.
US09601454B2

Microelectronic components and methods forming such microelectronic components are disclosed herein. The microelectronic components may include a plurality of electrically conductive vias in the form of wire bonds extending from a bonding surface of a substrate, such as surfaces of electrically conductive elements at a surface of the substrate.
US09601446B2

A method of forming a bond pad structure is provided. The method includes forming a first conductive layer over a substrate and depositing a first dielectric layer over the first conductive layer. The first dielectric layer is patterned to form a contiguous planar path substantially parallel to a top surface of the substrate. Patterning the first dielectric layer includes defining a dielectric region of the first dielectric layer surrounded by a portion of the contiguous planar path, and forming a first via hole in the dielectric region. The contiguous planar path and the via hole are filled with a conductive material. The conductive material in the contiguous planar path forms a second conductive layer, and the contiguous planar path extends from a first lateral side wall of the second conductive layer to a second lateral sidewall of the second conductive layer. A bond pad is formed over the second conductive layer, and the bond pad is electrically connected to the second conductive layer.
US09601444B2

A modularized signal conditioning apparatus system includes at least two slots formed in a coaxial cable. The slots are spaced apart so as to not reduce the measuring performance of the coaxial cable. Slots may be at least 40 mills from one another. In an ESD embodiment, within each slot is an ESD protection component, such as a pair of Shottky diodes coupled between the ground shell and the center conductor of the coaxial cable. Methods of producing modularized signal conditioning apparatus system are also described.
US09601431B2

An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber. The substrate has an exposed copper surface and an exposed low-k dielectric surface. A metal layer is formed over the copper surface but not over the low-k dielectric surface. A metal-based dielectric layer is formed over the metal layer and the low-k dielectric layer.
US09601427B2

A semiconductor device (1) includes a first metal wiring layer (11) formed on a substrate (10), an interlayer insulating film (12) formed on the first metal wiring layer (11), a second metal wiring layer (23) formed on the interlayer insulating film (12), a first resistor including a first resistance metal film (14a) formed between the first metal wiring layer (11) and the second metal wiring layer (23), a first insulating film (15a) formed on the first resistance metal film (14a), and a second resistance metal film (16a) formed on the first insulating film (15a), and a second resistor including a first resistance metal film (14b) formed between the first metal wiring layer (11) and the second metal wiring layer (23), a first insulating film (15b) formed on the first resistance metal film (14b), and a second resistance metal film (16b) formed on the first insulating film (15b).
US09601424B2

A method of forming and testing an interposer includes forming vias in a semiconductor material of a wafer having a front side and a back side. The method further includes disposing an electrically conductive layer on the front side of the wafer such that the layer is electrically connected to the vias. The method also includes forming electrically conductive pads on the front side of the wafer, wherein each electrically conductive pad is electrically connected to the electrically conductive layer. The method further includes forming electrically conductive bumps on the back side of the wafer, wherein each electrically conductive bump is electrically connected to at least one via. The method also includes testing electrical connectivity from a first bump to a second bump of the electrically conductive bumps.
US09601419B1

A multi-package unit having stacked packages is provided. A multi-package unit may include a first package and a second package mounted on the first package. The first package may be a leadframe package that includes metal leads extending beyond the perimeter of the first package. The first package may include a first integrated circuit die assembled within the first package using the wirebond configuration or the flip-chip configuration. The second package may be a leadframe package or a leadless package that includes a second integrated circuit die. The second package may be smaller than the first package. The first and second integrated circuit dies may be formed using different integrated circuit fabrication technologies.
US09601416B2

A lead frame includes one metal plate 10 having a terminal 15, and the other metal plate 50 joined to the one metal plate 10, on which a mounted component 91 is placed. The one metal plate 10 includes a first connection portion 11 connected to the terminal 15, a first extension portion 12 disposed on one end of the first connection portion 11, and a second extension portion 13 disposed on the other end of the first connection portion 11. The other metal plate 50 includes a pair of first clamping portions 62 configured to clamp the first extension portion 12, and a pair of second clamping portions 63 configured to clamp the second extension portion 13.
US09601415B2

In a method of manufacturing a semiconductor device according to an embodiment, a lead frame is provided, the lead frame having a trench part formed thereon so as to communicate bottom surfaces of a first lead and a second lead, which are coupled to each other between device regions adjacent to each other. Then, after a part of a coupling part between the first and second leads is cut by using a first blade, metal wastes formed inside the trench part are removed. Then, after the metal wastes are removed, a metal film is formed on exposed surfaces of the first and second leads by a plating method, and then, a remaining part of the coupling part between the first and second leads is cut by using a second blade. At this time, the cutting is performed so that the second blade does not contact the trench part.
US09601412B2

The present invention discloses a three-dimensional package structure. The first conductive element comprises a top surface, a bottom surface and a lateral surface. The conductive pattern disposed on the top surface of the first conductive element. A second conductive element is disposed on the conductive pattern. The first conductive element is electrically connected to the conductive pattern, and the second conductive element is electrically connected to the conductive pattern. In one embodiment, the shielding layer is a portion of the patterned conductive layer.
US09601402B2

A package apparatus comprises a first wiring layer, a metal layer, a conductive pillar layer, a passive component, a first molding compound layer, a second wiring layer, and a protection layer. The first wiring layer has a first surface and a second surface opposite to each other. The metal layer is disposed on the first surface of the first wiring layer. The conductive pillar layer is disposed on the second surface of the first wiring layer. The passive component is disposed on the second surface of the first wiring layer. The first molding compound layer is disposed within a part of the zone of the first wiring layer and the conductive pillar layer. The second wiring layer is disposed on the first molding compound layer and one end of the conductive pillar layer. The protection layer is disposed on the first molding compound layer and the second wiring layer.
US09601400B2

A high temperature, non-cavity package for non-axial electronics is designed using a glass ceramic compound with that is capable of being assembled and operating continuously at temperatures greater that 300-400° C. Metal brazes, such as silver, silver colloid or copper, are used to connect the semiconductor die, lead frame and connectors. The components are also thermally matched such that the packages can be assembled and operating continuously at high temperatures and withstand extreme temperature variations without the bonds failing or the package cracking due to a thermal mismatch.
US09601399B2

A module arrangement for power semiconductor devices, including one or more power semiconductor modules, wherein the one or more power semiconductor modules include a substrate with a first surface and a second surface being arranged opposite to the first surface, wherein the substrate is at least partially electrically insulating, wherein a conductive structure is arranged at the first surface of the substrate, wherein at least one power semiconductor device is arranged on the conductive structure and electrically connected thereto, wherein the one or more modules includes an inner volume for receiving the at least one power semiconductor device which volume is hermetically sealed from its surrounding by a module enclosure, wherein the module arrangement includes an arrangement enclosure at least partly defining a volume for receiving the one or more modules, and wherein the arrangement enclosure seals covers the volume.
US09601398B2

A method of attaching a microelectronic element to a substrate can include aligning the substrate with a microelectronic element, the microelectronic element having a plurality of spaced-apart electrically conductive bumps each including a bond metal, and reflowing the bumps. The bumps can be exposed at a front surface of the microelectronic element. The substrate can have a plurality of spaced-apart recesses extending from a first surface thereof. The recesses can each have at least a portion of one or more inner surfaces that are non-wettable by the bond metal of which the bumps are formed. The reflowing of the bumps can be performed so that at least some of the bond metal of each bump liquefies and flows at least partially into one of the recesses and solidifies therein such that the reflowed bond material in at least some of the recesses mechanically engages the substrate.
US09601391B2

A method and system are provided for determining mechanical stress experienced by a film during fabrication thereof on a substrate positioned in a vacuum deposition chamber. The substrate's first surface is disposed to have the film deposited thereon and the substrate's opposing second surface is a specular reflective surface. A portion of the substrate is supported. An optical displacement sensor is positioned in the vacuum deposition chamber in a spaced-apart relationship with respect to a portion of the substrate's second surface. During film deposition on the substrate's first surface, displacement of the portion of the substrate's second surface is measured using the optical displacement sensor. The measured displacement is indicative of a radius of curvature of the substrate, and the radius of curvature is indicative of mechanical stress being experienced by the film.
US09601388B2

A method of fabricating a semiconductor device includes providing a semiconductor substrate having a first region and a second region, forming a first dielectric layer over the semiconductor substrate, forming a first metal layer over the first dielectric layer, the first metal layer having a first work function, removing at least a portion of the first metal layer in the second region, and thereafter, forming a semiconductor layer over the first metal layer in the first region and over the at least partially removed first metal layer in the second region. The method further includes removing the semiconductor layer and forming a second metal layer on the first metal layer in the first region and on the at least partially removed first metal layer in the second region, the second metal layer having a second work function that is different than the first work function.
US09601383B1

A semiconductor structure for a FinFET in fabrication is provided, the structure including a bulk semiconductor substrate initially with a hard mask over the substrate. Isolation trenches between regions of the structure where the fins will be are formed prior to the fins, and filled with selectively removable sacrificial isolation material. Remains of the hard mask are removed and another hard mask formed over the structure with filled isolation trenches. Fins are then formed throughout the structure, including the regions of sacrificial isolation material, which is thereafter selectively removed.
US09601379B1

In one example, the method disclosed herein includes, among other things, forming a sacrificial structure around a plurality of stacked substantially un-doped nanowires at a location that corresponds to the channel region of the device, performing a selective etching process through a cavity to remove a second plurality of nanowires from the channel region and the source/drain regions of the device while leaving a first plurality of nanowires in position, and forming a metal conductive source/drain contact structure in each of the source/drain regions, wherein each of the metal conductive source/drain contact structures is positioned all around the first plurality of nanowires positioned in the source/drain regions.
US09601378B2

A method of forming a semiconductor structure includes providing a semiconductor substrate, forming at least one precursor semiconductor fin from the semiconductor substrate, etching through at least a portion of the at least one precursor semiconductor fin to form at least one patterned precursor semiconductor fin having a gap therein. The at least one patterned precursor semiconductor fin includes a first vertical surface and a second vertical surface with the gap therebetween. In addition, the method further includes forming a semiconductor material in the gap of the at least one patterned precursor semiconductor fin, in which the first vertical surface and the second vertical surface laterally surround the semiconductor material, and transforming the at least one patterned precursor semiconductor fin into at least one semiconductor fin including the semiconductor material therein.
US09601372B2

A device includes a metal pad, and a passivation layer including portions overlapping edge portions of the metal pad. A Post-Passivation-Interconnect (PPI) includes a trace portion overlying the passivation layer, and a pad portion connected to the trace portion. A polymer layer includes an upper portion over the PPI, and a plug portion extending into, and encircled by, the pad portion of the PPI.
US09601370B2

The memory cell array includes a memory string and a select transistor. The memory string includes plural memory cells connected in series, the memory string being formed to extend in a first direction as a lengthwise direction. The select transistor is connected to one end of the memory string. In the wiring section, a conductive layer and an interlayer insulating layer are laminated alternately to form plural layers. The conductive layer functions as a gate electrode of the memory cells and the select transistor. One select transistor includes plural conductive layers, and the plural conductive layers are connected in common by a common first contact. The plurality of the conductive layers and the first contact include a barrier metal formed in a periphery thereof. The plurality of the conductive layers and the first contact are in contact without the barrier metal therebetween at a boundary thereof.
US09601369B2

A semiconductor wafer has a plurality of semiconductor die separated by a peripheral region. A trench is formed in the peripheral region of the wafer. A via is formed on the die. The trench extends to and is continuous with the via. A first conductive layer is deposited in the trench and via to form conductive TSV. The first conductive layer is conformally applied or completely fills the trench and via. The trench has a larger area than the vias which accelerates formation of the first conductive layer. A second conductive layer is deposited over a front surface of the die. The second conductive layer is electrically connected to the first conductive layer. The first and second conductive layers can be formed simultaneously. A portion of a back surface of the wafer is removed to expose the first conductive layer. The die can be electrically interconnected through the TSVs.
US09601365B2

A peeling device separates a superposed substrate, in which a target substrate and a support substrate are joined to each other with an adhesive, into the target substrate and the support substrate. The peeling device includes a holding unit configured to hold the superposed substrate, and a plurality of position adjustment units movable forward and backward with respect to a side surface of the superposed substrate held in the holding unit, and the position adjustment unit configured to perform a position adjustment of the superposed substrate by contacting the side surface of the superposed substrate.
US09601362B2

A substrate aligner providing minimal substrate transporter extend and retract motions to quickly align substrate without back side damage while increasing the throughput of substrate processing. In one embodiment, the aligner having an inverted chuck connected to a frame with a substrate transfer system capable of transferring substrate from chuck to transporter without rotationally repositioning substrate. The inverted chuck eliminates aligner obstruction of substrate fiducials and along with the transfer system, allows transporter to remain within the frame during alignment. In another embodiment, the aligner has a rotatable sensor head connected to a frame and a substrate support with transparent rest pads for supporting the substrate during alignment so transporter can remain within the frame during alignment. Substrate alignment is performed independent of fiducial placement on support pads. In other embodiments the substrate support employs a buffer system for buffering substrate inside the apparatus allowing for fast swapping of substrates.
US09601355B2

A via or pillar structure, and a method of forming, is provided. In an embodiment, a polymer layer is formed having openings exposing portions of an underlying conductive pad. A conductive layer is formed over the polymer layer, filling the openings. The dies are covered with a molding material and a planarization process is performed to form pillars in the openings. In another embodiment, pillars are formed and then a polymer layer is formed over the pillars. The dies are covered with a molding material and a planarization process is performed to expose the pillars. In yet another embodiment, pillars are formed and a molding material is formed directly over the pillars. A planarization process is performed to expose the pillars. In still yet another embodiment, bumps are formed and a molding material is formed directly over the bumps. A planarization process is performed to expose the bumps.
US09601351B2

The generation of a variation in properties of vertical transistors is restrained. A vertical MOS transistor is formed in a semiconductor substrate. A first interlayer dielectric film and a first source wiring are formed over the front surface of the substrate. The first source wiring is formed over the first interlayer dielectric film, and is overlapped with the vertical MOS transistor as viewed in plan. Contacts are buried in the first interlayer dielectric film. Through the contacts, an n-type source layer of vertical MOS transistor is coupled with the first source wiring. Openings are made in the first source wiring.
US09601347B1

A method for fabricating a semiconductor device comprises removing a portion of a substrate to form a first cavity in the substrate and depositing an insulator material in the first cavity. A sacrificial pattern is formed on a portion of the insulator material in the first cavity and the substrate. Exposed portions of the substrate are removed to form a fin in the substrate. A gate stack is formed over a portion of the fin.
US09601346B2

A method of patterning a semiconductor device is disclosed. A tri-layer photoresist is formed over a plurality of patterned features. The tri-layer photoresist includes a bottom layer, a middle layer disposed over the bottom layer, and a top layer disposed over the middle layer, the top layer containing a photo-sensitive material. The top layer is patterned via a photolithography process, the patterned top layer including an opening. The opening is extended into the bottom layer by etching the bottom layer and continuously forming a protective layer on etched surfaces of the bottom layer and on exposed surfaces of the patterned features. The bottom layer is removed. At least some portions of the protective layer remain on the exposed surfaces of the patterned features after the bottom layer is removed.
US09601345B2

A semiconductor structure and the method of forming that semiconductor structure. The method includes formation of a plurality of fins from a layer of semiconductor material. At least one fin of the plurality of fins is at least fifty percent wider than each of a group of fins included in the plurality of fins. The method also includes selectively removing the one fin such that only the group of fins remain.
US09601343B2

In a semiconductor device manufacturing method, on a film to be processed, a mask material film is formed which has pattern openings for a plurality of contact patterns and connection openings for connecting adjacent pattern openings in such a manner that the connection between them is constricted in the middle. Then, a sidewall film is formed on the sidewalls of the individual openings in the mask material film, thereby not only making the diameter of the pattern openings smaller but also separating adjacent pattern openings. Then, the film to be processed is selectively etched with the mask material film and sidewall film as a mask, thereby making contact holes.
US09601341B2

A method of etching a feature in a substrate includes forming a mask structure over the substrate, the mask structure defining at least one re-entrant opening, etching the substrate through the opening to form the feature using a cyclic etch and deposition process, and removing the mask.
US09601336B2

The present invention provides a method of fabricating a trench field-effect device. The method includes: providing a substrate including an epitaxial layer formed on a semiconductor substrate of the substrate and a trench formed in the epitaxial layer; forming a sacrificial dielectric layer on a bottom and a sidewall of the trench; forming a heavily-doped polysilicon region at the bottom, and removing part of the sacrificial dielectric layer not covered by the heavily-doped polysilicon region to expose an epitaxial layer of the sidewall; and oxidizing the heavily-doped polysilicon region and the epitaxial layer simultaneously and forming a thick oxide layer and a trench sidewall gate dielectric layer synchronously on the bottom and the sidewall, respectively; wherein thickness of the thick oxide layer is greater than that of the trench sidewall gate dielectric layer. The method is simple, and figure of merit of the fabricated trench field-effect device is reduced.
US09601335B2

A method for forming a gate cut region includes forming a tapered profile gate line trench through a hard mask, a dummy layer and a dummy dielectric formed on a substrate, forming a dummy gate dielectric and a dummy gate conductor in the trench and planarizing a top surface to reach the hard mask. The dummy gate conductor is patterned to form a cut trench in a cut region. The dummy gate conductor is recessed, and the cut trench is filled with a first dielectric material. The dummy layer is removed and spacers are formed. A gate line is opened up and the dummy gate conductor is removed from the gate line trench. A gate dielectric and conductor are deposited, and a gate cap layer provides a second dielectric that is coupled to the first dielectric material in the cut trench to form a cut last structure.
US09601326B2

A method of manufacturing a semiconductor device is provided which includes a step of performing a cycle, a predetermined number of times, to form a film on a substrate, the cycle including non-simultaneously performing: (a) a step of supplying a source gas to the substrate in a process chamber; (b) a step of removing the source gas from the process chamber; (c) a step of supplying a reactive gas having a chemical structure different from that of the source gas to the substrate in the process chamber; and (d) a step of removing the reactive gas from the process chamber, wherein the (d) includes alternately repeating: (d-1) a step of exhausting an inside of the process chamber to depressurize the inside of the process chamber; and (d-2) a step of purging the inside of the process chamber using an inert gas.
US09601324B2

A method including bonding a process wafer having integrated circuits and a carrier wafer having at least one alignment mark to form a wafer assembly. The method further includes aligning the wafer assembly using the at least one alignment mark of the carrier wafer.
US09601317B2

A cold plasma jet hand sanitizer and method of use are provided. A pair of opposing two-dimensional arrays of atmospheric pressure cold plasma jets is used to create a sterilizing volume. Any object placed into that volume will have its surface sterilized. The opposing arrays of plasma jets are operated electrically 180 degrees out of phase so that the opposing arrays of plasma jets essentially fire into each other in the absence of an intervening object, or directly impinge on the surface of an intervening object.
US09601313B2

Techniques are described that facilitate automated extraction of lamellae and attaching the lamellae to sample grids for viewing on transmission electron microscopes. Some embodiments of the invention involve the use of machine vision to determine the positions of the lamella, the probe, and/or the TEM grid to guide the attachment of the probe to the lamella and the attachment of the lamella to the TEM grid. Techniques that facilitate the use of machine vision include shaping a probe tip so that its position can be readily recognized by image recognition software. Image subtraction techniques can be used to determine the position of the lamellae attached to the probe for moving the lamella to the TEM grid for attachment. In some embodiments, reference structures are milled on the probe or on the lamella to facilitate image recognition.
US09601294B2

In a fuse unit that includes a bus bar whose bend parts separated from each other are arranged in parallel, and one pair of divided bodies formed by being divided into one side and the other side of the bus bar with the bend parts exposed, and in which the one pair of divided bodies is arranged into an L-letter shape by being bent at the bend parts, a partition wall that is to be arranged between the bend parts in a state of leaving the bend parts bent is provided on one divided body.
US09601291B2

The present disclosure may fix the second yoke without using an upper cover and a lower cover, thereby having an effect of simplifying the entire structure, and reducing the fabrication cost, and decreasing the fabrication time.
US09601282B2

The power shut-off unit is equipped with two relays (2) connected to an external circuit, and a tabular baseplate (6). Multiple auxiliary electronic components (7) are mounted on the baseplate (6). The relays (2) are held so as to float over a mounting surface (13) via a pair of retaining members (8). A distance (d) equal to or greater than the thickness of the baseplate (6) is maintained between the relays (2) and the mounting surface (13). The baseplate (6) is not directly fixed to the mounting surface (13) and is connected to the relays (2) via multiple latching members (9). Because no load is acted upon the baseplate (6) by the relays (2), the baseplate (6) can be made thin.
US09601271B2

A detecting device includes: a measurement coil made up of a first partial coil to which current in a particular direction is induced by a magnetic field to be supplied to a power reception coil configured to receive power, a second partial coil to which the current in the particular direction is induced by the magnetic field, and a third partial coil, which is disposed between the first and second partial coils, to which current in the opposite direction of the particular direction is induced by the magnetic field; a measurement unit configured to measure the voltage of the measurement coil as measurement coil voltage; and a foreign object detecting unit configured to detect a foreign object within the magnetic field based on the measurement coil voltage.
US09601270B2

Described herein are improved configurations for providing a stranded printed circuit board trace comprising, a plurality of conductor layers, a plurality of individual conductor traces on each of the said conductor layers, and a plurality of vias for connecting individual conductor traces on different said conductor layers, the vias located on the outside edges of the stranded trace. The individual conductor traces of each layer may be routed from vias on one side of the stranded printed circuit board trace to vias on the other side in a substantially diagonal direction with respect to the axis of the stranded printed circuit board trace. In embodiments, the stranded printed circuit board trace configuration may be applied to a wireless power transfer system.
US09601266B2

Described herein are systems, devices, and methods for a wireless energy transfer source that can support multiple wireless energy transfer techniques. A wireless energy source is configured to support wireless energy transfer techniques without requiring separate independent hardware for each technique. An amplifier is used to energize different energy transfer elements tuned for different frequencies. The impendence of each energy transfer element is configured such that only some of the energy transfer elements is active at a time. The different energy transfer elements and energy transfer techniques may be selectively activated using an amplifier without using active switches to select or activate different coils and/or resonators.
US09601263B2

Systems, methods and apparatus for a wireless power transfer are disclosed. In one aspect a wireless power transfer apparatus is provided. The apparatus includes a casing. The apparatus further includes an electrical component housed within the casing. The apparatus further includes a sheath housed within the casing. The apparatus further includes a conductive filament housed within the sheath. The electrical component is electrically connected with the conductive filament. The casing is filled with a settable fluid bound with the sheath to form a structural matrix.
US09601259B2

An electronic component has a laminate including a plurality of laminated insulator layers, the laminate having a top surface and a mounting surface positioned in a first direction perpendicular to a direction of lamination. The direction of lamination is a direction in which the plurality of the insulator layers are laminated. First and second external electrodes are positioned on the mounting surface rather than on the top surface. The first and second external electrodes including first and second Ni-plating films and first and second Sn-plating films provided thereon, respectively. A first total thickness of the first Ni-plating film and the first Sn-plating film and/or a second total thickness of the second Ni-plating film and the second Sn-plating film are/is 11.6 μm or more, respectively. The first and/or second Ni-plating films are/is 1.37 times or more as thick as the first and/or second Sn-plating films, respectively.
US09601257B2

A method provides a portion of a transformer by forming a core by providing transformer core material, cutting individual laminations and bending them into generally C-shaped members, stacking some members to define a first core portion having a main leg and two opposing end legs, stacking other members to define a second core portion having a main leg and two opposing end legs, arranging the main legs in a back-to-back manner to define the core having a core leg defined by the two main legs, and opposing core yokes, defined by the end legs. Conductive material is wound directly around the core leg to form a primary winding and secondary winding in any order of arrangement, thus providing a first transformer portion. The transformer portion may be part of a single transformer or, when second and third transformer portions are provided, as part of a three-phase transformer.
US09601252B2

Deformation is depressed where cover and connectors are integrally formed from a resin. A core body includes first and second body portions coupled to each other in the axial direction. The first body portion has a tubular shape extending in the axial direction, and a space surrounded by the inner peripheral surface thereof forms a housing space for a member that slides in the axial direction along the inner peripheral surface. The second body portion's outer peripheral surface and a bobbin body portion inner peripheral surface contact each other, and the first body portion outer peripheral surface and a target end portion inner peripheral surface, which is the bobbin body portion's end portion on the side in a direction from the second body portion toward the first body portion in the axial direction, are spaced from each other in at least a part of the region in the circumferential direction.
US09601248B2

A method comprising the steps of mixing raw material powders to a composition comprising metal elements of Ca, La, Sr, Ba, Fe and Co, whose atomic ratios are represented by the general formula of Ca1-x-yLax(Sry′Ba1-y′)yFe2n-zCoz, wherein 1−x−y, x and y are values in a region defined by a coordinate a: (0.470, 0.297, 0.233), a coordinate b: (0.300, 0.392, 0.308), a coordinate c: (0.300, 0.300, 0.400), a coordinate d: (0.400, 0.200, 0.400) and a coordinate e: (0.470, 0.200, 0.330) in a ternary diagram of x, y, and 1−x−y, y′ and z, and n representing a molar ratio meet 0.5≦y′≦1, 0.2≦z<0.25, and 5.2
US09601237B2

A wired pipe transmission line for disposal in a wired pipe segment for use in subterranean drilling. The transmission line includes an assembly including an inner conductor and a dielectric layer including silicon dioxide (SiO2) insulating material surrounding the inner conductor and a protective layer that is formed of a rigid material and surrounding the dielectric layer. Also included is a method of forming a wired pipe transmission line.
US09601224B2

An electron beam irradiation apparatus that emits an electron beam into a container, the electron beam irradiation apparatus including: a vacuum housing constituting a vacuum chamber; an electron generator provided in the vacuum housing; a cylindrical nozzle member that is extended from the vacuum housing so as to be inserted into the container and has exit windows on the distal end of the nozzle member, the exit windows being provided for emission of an electron beam generated by the electron generator into the container; and a magnetic shield member for the vacuum chamber and a magnetic shield member for the nozzle member, the magnetic shield members being respectively provided for the vacuum housing and the nozzle member so as to block variable magnetism generated around an electron beam trajectory extended from the electron generator to the exit windows.
US09601223B2

Anti-scatter plates are used to attenuate secondary radiation so that it is not detected by a detector array. However, anti-scatter plates often cast dynamic shadows on the detector array which results in noise in signals produced by the detector array. As disclosed herein, an anti-scatter grid comprises at least two anti-scatter plates. A percentage difference in the shadows cast by the first and the second anti-scatter plates is substantially zero (e.g., causing uniform percentage change in shadows cast on the detector array). Additionally, the shadows that are cast by the anti-scatter plates may be substantially static. In one embodiment, this is accomplished by having a top surface of an anti-scatter plate that has a transverse dimension that is less than a bottom surface of the anti-scatter plate.
US09601208B2

According to example embodiments, a nonvolatile memory device includes a plurality of strings having a plurality of serially-connected selection transistors and a plurality of memory cells connected in series to one end of the serially-connected selection transistors. A control logic is configured to perform a program operation for setting a threshold voltage of at least one of the serially-connected selection transistors.
US09601192B2

According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode. The control circuit applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading. During the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse.
US09601190B2

A semiconductor integrated circuit according to an embodiment includes: N (≧1) input wiring lines; M (≧1) output wiring lines; N first wiring lines corresponding to the N input wiring lines; K (>M) second wiring lines crossing the N first wiring lines; a plurality of first resistive change elements disposed at intersections of the first wiring lines and the second wiring lines, each of the first resistive change elements including a first electrode connecting to a corresponding one of the first wiring lines, a second electrode connecting to a corresponding one of the second wiring lines, and a first resistive change layer disposed between the first electrode and the second electrode; a first controller controlling a voltage applied to the first wiring lines; a second controller controlling a voltage applied to the second wiring lines; and a selection circuit selecting M second wiring lines from the K second wiring lines.
US09601180B2

Methods of configuring dynamic memory associated with a processing system, are described. The dynamic memory is configured in a plurality of blocks, the method comprises: a) receiving information relating to a utilization status of the memory; b) processing the received information to determine at least one first block of the memory that is currently not in use for information storage; and c) configuring the at least one first block to be excluded from an information refresh process.
US09601179B2

A semiconductor memory device may include a memory cell array, a first decoder and a second decoder. The memory cell array includes a plurality of memory cell rows. The first decoder is configured to select a first number of memory cell rows of the plurality of memory cell rows based on a selected refresh row address of a set of row addresses. The second decoder is configured to select a second number of memory cell rows of the plurality of memory cell rows based on the selected refresh row address. A total number of the first number and the second number is varied in response to the selected refresh row address.
US09601165B1

Embodiments include a sense amplifier circuit including first and second paths that may be selectively coupled to a memory cell or a reference cell as part of a two-phase read process. The sense amplifier may include a biasing circuit to provide an adaptive bias voltage to a transistor of the first and/or second path to cause the transistor to provide a voltage across the memory cell and/or reference cell that is substantially constant across process corners. Additionally, or alternatively, the sense amplifier may include a DC-coupled regenerative latch circuit to generate a digital output signal based on a voltage difference between nodes of the first and second paths at or near the end of the second phase. Additionally, or alternatively, trimmable offset resistors may adjust a resistance value provided to the sense amplifier by the memory cell and/or reference cells. Other embodiments may be described and claimed.
US09601161B2

Hard disk drives of the invention are wrapped in wraps for enhanced sealing of the hard disk drive. Wrapped hard disk drives of the invention comprise: an enclosed hard disk drive housing comprising a base and a cover enclosed around internal components for facilitating reading and recording of data at a desired location on at least one disk contained within the housing; and a wrap wrapped and metallically sealed around the enclosed hard disk drive housing in an at least partially overlapping manner to form the wrapped hard disk drive and prevent undesired migration therethrough such that a sealed environment exists within the wrapped hard disk drive.
US09601148B2

A safety stop mechanism for an automated storage library in which a connector has first and second ends. The first end is configured to contact a door of the automated storage library when the door is in at least a first position. A safety stop is connected to the second end of the connector and adapted to move from a down position to an up position. The safety stop is in the down position when the door is in the first position allowing for travel of the robotic accessor over the safety stop.
US09601147B2

To provide an optical information recording and reproducing apparatus capable of correct positioning, in an optical information recording and reproducing apparatus which branches a light beam into reference light and signal light to cause interference and records an obtained interference fringe as a hologram on an optical information recording medium and reproduces the hologram recorded by applying the reference light onto the optical information recording medium, the apparatus has an image pickup element which detects reproduction light passing through an aperture 101 in reproduction light obtained by applying the reference light onto the optical information recording medium and generates a reproduction signal, photo detectors 104a, 104b, 104c, and 104d that are different from the image pickup element and detect reproduction light applied on a location on the periphery of the aperture 101, and a computing unit which computes a position error signal based on outputs from the photo detectors.
US09601145B1

A heat-assisted magnetic recording (HAMR) disk has multiple independent data layers, each data layer being a continuous non-patterned layer of magnetizable material. Each data layer can store data independent and not related to the data stored in the other data layers. The data layers are separated by a nonmagnetic spacer layer (SL) and each data layer is formed of high-anisotropy (Ku) material so that the coercivities of lower and upper data layers (RL1 and RL2) are greater than the magnetic write field. At a high laser power both RL1 and RL2 are heated to above their respective Curie temperatures and data is recorded in both RL1 and RL2. At low laser power only upper RL2 is heated to above its Curie temperature and data is recorded only in RL2. The SL prevents lower RL1 from being heated to above its Curie temperature at low laser power.
US09601142B1

Method and apparatus for storing and retrieving user data from magnetic recording tracks in a data storage device. In some embodiments, a rotatable data recording medium has a circumferentially extending data track formed from spaced apart embedded servo wedges that extend radially across a recording surface of the medium to define intervening data wedges between each adjacent pair of the servo wedges. Each data wedge along the data track has only a single timing field at a beginning portion of the data wedge immediately adjacent a first servo wedge, followed by a plurality of data sectors that extend across the data wedge to an end portion of the data wedge immediately adjacent a second servo wedge. No inter-sector gaps are provided between the respective data sectors and no additional timing fields are provided between the first and second servo wedges.
US09601139B2

A magneto-resistive (MR) sensor protection circuit is disclosed, for the protection of an MR sensor. The MR sensor may have a safe operating voltage range, a normal operating voltage range within the safe operating voltage range, and two terminals coupled to a read channel circuit, including a positive terminal and a negative terminal. The MR sensor protection circuit may have positive and negative protection threshold voltage ranges. The MR sensor protection circuit may also have a plurality of N-channel field-effect transistors (NFETs) that are coupled to the positive terminal and to the negative terminal, and configured to, in response to a voltage between the two terminals being within either the positive or the negative protection threshold voltage range, limit the voltage between the terminals by shunting current between the positive terminal and the negative terminal.
US09601123B2

The approach shown provides for an efficient implementation of time response, level response and frequency response alignment between two audio sources such as DAB and FM that may be time offset from each other by as much as 2 seconds, and produces an aurally undetectable transition between the sources. Computational load is significantly reduced over the approaches known in the prior art.
US09601115B2

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for handing off a user conversation between computer-implemented agents. One of the methods includes receiving, by a computer-implemented agent specific to a user device, a digital representation of speech encoding an utterance, determining, by the computer-implemented agent, that the utterance specifies a requirement to establish a communication with another computer-implemented agent, and establishing, by the computer-implemented agent, a communication between the other computer-implemented agent and the user device.
US09601106B2

According to one embodiment, a prosody editing apparatus includes a storage, a first selection unit, a search unit, a normalization unit, a mapping unit, a display, a second selection unit, a restoring unit and a replacing unit. The search unit searches the storage for one or more second prosodic patterns corresponding to attribute information that matches attribute information of the selected phrase. The mapping maps each of the normalized second prosodic patterns on a low-dimensional space. The restoring unit restores a restored prosodic pattern according to the selected coordinates. The replacing unit replaces prosody of synthetic speech generated based on the selected phrase by the restored prosodic pattern.
US09601104B2

Speech traits of an entity imbue an artificial intelligence system with idiomatic traits of persons from a particular category. Electronic units of speech are collected from an electronic stream of speech that is generated by a first entity. Tokens from the electronic stream of speech are identified, where each token identifies a particular electronic unit of speech from the electronic stream of speech, and where identification of the tokens is semantic-free. Nodes in a first speech graph are populated with the tokens to develop a first speech graph having a first shape. The first shape is matched to a second shape of a second speech graph from a second entity in a known category. The first entity is assigned to the known category, and synthetic speech generated by an artificial intelligence system is modified based on the first entity being assigned to the known category.
US09601103B2

A high-frequency light-generated focused ultrasound (LGFU) device is provided. The device has a source of light energy, such as a laser, and an optoacoustic lens comprising a concave composite layer with a plurality of light absorbing particles that absorbs laser energy, e.g., carbon nanotubes, and a polymeric material that rapidly expands upon exposure to heat, e.g., polydimethylsiloxane. The laser energy is directed to the optoacoustic lens and thus can generate high-frequency (e.g., ≧10 MHz) and high-amplitude pressure output (e.g., ≧10 MPa) focused ultrasound. The disclosure also provides methods of making such new arcuate optoacoustic lenses, as well as methods for generating and using the high-frequency and high-amplitude ultrasound, including for surgery, like lithotripsy and ablation.
US09601088B2

A display device includes a controller chip and a storage circuit. The controller chip includes a clock generating circuit configured to generate a clock signal. The storage circuit is coupled to the clock generating circuit and includes a first electronic component. In a falling edge of the clock signal, a voltage of the clock signal falls in multiple steps from a system high voltage to a first target voltage and then to a system low voltage, and in a rising edge of the clock signal, the voltage of the clock signal rises in multiple steps from the system low voltage to the first target voltage and then to the system high voltage.
US09601087B2

An information processing apparatus that includes a processor that controls a display to display a plurality of images in a stacked configuration, each of the plurality of images corresponding to one of a plurality of groups. The processor assigns movement corresponding to each of the plurality of images based on the respective location of each of the plurality of images in the stacked configuration.
US09601061B2

Most large public displays systems are built with smaller modules populated with light emitting pixels devices which are then connected together to form a larger surface which is the combined surface area of all the modules. This construction method creates the problem that the supporting and connecting structure that holds the modules together uses a generally small but not totally negligible space between each pair of modules, which is devoid of light emitting pixel devices, which, in turn creates a darker space between the modules. This problem is aggravated by the fact that the modules are generally rectangular, which causes that their edges continue from edge to edge of the whole display, causing darker lines on the display surface, generally horizontal and vertical darker lines. This invention discloses adding light emitting pixel devices on the supporting and connecting structure so that the image is continuous across the full display area.
US09601058B2

An OLED display device is disclosed which includes: a display panel configured with pixels which each include an organic light emitting diode and a driving transistor applying a driving current to the organic light emitting diode; a gate driver connected to the pixels through gate lines; a data driver configured to apply a sensing voltage to the pixels through data lines in a sensing mode and enable a sensing current to flow through each of the driving transistors; a sensing driver configured to sense threshold voltages opposite the driving currents which flow through the driving transistors; and a brightness compensation circuit configured to derive negatively shifted degrees of threshold voltages of the driving transistors from the sensed threshold voltages, detect a bright-defected pixel on the basis of the negatively shifted degrees, and generate a compensation gray value for the bright-defected pixel.
US09601056B2

A pixel includes an organic light emitting diode (OLED) having a cathode electrode coupled to a second power supply, a pixel circuit configured to control an amount of current supplied to the OLED to correspond to a previous data signal, and a driver configured to store a present data signal supplied from a data line and to supply the previous data signal to the pixel circuit. The OLED, pixel circuit, and driver may be controlled by signals in a frame that includes first through fourth periods, the second power supply may be set to a first voltage in the first and second periods and to a second voltage in the third and fourth periods, and the first voltage may be a voltage at which the OLED does not emit light and the second voltage may be a voltage at which the OLED emits light.
US09601052B2

A pixel of an OLED display is disclosed. A gate voltage of a driving transistor can be precisely adjusted using a second gate electrode that can supply DC power easily securing an operation range of an OLED. Further, by only adding one power line that can precisely adjust a gate voltage of a driving transistor to an OLED display, an operation range of the OLED can be easily secured and thus a drain current can be reduced without increasing a channel length of the driving transistor resulting in a narrower pixel area. According to various embodiments, the pixel can secure an operation range of the OLED by reducing a magnitude of a drain current by adjusting a gate voltage of a driving transistor.
US09601051B2

Provided are an organic light-emitting display comprising: a display panel which comprises a plurality of pixels, each of the pixels having an organic light-emitting diode (OLED); a sensor configured to detect degradation data indicating a degree of degradation of the OLED of each of the pixels and configured to calculate a degradation data difference between two or more adjacent pixels among the pixels; and a controller configured to set a compensation area utilizing the degradation data difference and configured to generate compensated image data by compensating in the compensation area in input image data.
US09601034B2

A cover assembly for a mattress is provided that includes a first cover and a second cover. The first cover includes a top panel, a bottom panel, and a continuous side panel collectively defining a cavity for enclosing the mattress. The second cover includes a top surface and a bottom surface, with the second cover being positioned over and dimensionally-sized to cover at least the top panel of the first cover. A fastener then connects the second cover to the first cover along the perimeter of the second cover. Methods for marking a mattress are also provided that include the step of marking an indicia indicative of a characteristic of a mattress on the top surface of the second cover of the cover assembly.
US09601032B2

Devices, systems, and methods appropriate for use in medical training that include materials that better mimic natural human tissue are disclosed. In one aspect a polysiloxane mixture for simulating human biological tissue, especially human breast tissue, is disclosed. In another aspect, a method of manufacturing a biological tissue ultrasound phantom is disclosed. In another aspect, a human breast tissue models are disclosed. In some instances, the human breast tissue model includes at least one simulated pathological structure that simulates such pathologies as a cyst, a medullary carcinoma, a ductal carcinoma, an infiltrating scirrhus carcinoma, a lobular carcinoma, and a fibroadenoma.
US09601030B2

A method and system are presented for performing virtual surgery simulations. The computer system includes a processor and a memory. The method includes receiving user input from a user via a user interface. The user input includes input representing surgical operations or non-surgical invasive procedures. The method also includes processing the user input and utilizing the input to generate or modify a computational model. The method also includes running simulations using the computational model in accordance with the user input. After running the simulations, the method further includes determining results from the simulations. The results correspond to probable effects or outcomes of performing real life surgical operations or non-surgical invasive procedures corresponding to the user input. Last, the method includes presenting the results to the user via the user interface.
US09601026B1

A training program is configured to systematically drive neurological changes to treat depression, mood and anxiety disorders. In one embodiment, a reward renormalization game presents a plurality of stimuli, a subset of which are positively affective, and the remainder of which are neutral or negatively affective, and prompts a game participant to respond to the positively affective stimuli and ignore the remainder of the stimuli. In another embodiment, an inference renormalization game presents a plurality of stimuli, a subset of which are positively affective, a second subset of which are negatively affective, and a third subset of which are neutral and prompts a game participant to respond to both the positively affective stimuli and the negatively affective stimuli and ignore the neutral stimuli.
US09601024B2

A system for enabling real time live proctoring of an exam across a distributed network includes a first remote computer. The first remote computer is capable of real time audio visual capture and display of an image of a user of the first remote computer. A second remote computer is capable of real time audio visual capture and display of an image of the user of the second remote computer. A server is in communication with the first remote computer and the second remote computer, and provides an interactive web based scheduling portal accessible from the first remote computer and the second remote computer. A database is associated with the server for storing data regarding the rules for proctoring of an exam including the rate at which an exam may be proctored at a given date and time. The server enables access to a virtual exam room by the first remote computer and the second remote computer in response to a request from the first remote computer through the scheduling portal for a date and time to take an exam administered at the first computer when the requested date and time fulfils the rules stored in the database.
US09601020B2

A collision determination device determines the possibility of collision between a host vehicle and the other object on the basis of a shortest arrival time calculated by a shortest arrival time calculation unit and a passage time at each point of the host vehicle acquired by a vehicle route candidate acquisition unit. In this way, even if a locus to be taken by the other object is not generated, the shortest arrival time at which the other object can arrive at each point of the route candidate of the host vehicle with a predetermined first displacement is calculated, thereby determining the possibility of collision between the host vehicle and the other object. Therefore, it is possible to reduce a computational load for determining collision and to accurately determine collision between the host vehicle and the other object.
US09601016B2

A communication system (10) includes a certificate authority (100) for performing authentication, a roadside device (110), a vehicle-mounted terminal (120), a first server (130), and a second server (140). The vehicle-mounted terminal transmits its position information to the first server. The certificate authority acquires information about a vehicle-mounted terminal likely to appear according to place and time from the first server. The certificate authority allows the second server to verify validity of a certificate for a vehicle-mounted terminal acquired from the first server. The certificate authority generates a first list of vehicle-mounted terminals having valid certificates and a second list of vehicle-mounted terminals having invalid certificates according to place and time based on a verification result. The certificate authority transmits the first and second lists to the roadside device and the vehicle-mounted terminal. The roadside device and the vehicle-mounted terminal verify a certificate using the first and second lists.
US09601014B2

The present invention extends to methods, systems, and computer program products for detecting targets across beams at roadway intersections. Embodiments of the invention include tracking a target across a plurality of beams of a multiple beam radar system in a roadway intersection and updating track files for targets within a roadway intersection. Returns from a plurality of radar beams monitoring a roadway intersection are divided into range bins. Identified energy in the range bins is used to compute the position of targets within a roadway intersection. When the position of a target is computed, it is determined if the position is a new position for an existing target or if the position is the position of a new target.
US09601006B2

Disclosed herein are system, method, and computer program product embodiments for synchronizing a state change at a universal remote control. An embodiment operates by sending a state change of the universal remote control to a remote-controlled device. The universal remote control then receives a confirmation message from the remote-controlled device. The universal remote control then updates a state configuration for the remote-controlled device in the universal remote control based on the sent state change. Because the universal remote control exchanges state change information with the remote-controlled device, the universal remote control does not become out of synchronization with the remote-controlled device which minimizes synchronization time and reduces user experience frustration.
US09600984B2

A method, device, and non-transitory computer-readable storage medium for generating a vibration from an adjective space are provided. The method includes providing an at least one-dimensional adjective space, inputting data to the at least one-dimensional adjective space based on a user input, and generating a vibration element vibration based on the data input to the at least one-dimensional adjective space. The device includes a control unit configured to provide an at least one-dimensional adjective space; and a user input unit configured to receive data input to the at least one-dimensional adjective space, wherein the control unit is further configured to generate a vibration element based on the data input to the at least one-dimensional adjective space.
US09600983B1

In a visual light communication (VLC) or other light based positioning system, a mobile device can detect modulated light emitted by one or more localized artificial lighting devices to obtain an identification (ID) label or code of each lighting device, e.g. that is visible in an image captured by the mobile device camera. The mobile device uses the detected ID code for a lookup in a self-stored or remotely stored table that associates light-source-location information with ID codes, to obtain an estimate of mobile device position. To mitigate against hacking by a third party detecting the ID codes and observing locations to compile its own lookup table, the disclosed examples dynamically alter the assignments of particular ID codes to the lighting devices, while minimizing potential disruption of position determination service for mobile devices due to the changes to ID code assignments.
US09600982B2

In some arrangements, product packaging is digitally watermarked over most of its extent to facilitate high-throughput item identification at retail checkouts. Imagery captured by conventional or plenoptic cameras can be processed (e.g., by GPUs) to derive several different perspective-transformed views—further minimizing the need to manually reposition items for identification. Crinkles and other deformations in product packaging can be optically sensed, allowing such surfaces to be virtually flattened to aid identification. Piles of items can be 3D-modeled and virtually segmented into geometric primitives to aid identification, and to discover locations of obscured items. Other data (e.g., including data from sensors in aisles, shelves and carts, and gaze tracking for clues about visual saliency) can be used in assessing identification hypotheses about an item. Logos may be identified and used—or ignored—in product identification. A great variety of other features and arrangements are also detailed.
US09600981B2

A user terminal for performing a cash withdrawal transaction comprises a reader for reading a user device, a processing resource configured to obtain from the user device account data representative of an account associated with the user device, and to receive a user request for a cash withdrawal in respect of the account, and an output device configured to issue, in response to the user request for a cash withdrawal, a token that is exchangeable for cash.
US09600976B2

Embodiments disclosed herein concern mobile gaming environments. Portable electronic devices can be supported by the mobile gaming environments. The locations of the portable electronic device can influence how the portable electronic devices operate or what services or features are available to the portable electronic device or their users. According to one embodiment, a mobile gaming system can concern gaming/betting opportunities that can be secured using a portable electronic device even when an individual is located in a location where betting or games of chance are not permitted. According to another embodiment, a mobile gaming system can concern an application program operating on a portable electronic device that supports multiple modes of operation depending upon whether the portable electronic device is in a location where betting or games of chance are permitted.
US09600971B2

A wagering apparatus enables play of that game on an underlying electronic gaming apparatus. The apparatus includes: a) a first player position and input controls at the first player position; b) the processor is in communication with the first player input controls; c) a first player seat at each first player position; d) a second player input control associated with the player seat more distal from the gaming apparatus than the first player seat; e) the second player input control in communication with the processor and having second player input controls that enable wagering on any wagering game on the gaming apparatus; and f) the processor configured to accept wagers from both the first player input controls and the second player input controls and to resolve wagers from the first player input controls and the second player input controls based upon game outcomes on the gaming apparatus.
US09600970B2

An electronic gaming machine includes a display for displaying a game including game symbols arranged into an array of predetermined game positions. An electronic game controller designates at least one of the predetermined game positions as a special game position in the array such that a special symbol appearing in the special game position in a play of the game causes the electronic game controller to award a game enhancing element to the player. The special game position is visually indicated on the array to the player during the play by a graphical element associated with the special game position. A gaming method is also provided.
US09600965B2

A modified gaming machine includes a plurality of gaming machine peripheral devices for use in implementing one or more games to a player, and a master gaming controller configured to implement primary gaming machine functionality, including generating and transmitting information to the plurality of gaming machine peripherals. The modified gaming machine further comprises a secondary controller interposed between one or more of the plurality of gaming machine peripheral devices and the master gaming controller, whereby the secondary controller may forward information generated by the master gaming controller to the gaming machine peripheral devices and transmit secondary information to the peripheral devices.
US09600959B2

In various embodiments, promotions are featured on mobile gaming devices.
US09600948B2

A keyless entry apparatus includes: a vehicle-side device provided in a vehicle, the device including a vehicle-side transmitter that transmits a request signal and a vehicle-side receiver that receives an answer signal; and a mobile device including a mobile device receiver that receives the request signal and a mobile device transmitter that transmits the answer signal in accordance with the request signal. The vehicle-side device includes at least one modulator that modulates the request signal, the mobile device includes at least one demodulator that demodulates the request signal in accordance with the corresponding at least one modulator, and the request signal includes a signal modulated by the at least one modulator. Switching between modulation methods for the request signal is performed at at least one timing.
US09600945B2

A method is disclosed for remote monitoring of a premises, comprising the steps of operatively coupling a geographically remote client to a security system server which is capable of authenticating a user of the remote client, operatively coupling the remote client to a security gateway which is capable of managing the monitoring of the premises, activating a signal at the premises for notifying an occupant at the premises that remote monitoring is occurring, and transferring information between the security gateway and the remote client. The transfer of information between the security gateway and the remote client is controlled by the user of the remote client. The security gateway may be operably coupled to at least one camera at the premises and to at least one audio station at the premises.
US09600942B2

A method and system for notifying an alarm state of a vehicle include displaying an alarm corresponding to an alarm state of an alarm state occurring in a vehicle, and determining whether a driver recognizes the displayed alarm. The alarm is displayed in a different manner based on a recognition frequency and duration of time the driver recognized the alarm when it is determined that the driver recognizes the displayed alarm. An alarm sound is output for a period of time when it is determined that the driver does not recognize the displayed alarm.
US09600941B2

An image, which can be analyzed by a computer and shows at least one face of an item, is generated for an item that is to be transported at a predefined time. By automatic analysis of the image, the arrangement determines, for at least one of a plurality of predetermined optically detectable features, the value of the feature for the image of the item. The identification feature value vector generated is automatically compared with stored registration feature value vectors. A record for a particular item contains six registration feature value vectors and each of the six registration feature value vectors specifies a value for each predefined optically detectable feature for each one of six faces of the item. When the identification feature value vector matches a stored registration feature value vector with sufficient accuracy, a message is generated.
US09600939B1

This disclosure relates to systems and methods for augmenting visual information to simulate an appearance of an object and/or a person at an adjustable position and angle. The visual information may be captured by an image sensor. The object and/or the person may have been captured at multiple angles. A user may select at which particular position and angle the appearance will be superimposed and/or otherwise combined with the visual information.
US09600934B2

A server to perform a selected therapy on a user. The server may include a processor which may obtain activity information (AI) including information related to one or more of augmented-reality (AR) activity information, AR anatomical feature information, and range-of-motion (ROM) information; obtain user information including information related to one or more of the anatomy and physiology of the user; determine expected range-of-motion (EROM) information in accordance with the AI and the user information; track selected body parts (SBPs) of the user corresponding with the AR anatomical feature information; and/or render one or more augmented-reality limbs (ARLs) in relation with one or more corresponding SBPs of the user on a display of the system.
US09600930B2

Methods and devices are described for optimizing display of information such as map data on a mobile device. Certain embodiments may include receiving, at a mobile device, a first and second set of placement data associated with a first and second object. The mobile device may then determine overlap between a representation of the first object and the second object in a rendering of an image comprising the representation of the first object and the second object, using a set of viewing parameters, the first set of placement data and the second set of placement data. The set of viewing parameters may be adjusted to reduce overlap between the representation of the first object and the second object in the rendering of the image. In additional embodiments, 3D enhancements to two-dimensional map objects may be added to enhance the presentation of the information.
US09600920B2

A method for creating an animation message includes generating input information containing information regarding input time and input coordinates according to input order of drawing information input through a touch screen; dividing an image containing the drawing information and background information into a plurality of blocks; creating an animation message by mapping the input information to the plurality of blocks so that the drawing information can be sequentially reproduced according to the input order; allocating a parity bit per pre-set block range of the animation message in order to detect an error occurring in the animation message; and transmitting the created animation message.
US09600918B2

A method includes displaying a background image on a display screen. The method further includes receiving, from an input device, a signal indicative of a free hand line being drawn over the background image. The signal includes coordinates of points of the free hand line with respect to the display screen. The free hand line is independent of content represented in the background image. The method further includes storing the signal in a storage device. The method further includes generating a smooth stiff line based on the stored signal. The method further includes displaying the smooth stiff line over the background image.
US09600914B2

An imaging system (10) generates a layered reconstructed radiograph (LRR) (66) of a subject. The system (10) takes as input a three-dimensional (3D) or higher dimensional data set (68) of the object, e.g. data produced by an image scanner (12). At least one processor (32) is programmed to define a set of two-dimensional (2D) projection images and associated view windows (60, 62, 64) corresponding to a set of voxel value (tissue) types with corresponding voxel value specification (50); determine the contribution of each processed voxel along each of a plurality of rays (72) through the 3D data set (68) to one of the predetermined voxel value (tissue) types in accordance with each voxel value with respect to the voxel value selection specification (50); and concurrently generate a 2D projection image corresponding to each of the voxel value specifications and related image view windows (60, 62, 64) based on the processed voxel values satisfying the corresponding voxel value specification (50). Each image is colorized differently and corresponding pixels in the images are aligned. An LRR (66) is generated by layering the aligned, colorized images and displaying as a multi-channel color image, e.g. an RGB image.
US09600913B2

An image reconstruction apparatus and related method. The amount of out-field-of view material for a CT scanner (IMA) with a given field of view (FoV) in a bore (B) is established. Based on the measurement, a hybrid-image reconstructor (RECONX) is configured to switch between different reconstruction algorithms.
US09600911B2

Imaging devices and processing techniques based on imaging information along the depth direction in an optical coherent tomography (OCT) image are disclosed to enhance observed morphological features. The methods and systems obtain different OCT images of the target object under different reference path lengths, process the different OCT images to obtain a derivative with respect to the signal path length of image information of the different images, and processing the derivative to extract improved image information of the target object. The derivatives may be in a form related to a gradient value of the normalized OCT image intensity, or an attenuation coefficient.
US09600909B2

Techniques are disclosed relating to storing processed texture information. In some embodiments, a graphics unit is configured to store graphics textures in multiple different formats. In some embodiments, texture filtering circuitry in the graphics unit is configured to operate on texture information in a particular format, but not configured to operate on texture information in one or more of the plurality of different formats. In some embodiments, graphics circuitry is configured to receive texture information in the multiple different formats and process the information to generate processed texture information in the particular format that the texture filtering circuitry is configured to operate on. In some embodiments, the graphics unit includes a storage element with entries configured to store the processed texture information, and the texture filtering circuitry is configured to access processed texture information in an entry of the storage element as input for multiple different sampling operations.
US09600898B2

A method and an apparatus for separating a foreground image are disclosed. The method includes obtaining an input image and depth information of the input image; roughly dividing the input image to obtain a rough foreground region based on the depth information of the input image; obtaining motion information of the input image, and generating a three-color image from the rough foreground region based on the motion information; and separating the foreground image from the generated three-color image. According to the method, the three-color image is generated based on the depth information and the motion information, thus a foreground object can be accurately separated from the three-color image.
US09600896B1

A method and system determines flows by first acquiring a video of the flows with a camera, wherein the flows are pedestrians in a scene, wherein the video includes a set of frames. Motion vectors are extracted from each frame in the set, and a data matrix is constructed from the motion vectors in the set of frames. A low rank Koopman operator is determined from the data matrix and a spectrum of the low rank Koopman operator is analyzed to determine a set of Koopman modes. Then, the frames are segmented into independent flows according to a clustering of the Koopman modes.
US09600890B2

The disclosure provides an image segmentation apparatus, an image segmentation method and a medical image device for segmenting an object having a tree-shaped tubular structure from a volume image consisting of a series of images photographed on the basis of slices. The image segmentation apparatus comprises: a self-adaptive region growing unit configured to perform region growing according to the volume image, based on a seed point and a preset threshold to obtain at least one part of the tree-shaped tubular structure; and a growing control unit configured to change the preset threshold to re-perform the region growing until a given condition is met.
US09600889B2

A method of performing depth estimation, the method comprising: estimating, at a higher spatial resolution of images, a global disparity map based on disparity between corresponding pixels of a stereo disparity map obtained from images forming a stereo image set associated with a passive depth estimation technique and an active depth map associated with an active depth estimation technique, wherein the disparity is estimated within a restricted range determined based on a disparity previously estimated between a stereo disparity map and an active depth map corresponding to a lower spatial resolution of the said images and map.
US09600887B2

Techniques for improved focusing of camera arrays are described. In one embodiment, a system may include a processor circuit, a camera array, and an imaging management module for execution on the processor circuit to capture an array of images from the camera array, the array of images comprising first and second images taken with first and second values of an exposure parameter, respectively, the first value different than the second value, to estimate a noise level, to normalize an intensity of each image based upon the noise level of the respective image, to produce a respective normalized image, to identify candidate disparities in each of the respective normalized images, to estimate a high dynamic range (HDR) image patch for each candidate disparity, and to compute an error from the HDR image patch and an objective function, to produce a disparity estimate. Other embodiments are described and claimed.
US09600867B2

The present invention relates to an image processing apparatus for filtering an image. Said apparatus comprises an image input (3) for obtaining a first and a second image of the same object, the first and second images comprising a plurality of voxels and being interrelated by a noise covariance, each voxel having a voxel value including a signal value and a noise value. A joint bilateral filter (3) is provided for filtering the first image, wherein a first voxel of the first image is filtered by a filter function including a relative voxel-specific weight, said weight including a likelihood of obtaining the voxel values of said first voxel and a second voxel in the first image and of a first voxel and a second voxel in the second image, assuming that the signal value of said first voxel of the first image is identical to the signal value of a second voxel of the first image and that the signal value of the first voxel of the second image is identical to the signal value of a second voxel of the second image. Said filtered image is provided at an image output (4).
US09600863B2

A method for combining images includes capturing a first image including a subject from a first camera. A second image is captured from a second camera and the second image includes the subject. First pre-processing functions are applied on the first image to produce a first processed image. The first pre-processing functions include applying a distortion component of a rotation matrix to the first image. The rotation matrix defines a corrected relationship between the first and the second image. Second pre-processing functions are applied on the second image to produces a second processed image. The second pre-processing functions include applying the rotation matrix to the second image. The first processed image and the second processed image are blended in a processing unit to form a composite image.
US09600857B2

Systems, methods and computer program products are disclosed for resampling a digital image. According to an implementation, a source image can be presharpened and upsampled to a first upsampled image having a specified image size and a first level of presharpening. The source image is also presharpened and upsampled to a second upsampled image having the specified image size and second level of presharpening that is less than the first level of presharpening. The first and second upsampled images are deblurred. A binary edge mask image is generated from the deblurred, upsampled images. The binary edge mask image is dilated and blurred to generate a deep mask image. The first and second, deblurred upsampled images are blended together using the deep mask image.
US09600853B2

Provided are a cloud server-based image processing method performed by an image processing terminal, and the image processing terminal and system therefor. The method includes determining whether an image processing function is to be performed by the image processing terminal or a server; and controlling at least one of the image processing terminal and the server to perform the image processing function, based on a result of the determining. When it is determined that the image processing function is to be performed by the server, data and a request signal related to the image processing function are transmitted to the server.
US09600852B2

A graphical processing unit having an implementation of a hierarchical hash table thereon, a method of establishing a hierarchical hash table in a graphics processing unit and GPU computing system are disclosed herein. In one embodiment, the graphics processing unit includes: (1) a plurality of parallel processors, wherein each of the plurality of parallel processors includes parallel processing cores, a shared memory coupled to each of the parallel processing cores, and registers, wherein each one of the registers is uniquely associated with one of the parallel processing cores and (2) a controller configured to employ at least one of the registers to establish a hierarchical hash table for a key-value pair of a thread processing on one of the parallel processing cores.
US09600846B2

A method of processing a set of data collected by at least one sensor at successive points on the travel over a plot of land by at least one vehicle. Each piece of the data being recorded with a time lag in relation to the vehicle passing a given point on the plot of the land, and being associated with a recording time and with a geographical position of a measuring point supplied by a geolocation system. An optimum difference value is estimated by minimizing a degree of projection of a three-dimensional map of values measured at each geographical point, and correction of the data being measured from this difference.
US09600842B2

Methods and systems in accordance with the present invention allow users to efficiently manipulate, analyze, and transmit eXtensible Business Reporting Language (“XBRL”) reports. They allow users to automatically build financial reports that are acceptable to governing agencies such as the IRS. In one embodiment, the reports are developed by a parser that transforms text documents into software elements containing a format with a hierarchal relationship between the software elements, and an editor that develops reports by referencing the software elements transformed from the text documents. Methods and systems in accordance with the present invention also enable reports to be automatically scheduled by gathering desired information from an accounting system, formatting the information into an XBRL document, and transmitting it to an end source. Furthermore, systems and methods in accordance with the present invention allow a user to translate an XBRL document into RDL format and use the RDL system to manipulate and analyze it.
US09600841B1

In general, the subject matter described in this disclosure can be embodied in methods, systems, and program products. A first third-party application program that was developed by a first entity receives a first request to purchase a first product for use within the first third-party application program. In response to receiving the first request, a purchasing user interface is customized to include first details that are specific to the first product. The purchasing user interface that includes the first details is displayed. A second request to purchase a second product for use within the second third-party application program is received from a second third-party application program that was developed by a second entity. In response to receiving the second request, the purchasing user interface is customized to include second details that are specific to the second product. The purchasing user interface that includes the second details is displayed.
US09600839B2

Embodiments of the invention are directed to systems, methods and computer program products for providing price evaluation based on electronic receipt data. An exemplary apparatus is configured to: identify purchase transaction data associated with identified electronic communications between a merchant and a customer, wherein the purchase transaction data includes product level data from a transaction; receive the identified purchase transaction data, wherein the purchase transaction data is received in an unstructured format; convert the purchase transaction data from the unstructured format to a structured format; associate the structured purchase transaction data with the customer's online banking application; aggregate purchase transaction data related to a first product purchased by a plurality of customers; determine a best price available for the first product based at least partially on an analyses of the purchase transaction data; and communicate the best price available for the first product to one or more parties.
US09600837B2

Anti-money laundering, anti-terrorist financing and other anti-crimes measures are enforced in compliance with the Bank Secrecy Act and the USA PATRIOT Act in the USA or equivalent laws in other countries, and crimes in financial transaction activities such as online banking, trading, money services, shopping, payment, etc. are reduced. Embedded identification information is read from a machine-readable official government issued identification document such as a passport, driver's license, etc., and such information is sent to a financial institution for approval and for anti-money laundering, anti-terrorist financing and other anti-crimes purposes.
US09600832B2

Provided is a method for advertising and retailing products and services in cloud gaming environments. A game provider may configure its cloud gaming environment to display third party advertisement before, during, or after the game. The advertisement may be in the form of timeout screens, banners, gaming objects, prizes, and other forms associated with typical cloud gaming environments. Third party advertisers benefit from additional advertisement exposure in these cloud gaming environments, which tend to be dynamic and interactive, and target new audience. Advertisement interaction levels may be measure to determine effectiveness and, for example, to collect certain fees from advertisers. An interaction level of interaction may be determined based on a number of clicks on advertisement objects, duration of exposure to the advertisement, a number of players, and various other factors. Game providers may modify their cloud gaming environments to improve these interaction levels and, as a result, collect more.
US09600828B2

A computing method and system is disclosed for analyzing interactions between a user and a customer support agent. Typical interactions include inquiries about a product or service, and a service call. When the user purchases a good or service, or successfully completes a service call, the customer converts, e.g. the sales pitch or service solution was successful. If the customer does not convert, then the interaction between user and agent is analyzed to determine why the user did not convert and whether the user should be categorized for potential retargeting.
US09600824B2

A system functions to recommend equipment expansions, additions and/or substitutions; interconnections; supplemental capabilities; features; etc. based upon a knowledge of a consumer's existing audio and/or visual system configuration.
US09600820B2

An image forming apparatus includes a first login unit configured to perform login processing on condition that a user is authenticated based on authentication information input by the user, and a second login unit configured to perform login processing on condition that money is inserted by a user. The apparatus further includes an image forming unit configured to perform image formation according to an instruction from a user who has logged in via the first login unit or the second login unit, and a detection unit configured to detect occurrence of an error that requires maintenance, during the image formation performed by the image forming unit. The apparatus further includes a display unit configured to display a different screen depending on whether the user has logged in via the first login unit or the second login unit, when the occurrence of the error is detected by the detection unit.
US09600819B2

A method and system for creating an assurance level based on authentication data attributes using a computer device coupled to a database are provided. The method includes receiving an authorization request associated with the financial transaction from the sender, the authorization request including a fraud risk assessment of the financial transaction determined by the sender using an authentication response received from the computer device by the sender, the authorization request including one or more reason codes associated with the sender fraud risk assessment. The method further includes transmitting the received authorization request to an issuer associated with the cardholder.
US09600818B2

An approach is provided for securely authenticating an identity of a user participating in an electronic transaction. A request for a biometric identifier/security question is converted to a first Quick Response (QR) code. Based on user attributes and a request from the user's mobile device to a computer to initiate the transaction, the first QR code is disassembled into first and second portions. The first portion, but not the second portion, is sent to the mobile device. Responsive to the mobile device reassembling the first QR code, receiving and converting the biometric identifier/answer to the security question to a second QR code, disassembling the second QR code into first and second portions, and transmitting the first portion of the second QR code to the computer, the second QR code is reassembled. The transaction is authorized based on whether the biometric identifier/answer matches a data repository record.
US09600811B2

A method and system for conducting an online payment transaction through a point of sale device. The method includes receiving input from a user selecting an item for purchase through the point of sale device; calculating a total purchase amount for the item in response to a request from the user to purchase the item; and sending payment authorization for the total purchase amount from the point of sale device to a payment entity, in which the payment authorization is sent to the payment entity via a mobile communication device of the user. The method further includes receiving a result of the payment authorization from the payment entity through the mobile communication device; and completing the payment transaction based on the result of the payment authorization.
US09600802B2

A method and an apparatus for providing an intelligence-oriented service using context information estimation in a mobile terminal are provided. In the method, a correlation relation between a low level context variable and a high level context variable is registered. The low level context variable is obtained from at least one data stored in the mobile terminal. The high level context variable is generated using at least one low level context variable. The high level context variable is provided to an upper application.
US09600801B2

Systems and methods for integrating research and incorporation of information into a construction specification involve providing information for potential inclusion in a specification to a user as part of the specification editing process so as to reduce the time spent in finding and researching information and including the information in the specification. A template specification with sections is provided, each section having one or more computer links corresponding to potential customization of the section with customized information. In response to selection of the link, construction information for potential inclusion in the template specification as a customization thereof corresponding to the selected computer link is retrieved from a database of construction information and is displayed adjacent the template specification. A selection of a portion of the construction information for inclusion in the specification is received, and an appropriate portion of the construction information is automatically incorporated into the specification.
US09600785B2

This disclosure relates to tools for optimizing complex processes or systems, such as flow process charts and, more specifically to the automatic graphical renderings of processes. In an exemplary embodiment, the process is a complex process including hundreds or thousands of operations. In an exemplary embodiment, a device displays a first view that includes a complete progression diagram automatically generated from data stored in a database, and at least some directional lines of the complete progression diagram unintelligibly overlap. In response to a selection of a particular operation in the complete progression diagram, in an exemplary embodiment, the display toggles to a second view that includes a focus diagram. In an exemplary embodiment, an edit to the focus diagram is checked in real-time and rejected if the edit orphans an object currently undergoing the process on a live production line.
US09600782B2

At a mobile information processing terminal, a close-range communication unit performs close-range communications with another mobile information processing terminal, a reception unit receives through the close-range communication unit a user identifier for uniquely identifying a user of an application for a social networking service (SNS) on the other mobile information processing terminal, a determination unit is configured to determine whether there is a match between the social networking service on the other mobile information processing terminal and an SNS used on the mobile information processing terminal, and when the determination unit determines that there is a match, the transmission unit transmits the received user identifier to a server of the SNS so as to register a user identified by the user identifier as a friend.
US09600775B2

Apparatus and methods of categorizing a subterranean formation including collecting data related to the formation, performing an algorithm comprising guided Bayesian survey design, identifying data observations to collect, and collecting additional data observations related to the formation. In some embodiments, the performing comprises forming a matrix or loading a matrix or both. Apparatus and methods of categorizing a subterranean formation including collecting data related to the formation, performing an algorithm comprising guided Bayesian survey design, identifying data observations to use, and processing the data observations wherein the observations require less processing time than if no algorithm were performed.
US09600772B1

Methods and systems enable a symbol-based descriptive information system to acquire various forms of awareness, including self-awareness. The methods and systems include an operations specification of awareness for the system, a process for acquiring awareness, and special symbols that support the various forms of awareness. For example, a system may include at least one processor and memory storing a database that includes symbols, definitions of symbols, and processing rules. One symbol in the database may be an awareness symbol and another may be a database symbol. The system may also include memory storing instructions that, when executed, cause the system to acquire awareness of at least one symbol from the database, acquire awareness of the system being aware using the awareness symbol, and acquire awareness of the system's information content and capabilities using the database symbol. The awareness and database symbols allow the system to gain the capability of self-awareness.
US09600762B2

A method for dynamically setting a neuron value processes a data structure including a set of parameters for a neuron model and determines a number of segments defined in the set of parameters. The method also includes determining a number of neuron types defined in the set of parameters and determining at least one boundary for a first segment.
US09600751B2

A network device communicates with a management server that manages a general-use setting an individual setting as a master data. The network device includes a first receiving unit configured to receive a first instruction associated with an input from a user for the general-use setting; a second receiving unit configured to receive a second instruction indicating an initialization processing; a first requesting unit configured to request for the management server in accordance with the first instruction; a second requesting unit configured to request for the management server in accordance with the second instruction; an executing unit configured to execute the initialization processing in accordance with the second instruction; a query unit configured to perform a query for the management server; and a reflecting unit configured to reflect the general-use setting, which is acquired from the management server in accordance with the query, for the database.
US09600748B2

A method is provided for determining a sheet height of a sheet conveyed by a sheet transportation unit. An optical sensor is used for sensing the surface geometry of the sheet, resulting in a two-dimensional height image of the sheet. The height image has pixels that have a value representing a local height of the sheet. The method comprises the steps of: a) selecting from the height image pixels that have a deviating value; b) substituting the deviating value of a selected pixel by a realistic value that is derived from not selected pixels; and c) determining a sheet height by finding a maximum value from the values of the not selected pixels and the substituted values. Furthermore, a print system is provided that comprises a control unit that is configured to apply the invented method.
US09600741B1

A plurality of instances of image data can be analyzed, and favored aspects of each instance identified and utilized in generating an enhanced output image. For example, a plurality of instances of image data can be analyzed to identify metric values associated with each pixel location, such as contrast, saturation, and exposedness. A weight map corresponding to each metric is generated for each instance of image data, each weight map indicating a value for the metric at each pixel location of the instance of image data. The weight maps associated with each instance of image data are merged, and a Gaussian pyramid of the merged weight map for each instance of image data is determined along with a Laplacian pyramid for each instance of image data. The Gaussian pyramids and Laplacian pyramids are merged into a Laplacian pyramid, which is then collapsed to form an enhanced output image.
US09600740B2

A system for automated mosaic-based vector editing comprising a mosaic imaging server that assembles image tiles to form larger image mosaics while correcting the image tiles for tonality and other visual characteristics, a vector analysis server that analyzes vector information, a routing calculation server that calculates routes from the vector information, and a rendering engine that produces visualizations from the routing information, and a method for image mosaic creation and correction.
US09600738B2

A system and method enable similarity measures to be computed between pairs of images and between a color name and an image in a common feature space. Reference image representations are generated by embedding color name descriptors for each reference image in the common feature space. Color name representations for different color names are generated by embedding synthesized color name descriptors in the common feature space. For a query including a color name, a similarity is computed between its color name representation and one or more of the reference image representations. For a query which includes a query image, a similarity is computed between a representation of the query image and one or more of reference image representations. The method also enables combined queries which include both a query image and a color name to be performed. One or more retrieved reference images, or information based thereon, is then output.
US09600734B2

A method, system, and device for analyzing images captured by a vehicle-based camera includes establishing a communication connection between a mobile communication device and an in-vehicle computing system. Scanning data may be retrieved from a scanning data server by the mobile communication device and, in some embodiments, forwarded to the in-vehicle computing system. A vehicle-base camera may be used to capture one or more images. An image analysis module of the in-vehicle computing system or mobile communication device may be used to analyze the captured image(s) for a match between the image(s) and the scanning data. In response to identifying a match, the mobile communication device may notify the scanning data server of the identified match.
US09600729B2

A system and method supporting signature verification. An input signature from a contact point of a stylus at a touch-sensitive surface is received. At least one sensor detects a first set of characteristics of the input signature that represents how the stylus is used when a present security level is a first level, and a second set of characteristics is determined when a present security level is a second security level. The second set of characteristics is a subset of the first set with fewer characteristics than the first set. One of the first set of characteristics or the second set of characteristics is transmitted to a characteristic receiving device to permit the input signature to be authenticated as a function, at least in part, of the first set or the second set of characteristics.
US09600726B2

This application discloses a method of provisioning an electronic device. The electronic device proactively broadcasts an advertising packet that includes a device identifier associated with the electronic device. A server receives the device identifier via a client device, and issues a link approval response when it verifies that the electronic device associated with the device identifier is available for provisioning in association with a user account. In response to the link approval response, the electronic device and the client device establish communication via a short range wireless link. The client device encrypts at least a portion of network credentials of a secure wireless network using a password key generated at the server, and provides the encrypted network credentials to the electronic device. The electronic device decrypts the encrypted network credentials using a key generated at the electronic device, and accesses the secure wireless network using the decrypted network credentials.
US09600722B2

An apparatus of this invention is directed to an information processing apparatus that aims to improve the quality of the ITC education based on the history of reactions or evaluations to education conducted by different educators to different educatees in different education site environments in education using education application software. An information processing apparatus includes an education site history accumulator that accumulates the history of pieces of education site information representing the reactions or evaluations of education site participants including an educator and an educatee at an education site using an education application software, and the education application software in association with each other, an education site information receiver that receives, from a communication terminal, the pieces of education site information acquired by the communication terminal or a device connected to the communication terminal, and an analysis information generator that generates analysis information of the education site from the received pieces of education site information and the history of the pieces of education site information.
US09600710B2

At least first and second digital images of the sample are acquired having different focal heights relative to a platform on which the cells are disposed. A contrast matrix is produced having elements computed in dependence upon the difference between the values of the corresponding pixels in the first and second images. A phase matrix is produced by convolution of the contrast matrix with a predetermined distance matrix. The phase matrix is used to assess characteristics of the sample, such as the presence of cells in the sample or the heights of cells in the sample.
US09600708B2

Provided is a transparent fingerprint recognizing sensor array, including: a pixel driving circuit formed on a substrate; an antistatic wiring disposed in an upper part of the pixel driving circuit; and a pixel electrode connected to the pixel driving circuit, wherein the pixel electrode is made of a transparent material or has an open formed in a center part thereof.
US09600700B1

Disclosed are a portable electronic device and an operation method thereof. The portable electronic device comprises a body, a barcode detector and a barcode decoder. In the barcode detector, a first image capturing module continually captures a barcode image when the portable electronic device is operating in the resting mode, a first buffering module temporarily stores the captured barcode image, and a first image processing module processes the stored barcode stored and counts a number of times when the barcode image has a predetermined pattern feature. When the number of times reaches to a threshold number, the barcode decoder is turned on to capture and decode the barcode image, and the barcode detector is switched to operate in a power-saving mode.
US09600695B2

A method for performing data transmission/reception using Near Field Communication (NFC) in a terminal includes loading a preset data transmission/reception policy upon recognizing a target device capable of communication using NFC; acquiring at least one sensing information used to determine a particular data transmission/reception operation; and determining the particular data transmission/reception operation based on the loaded data transmission/reception policy and the acquired sensing information.
US09600692B2

Disclosed aspects include managing access to a particular storage unit in a storage facility. The particular storage unit is coupled, in the storage facility, with both a particular storage unit identifier for the particular storage unit and an access management parameter for managing access to data on the particular storage unit. A device is used to identify the particular storage unit for write protection based on the particular storage unit identifier. In embodiments, the device includes an indicator to visually indicate a proper configuration and the particular storage unit identifier can be a world wide name. Aspects of the disclosure include managing the device for connection with the storage facility and access management for the storage facility.
US09600690B2

Sensitive pieces of information stored on an individual's device can be protected using a device identification system that applies, for each sensitive piece of information, a function that integrates an identifier of the individual with a respective sensitive piece of information to create a respective identity element. Each identity element can be signed with a signature to create a trust group. The identity element and signature can be uploaded to the individual's device using an application that is configured to provide a subset of the sensitive pieces of information in response to a query.
US09600685B2

Provided are techniques for deleting sensitive information in a database. One or more objects in a database that are accessed by a statement are identified. It is determined that at least one object among the identified one or more objects contains sensitive information by checking an indicator for the at least one object. One or more security policies associated with the at least one object are identified. The identified one or more security policies are implemented for the at least one object to delete sensitive information.
US09600683B1

The disclosed embodiments provide a system that processes data. The system includes a first client that encrypts a first set of data, uploads the encrypted first set of data to a volume on a cloud storage system, and creates a commit record of the upload. The system also includes a synchronization server that verifies access to the volume by the first client and includes the commit record in a change set containing a set of commit records associated with the volume. The synchronization server also signs the change set and provides the change set for use in synchronizing the upload with a second client.
US09600680B2

Facilities are provided herein for unmasking content presented on a display of a computing device. An unmask rule for unmasking the content on the display is determined based on confidentiality level of the content and includes an unmasking parameter indicating an extent to which a masked version of the content is to be physically shielded to unmask the content. A mask is selected and applied to the content in displaying the content on the display. The mask is selected based on the determined unmask rule to convey the unmasking parameter to a user. A shielding level indicating an extent to which the user has physically shielded the masked content on the display is detected and it is determined whether the detected shielding level satisfies the unmasking parameter. If so, the content is temporarily unmasked on the display.
US09600673B2

A risk evaluation method and a risk evaluation device for evaluating an anonymous dataset generated according to an original dataset are provided. The risk evaluation method comprises the following steps. Acquiring a plurality of appearing times respectively corresponding to a plurality of original values of the original dataset. Generating a partition set and a weight table according to a sample parameter, an anonymous parameter and the appearing times. Dividing the original dataset into a plurality of data partitions according to the partition set, and generating a penetration dataset according to the weight table and the data partitions, wherein the penetration dataset comprises a plurality of sample data. Comparing each sample data with a plurality of anonymous data of the anonymous dataset to obtain a plurality of matching quantities respectively corresponding to the sample data. And calculating and outputting a risk evaluation result according to the matching quantities.
US09600658B2

A technique for generating passwords. The technique includes displaying objects, enabling a degree of simplicity to be set for a password, and generating a password in accordance with the established degree of simplicity. The technique also includes superimposing and displaying a secondary object icon for at least one secondary object available to a primary object on top of the primary object icon for the primary object, and the superimposing and display entails either superimposing and displaying a display on the superimposed secondary object icon to indicate whether or not the superimposed secondary object is available on the basis of the degree of simplicity, or changing the superimposed secondary object icon so as to differentiate the availability of the superimposed secondary object on the basis of the degree of simplicity.
US09600653B2

Providing registration for password/challenge authentication includes receiving an access code or pattern inputted by a user, recording a time message associated with each component of the access code or pattern via a processor, generating a data record in combining each component of the access code or pattern with the associated time message, and storing the data record.
US09600650B2

Methods of configuring a different authority for a plurality of users to use at least one application in an electronic device. User inputs are received to set passwords for respective user levels, where each user level is associated with a different authority to access applications. The passwords are registered for the respective user levels. At least one application is associated with one of the user levels.
US09600644B2

The invention provides a computer-implemented method of analyzing symbols in a computer system, the symbols conforming to a specification for the symbols, in which the specification has been codified into a set of computer-readable rules; and, the symbols analyzed using the computer-readable rules to obtain patterns of the symbols by determining the path that is taken by the symbols through the rules that successfully terminates, and grouping the symbols according to said paths, the method comprising; upon receipt of a message at a computer, performing a lexical analysis of the message; and, in dependence on lexical analysis of the message assigning the message to one of the groups identified according to said paths. The invention also provides a computer programmed to perform the method and a computer program comprising program instructions for causing a computer to perform the method.
US09600628B2

A method comprising using at least one hardware processor for applying a mapping function to a medical image, to generate a semantic description of a visual finding in the medical image. The mapping function is optionally an MRF (Markov random field)-based, SVM (Support Vector Machine) mapping function.
US09600627B2

A computer-based genomic annotation system, including a database configured to store genomic data, non-transitory memory configured to store instructions, and at least one processor coupled with the memory, the processor configured to implement the instructions in order to implement an annotation pipeline and at least one module filtering or analysis of the genomic data.
US09600614B2

System and method of automatically performing flip-flop insertions for each net in a logic interface by using the RTL-estimated maximum count as a limit. Based on the timing analysis on the physical layout, a flip-flop insertion count needed for each net is derived and candidate locations for insertions are automatically detected. A set of constraints is applied to identify ineligible locations for flip-flop insertions. If more flip-flop insertions than the count limit are needed to satisfy the timing requirements for a net, timing-related variables are iteratively adjusted using the current layout until the timing requirements can be satisfied using the RTL count limit. If all the nets in the interface need fewer flip-flop insertions than the RTL count limit, the information can be fed back to update the RTL count limit. Each net is then parsed and flip-flops are inserted at appropriated locations.
US09600605B2

An antenna design method executed by a computer includes creating an antenna model including an antenna which includes a plurality of antenna elements and matching circuits which are respectively connected to the plurality of antenna elements and which comprise a matching element including a parasitic reactance and a loss resistance; obtaining a characteristic of the antenna and a characteristic of the matching element; calculating a characteristic of the created antenna model using the obtained characteristic of the antenna and the characteristic of the matching element; judging whether or not the calculated characteristic of the antenna model satisfies a standard value; and displaying result of the judgment.
US09600602B2

A method for data management. The method includes a computer selecting a first data record and a second data record. The computer determines whether the first data record and the second data record share a deterministic matching category. Responsive to determining the first data record does not share a deterministic matching category with the second data record, the computer determines whether the first data record and the second data record share a probabilistic matching category.
US09600597B2

A method, computer readable medium, and system for processing a structured document are disclosed. The method, computer readable medium, and system include identifying a plurality of strings processed by a database, assigning an identifier to each of the plurality of strings, storing each of the plurality of strings and its assigned identifier in a table in the database, and utilizing the table during document processing.
US09600593B2

A communication system includes an information processing apparatus and a communication apparatus. The information processing apparatus comprises a controller configured to acquire a file that indicates feed location information and a title of a feed to be acquired in accordance with the feed location information. The controller controls the display to display at least one of the feed location information described in the file and the title described in the file, and to display at least one of the feed location information registered in a device management unit and the title registered in the device management unit. Moreover the controller registers, into the device management unit, feed location information or feed location information corresponding to a title displayed on the first portion of the display, which is specified by the user.
US09600589B2

A method of Webpage navigation can include a computer device loading a Webpage having at least a first portion and a second portion, arranging the Webpage in order to present the first portion in the display area of the computer device and to place the second portion out of the display area, and presenting a navigation map corresponding to the Webpage in the display area. In response to a control command input with respect to the navigation map, the Webpage can be arranged in order to present the second portion in the display area.
US09600581B2

This disclosure describes systems and methods for selecting and/or ranking web-based content predicted to have the greatest interest to individual users. In particular, articles are ranked in terms of predicted interest for different users. This is done by optimizing an interest model and in particular through a method of bilinear regression and Bayesian optimization. The interest model is populated with data regarding users, the articles, and historical interest trends that types of users have expressed towards types of articles.
US09600571B2

A method of maintaining interoperability amongst Internet of Things (IoT) devices connected via an IoT integration platform is disclosed. The method includes: receiving a selection of a semantic label associated with an IoT device; determining a recommendation of an interoperable rule based on the semantic label, the interoperable rule having a condition trigger and an action policy for execution at satisfaction of the condition trigger; presenting the recommendation on a rule management interface; and receiving a confirmation from a user through the rule management interface to activate the interoperable rule.
US09600562B2

Embodiments of the present disclosure relate to the field of database technology. More specifically, embodiments of the present disclosure relate to a method and system for importing E-R model data utilizing dependency information in an E-R model data schema. This disclosure provides a method for importing E-R model data, comprising: receiving an imported E-R model data file and a data schema of the E-R model; determining a dependency type of each entity in the data file based on the data schema, wherein the dependency type corresponds to at least one of no correlation, weak correlation, or strong correlation; and correspondingly importing each entity in the E-R model data file based on the determined dependency type.
US09600559B2

Embodiments relate to a method, system, and computer program product for database aggregation operations. The method includes acquiring data located in data pages of extents and performing a database aggregation operation pre-processing on the acquired data. The method also includes storing the result of said pre-processing in summary data pages, the summary data pages being used for performing database aggregation operations rapidly.
US09600556B2

An apparatus is described comprising at least one processor; and memory storing instructions that, when executed by the at least one processor, cause the apparatus to: organize items of raw data received from at least one sensor of a vehicle as a first data structure, organize classified data objects as a second data structure, and link at least one item of the first data structure to at least one object of the second data structure.
US09600555B1

Systems and methods are disclosed for object-based commands and functions. In an embodiment, an apparatus may comprise a data storage device configured to store data as variable-size objects, each object including a tracking indicator to identify the object, and to receive a command including an operation directed to an object and an indicator that specifies a variation of the operation to be performed. Tracking indicators may be selected by a host, and may have specific organization meaning to the host. A tenant accessing the data storage device may be restricted to accessing objects within one or more specific ranges of tracking indicators.
US09600552B2

Techniques for a method for automatically synchronizing application state across multiple devices are disclosed herein. The method includes running an instance of a computer application at a first electronic device, detecting a presence of a second electronic device based on a proximity of the second electronic device to the first electronic device, identifying an installation of another instance of the computer application on the second electronic device, and transmitting an application state data to the second electronic device. The application state data represents an application state of the computer application at the first electronic device. The application state data of the computer application enables another instance of the computer application at the second electronic device to resume running the computer application from the transmitted application state.
US09600545B2

A method and system that enables data to be shared across application systems via a table substitution scheme. Tables are identified in the legacy application system that are candidates for substitution of tables in the core application system containing similar data. Table structure meta data corresponding to these “substituted” tables are then extracted from the legacy system schema, and stored in a repository. In accordance with the meta data, business logic is defined to remap columns in the core tables to corresponding columns in the substituted tables. Accordingly, when the core application system performs data access (e.g., reads, inserts, updates, etc.), it accesses the remapped columns in the substituted tables instead of original columns in the core tables. At the same time, the legacy application system is enabled to concurrently access the substituted tables without require any changes to the business logic of the legacy application system.
US09600540B1

Event data collected for a given event is obtained, wherein the event data comprises a plurality of time series data sets. The plurality of time series data sets are divided into a set of time windows (e.g., epochs). Data in the plurality of time series data sets occurring within each time window of the set of time windows is aligned. A metric is computed for each aligned time window, wherein the metric for each aligned time window represents a measure of at least one of completeness and support attributable to data in the aligned time window. Data is pruned from the set of event data for one or more of the set of time windows based on the computed metrics. The pruned event data is provided to a data analytics process which is configured to further process the pruned event data.
US09600535B2

In various example embodiments, a system and method for limiting shares of voice of individual users in a result set are provided. In example embodiments, an entity providing each entry in a result set of a search is identified. Sorting criteria including a size rule that includes a sort size value defining a maximum number of consecutive publications from a same entity are retrieved. A sorted result set is generated in compliance with the sorting criteria by shifting a publication from the same entity down one or more positions in order to satisfy the sorting criteria. The sorted result set is provided to a searching user.
US09600531B1

Embodiments for presenting search content is provided herein. An embodiment includes, receiving an input string in a browser input receiver, presenting a list of identifiers and search queries, wherein at least a portion of each of the identifiers and search queries match the input string, and presenting one or more search results associated with a selected search query on a display or providing a HTTP request to retrieve content associated with a selected identifier, and presenting the content on the display.
US09600525B1

Joining sets of tables on a join attribute using a predefined amount of memory. A set of tables is stored on disk storage. The largest table is a streaming table. The remaining tables form a subset of tables. For each subset table, a hash table is generated, resulting in a subset of hash tables. A group of not yet joined hash tables is determined such that the size of the tables is smaller than the amount of memory. The tables are loaded to the memory. A hash join is performed between the streaming table and the group of tables, forming a temporal joined table. If the subset includes a not yet joined table with the streaming table, a further set of tables with the not yet joined and the temporal joined table is formed. The above operations are repeated using the further set of tables as the set of tables.
US09600515B2

For efficient calculation of both similarity search values and boundaries of digest blocks in data deduplication, input data is partitioned into chunks, and for each chunk a set of rolling hash values is calculated. A single linear scan of the rolling hash values is used to produce both similarity search values and boundaries of the digest blocks of the chunk. The rolling hash values are used to contribute to the calculation of the similarity search values and to the calculation of the boundaries of the digest blocks.
US09600509B2

To facilitate access to public records, the present inventors devised, among other things, an entity resolution system. The exemplary system includes master records database of 300 million entities, which is partitioned into multiple distinct portions. The exemplary system extracts entity information from input public records and constructs one or more blocking queries against specific portions of the master records database to identify one or more sets of candidate records. Feature vectors are defined for the candidate records and machine learning techniques, such as Support Vector Machine, are used to determine which of the candidate records from the master records database match the input public records. Candidate records that match are logically associated with public records, enabling ready access via direct or indirect queries.
US09600505B2

A system includes reception of a plurality of findings output by runtime checks executed by a plurality of computing systems, determination of whether a first one of the findings is a duplicate of an already-stored finding, storage, in a case it is determined that the first finding is not a duplicate of an already-stored finding, of the first finding in association with a finding identifier, and generation of a message including the finding identifier and information describing a problem associated with the finding.
US09600503B2

Techniques provided herein allow for management of data. In various embodiments, systems and methods prune and retain data being managed by a data management system, where the managed data can include log data aggregated from one or more servers for analysis purposes. According to some embodiments, pruning can be triggered according to one or more constraints, such as the age of managed data (e.g., retain only 30 days of managed data) or the memory space required to store the managed data (e.g., retain only 100 GB worth of managed data). The constraints that trigger data pruning can be based on a data retention policy. When triggered, pruning can be performed on a fraction of the managed data stored based on the data retention policy (e.g., 3 days of full managed data, 27 days of pruned managed data). The pruning may be performed by sampling, at a desired rate, the managed data.
US09600499B2

A system for comprehensively and effectively acquiring, as an interest graph, targets and regions of interest unique to a user is provided. A system according to the invention is a search system using as input means image information containing various objects and subjects, in which by querying an image recognition engine on the server side via a network about a selected image, the image recognition engine extracts and recognizes in real time various generic objects and the like contained in the specified image, and notifies a relevance search engine on the server side of recognized image components contained in the input image, and the relevance search engine extracts related elements for the individual image components, and visually presents a relevance graph with the extracted related elements as nodes together with the depths of relationships between the nodes.
US09600492B2

Systems and methods of data processing performance enhancement are disclosed. One embodiment includes, invoking operating system calls to optimize cache management by an I/O component; wherein, the operating system calls are invoked to perform one or more of; proactive triggering of readaheads for sequential read requests of a disk; purging data out of buffer cache after writing to the disk or performing sequential reads from the desk; and/or eliminating a delay between when a write is performed and when written data from the write is flushed to the disk from the buffer cache.
US09600488B2

Techniques and mechanisms are provided to allow for selective optimization, including deduplication and/or compression, of portions of files and data blocks. Data access is monitored to generate a heat index for identifying sections of files and volumes that are frequently and infrequently accessed. These frequently used portions may be left non-optimized to reduce or eliminate optimization I/O overhead. Infrequently accessed portions can be more aggressively optimized.
US09600480B2

The present disclosure provides various systems and methods for indexing digital (electronic) documents. The systems and methods may utilize various software, hardware, and firmware modules to identify notations, such as sheet names, anchors, and anchor references on construction documents. The identified notations are indexed and used to create hyperlinked pages that are easily navigable. In some embodiments, the hyperlinked pages may include previous- and next-sheet hyperlinks that allow for direct navigation within a set of pages, according to an order provided in an index.
US09600476B2

A method, system and computer program product for managing hardware components in a cloud computing environment. A mobile device captures an image of a bar code placed on a rack that is associated with an identifier that references an Internet resource of the management software that manages the rack. The mobile device transmits a request to the management software for information regarding a component in the rack, where the request includes a unique identifier (e.g., serial number) associated with the component. The management software uses the unique identifier to identify the component of interest and transmits information regarding the component of interest to the mobile device. In this manner, the client device can conveniently access the management software as well as conveniently acquire information dynamically from the management software about specific hardware components in these racks while the user is on the floor of the data center.
US09600475B2

According to one embodiment, a speech translation apparatus includes a speech recognizer, a detector, a machine translator and a controller. The speech recognizer performs a speech recognition processing in chronological order on utterances of at least one first language made by a plurality of speakers to obtain a recognition text as a speech recognition result. The detector detects segments of meaning of the recognition text to obtain segments of text. The machine translator translates the segments of text into a second language different from the first language to obtain translated texts. The controller controls, if an utterance overlaps with another utterance in the chronological order, an order of displaying the translated texts corresponding to the overlapped utterances.
US09600468B2

A boundary word identification unit (103) identifies a boundary word belonging to a plurality of categories among words gathered in dictionary growth processing. Then, a category membership degree calculation unit (104) calculates, for each category to which the boundary word belongs, a category membership degree indicating a degree to which the boundary word belongs to the category on the basis of information recorded in a gathering process memory unit (108). Next, a category update unit (105) determines the category to which the boundary word belongs on the basis of the category membership degree calculated by the category membership degree calculation unit (104) and updates information stored in a gathered-by-category word memory unit (109) so that the determination result is reflected.
US09600460B2

A digital publishing platform enables users to create and organize notes associated with electronic, published documents. Sets of notes, each associated with a document, are uploaded to the publishing platform by notepad applications executing on user devices. Each set of notes has one or more notes, and each note includes a link to a location in the associated document. The publishing platform is configured to aggregate a plurality of sets of notes, combining the notes of the sets into a single set while maintaining their link to an associated document.
US09600459B2

A Visual Macro Program records and replays desired actions performed by a user in creating or editing a document. The recorded actions are appended to the document as an attachment that can be replayed by a user at a later time by enabling a tag associated with the recorded actions.
US09600458B2

Methods and systems are provided for styling elements of a web document at a time of rendering the web document. In one embodiment, a method comprises: performing steps on a processor. The steps comprise: identifying a rule associated with a property of an element of the web document; determining whether the rule is to be grouped with multiple elements of the web document; generating an overriding rule when the rule is associated with multiple elements of the web document; and updating a style sheet based on the overriding rule.
US09600454B2

A method to generate an effective schema of an electronic document for optimizing the processing thereof may include performing a programmatic analysis to determine all required portions of the electronic document. The method may also include generating a parser or deserializer to build an optimized document model; and specializing a document processing program against the optimized document model.
US09600453B2

Multimedia content is featured on user pages of an online social network using embed codes that are generated using a configuration file associated with the source ID for the multimedia content and a content ID for the multimedia content. The configuration file, the source ID and the content ID are stored locally by the online social network so that any changes to the embed codes can be made by changing the configuration file associated with the source and regenerating the embed codes. By managing multimedia content in this manner, greater control can be exercised by the online social network over the multimedia content that are featured on its user pages.
US09600452B2

Creating and delivering advertisements within wrapped packages of cards, which selectively include (i) media content, including advertisement(s) for item(s) available for purchase, (ii) application functionality and/or (iii) e-commerce related transactional services. By defining the sequence order in which the cards are navigated when consumed, wraps may deliver advertisements in the context of a “story” or “narrative”, which unfolds as the cards are sequentially browsed, similar to the turning of the pages of a book or magazine. Ads thus become more compelling. In addition, with built-in transactional functionality, advertised Item(s) can be immediately purchased without having to exit the wrap.
US09600446B2

A preconditioner processor and a method of computing a preconditioning matrix. In one embodiment, the preconditioner processor has parallel computing pipelines including: (1) a graph coloring circuit operable to identify parallelisms in a sparse linear system, (2) an incomplete lower triangle, upper triangle factorization (ILU) computer configured to employ the parallel computing pipelines according to the parallelisms to: (2a) determine a sparsity pattern for an ILU preconditioning matrix, and (2b) compute non-zero elements of the ILU preconditioning matrix according to the sparsity pattern, and (3) a memory communicably couplable to the parallel computing pipelines and configured to store the ILU preconditioning matrix.
US09600440B2

An interconnection system comprising a plurality of nodes, each comprising at least two ports, and a plurality of links configured to interconnect ports among the nodes to form a hierarchical multi-level ring topology, wherein the ring topology comprises a plurality of levels of rings including a base ring and at least two hierarchical shortcut rings, and wherein each node connected to a higher-level shortcut ring is also connected to all lower-level rings including the base ring.
US09600436B2

A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction.
US09600432B2

A verification environment enables verification of runtime switch-over—i.e., a switch-over without restarting the device under test—between multiple I/O protocols that share a same physical interface. The device under test can be a switch unit having multiple logical protocol processing units and a logical protocol multiplexor. The verification environment includes a switch-over detector which monitors the state of the device under test, and a switch-over controller that controls the switch-over sequence by pausing and re-starting traffic on all or specific protocol drivers of the verification environment.
US09600431B2

A set of training sequences is generated, each training sequence to include a respective training sequence header, and the training sequence header is to be DC-balanced over the set of training sequences. The set of training sequences can be combined with electric ordered sets to form supersequences for use in such tasks as link adaptation, link state transitions, byte lock, deskew, and other tasks.
US09600430B2

Provided is a computer-implemented method of managing data paths between a computer application and a storage device. The I/O (input/output) load data of a computer application is obtained. If the I/O load data of the computer application is above a pre-determined threshold, data paths are provisioned between the computer application and the storage device based on a pre-defined policy applicable to the computer application.
US09600429B2

A data processing system comprising: a host computer system supporting a software entity and a receive queue for the software entity; a network interface device having a controller unit configured to provide a data port for receiving data packets from a network and a data bus interface for connection to a host computer system, the network interface device being connected to the host computer system by means of the data bus interface; and an accelerator module arranged between the controller unit and a network and having a first medium access controller for connection to the network and a second medium access controller coupled to the data port of the controller unit, the accelerator module being configured to: on behalf of the software entity, process incoming data packets received from the network in one or more streams associated with a first set of one or more network endpoints; encapsulate data resulting from said processing in network data packets directed to the software entity; and deliver the network data packets to the data port of the controller unit so as to cause the network data packets to be written to the receive queue of the software entity.
US09600427B2

A receiver circuit includes: a plurality of first holding circuits respectively latching a plurality of reception data pieces on the basis of a same clock signal; a comparison circuit respectively comparing first reception data pieces and second reception data pieces after a certain time elapses since the latch of the plurality of first holding circuits, the first reception date pieces being respectively latched by the plurality of first holding circuits, the second reception data pieces being respectively input to the plurality of first holding circuits; and a plurality of second holding circuits respectively latching the first reception data pieces when a first output signal of the comparison circuit indicates that the first reception data pieces and the second reception data pieces are identical.
US09600425B2

A method for serial data transmission in a bus system having at least two subscribed data processing units, the data processing units exchanging messages via the bus, the transmitted messages having a logical structure in accordance with the CAN standard ISO 11898-1, the logical structure including a start-of-frame bit, an arbitration field, a control field, a data field, a CRC field, an acknowledge field and an end-of-frame sequence, the control field including a data length code, which contains information regarding the length of the data field. The CRC field of the transmitted messages may have at least two different numbers of bits as a function of the content of the data length code.
US09600415B1

Disclosed is a method of managing a storage server in a database system. Provided is a storage server including a cache device to store at least one block that includes data; a permanent storage medium to record the at least one block stored in the cache device; and a controller to record the at least one block stored in the cache device in the permanent storage medium, wherein the controller includes a grade determiner to determine a grade of each of the at least one block based on a size of each of the at least one block; a victim block determiner to determine a victim block to be recorded in the permanent storage medium among blocks stored in the cache device based on the determined grade of each of the at least one block; and a block recorder to record the determined victim block in the permanent storage medium.
US09600411B2

A system and method determines an object's lifetime. An object lifecycle engine may work with an object oriented environment. As objects are created, an object graph may be constructed having one or more roots. A root record graph may be constructed, and edges of the root record graph may point in an opposite direction than the edges of the object graph. As objects, entities, and references are added, removed, or deleted from within the environment, the object graph and the root record graph may be updated. A root finder may search the root record graph to determine whether a given root record is no longer rooted. If a root record is no longer rooted, then the object associated with that root record may be determined to be unreachable and at the end of its lifetime. If the root finder search is performed when references are removed, then objects may be destroyed in a deterministic manner.
US09600410B1

Providing a RRAM based memory storage device that has a NAND memory type architecture with a configurable page size. In an embodiment, two memory registers can be used to access and transfer data stored in the storage device to a host. A memory controller on the storage device can determine a page size of the host, and alternately transfer data from the first register and then the second register until an amount of data transferred equals the page size of the host. The memory controller can send the data to the host as if the data belonged to one page transfer. In this way, the memory controller creates a virtualized page size based on the requirements of the host.
US09600407B2

A method is described that entails receiving an address for a read or write transaction to a non volatile system memory device. The method further involves determining a usage statistic of the memory device for a set of addresses of which the address is a member. The method further involves determining a characteristic of a signal to be applied to the memory device for the read or write transaction based on the usage statistic. The method further involves generating a signal having the characteristic to perform the read or write transaction.
US09600399B2

Disclosed are a content recording method and device, for use in software development. The method includes: capturing the content displayed on a screen in the software development process; acquiring a mouse event related to the content displayed on the screen; and processing the mouse event and the content displayed on the screen to obtain the recorded content, the recorded content containing the content displayed on the screen and the mouse event. The technical solution can record a screen capture and a mouse/keyboard operation related thereto in the software test development process, thus effectively recording the test and development process, and improving test and development efficiency.
US09600397B2

When a module is loaded by the operating system kernel, dynamic information of the module, such as the memory addresses of the different sections of the module allocated by the operating system, is stored in a known variable, which is subsequently accessible by the debugging tool. Furthermore, an interrupt instruction that will allow the debugger to interrupt the running of the operating system following the complete loading of the module is inserted into the debugging tool in such a way as to retrieve the dynamic information necessary for the debugging of the module.
US09600396B2

Computer-implemented systems and methods are provided for determining application matching status. In one implementation, a method is implemented with one or more processors and includes accessing, at a server, a first dependency tree representing a first application and a second dependency tree, and acquiring one or more values for the first dependency tree and one or more values for the second dependency tree. The method also includes comparing the one or more values of the first dependency tree with the one or more values of the second dependency tree. The method further includes determining a matching status between the first application and an application represented by the second dependency tree based on the comparison, and providing, for display, an indication of the matching status.
US09600395B2

A method for determining an extent of code changes upon implementation of a software modification has the steps of: registering the number of software code components and the respective number of lines of code of each software component of a software code before the implementation of the software modification, implementing the software modification by changing the software code, determining the number of software code components that have changed due to the implementation of the software modification, determining the number of lines of code of each software component that have changed due to the implementation of the software modification, and determining an invasiveness value on the basis of the determined number of software code components that have changed and determined number of lines of code that have changed, the invasiveness value being indicative of the extent of software code changes upon implementation of the software modification.
US09600391B2

A correlation model generation unit generates a plurality of correlation models each expressing correlations between different types of performance values in a predetermined period, which are stored in a performance information unit. A model setting unit selects, from among the plurality of correlation models generated by the correlation model generation unit, a basic model which is a correlation model showing the highest fitting degree and one or more specific models which are correlation models other than the basic model, on the basis of a fitting degree of each of the correlation models for the performance information in the predetermined period, and sets time periods on which the basic model and the specific models are applied respectively to failure detection.
US09600385B2

A method of analyzing behavior of a device under test includes obtaining event traces that include a current sequence trace and a reference sequence trace. The event traces include one or more transactions that include one or more properties. A list of relevant properties of one or more transactions is obtained. A first set of n-tuples including values of the relevant properties for the current sequence trace is extracted. A second set of n-tuples including values of the relevant properties for the reference sequence trace is extracted. The first set of n-tuples is compared with the second set of n-tuples to indicate one or more transaction indices corresponding to differences in transactions between the current sequence trace and the reference sequence trace. Transactions corresponding to the transaction indices are annotated to obtain annotated transactions. The current sequence trace and/or the reference sequence trace are displayed with the annotated transactions.
US09600384B2

Disclosed herein are method, system and computer program product embodiments for improving the verification process of a system on chip (SoC). An embodiment operates by employing an active interconnect (AIC) between a processing subsystem (e.g., a central processing unit or CPU) and a plurality of peripherals, wherein the processing subsystem is linked to a plurality of applications via a plurality of drivers, and implementing a common set of software codes by at least one of the applications for a software development process and a hardware verification process. The AIC includes a plurality of communication protocols. During the software development process, the AIC configures at least one of the communication protocols to not enforce a timing limitation on one or more transactions between the processing subsystem and at least one of the peripherals, and a high-level programming language model is used for the peripherals. During the hardware verification process, the AIC configures at least one of the communication protocols to enforce a timing limitation on one or more transactions between the processing subsystem and at least one of the peripherals, and a register-transfer level model is used for a least one of the plurality of peripherals. The AIC may further configure at least one of the communication protocols to enforce one or more constraints on the transactions to achieve increased hardware verification coverage.
US09600382B2

Disclosed is an error recovery circuit facing a CPU assembly line, comprising: on-chip monitoring circuits (1), an error signal statistics module (2), a voltage frequency control module (3), an error recovery control module (4), an in-situ error recovery module (5) and an upper-layer error recovery module (6), wherein each of the on-chip monitoring circuits (1) is integrated at the end of each stage of assembly lines of the previous N−1 stages of assembly lines of a CPU kernel with an N-stage assembly line structure, so as to monitor the time sequence information about each clock period of an operating circuit, wherein N is a positive integer which is greater than or equal to 3 and less than 20. The present invention provides the on-line time sequence monitoring on the CPU kernel with N stages of assembly lines to search for the lowest possible operating voltage of the circuit, and to reduce the margin of the operating voltage reserved for the circuit in the design stage, thereby significantly reducing the power consumption of the circuit and improving the energy efficiency of the circuit.
US09600381B2

Systems and techniques for capturing audio and delivering the audio in digital streaming media formats are disclosed. Several aspects of the systems and techniques operate in a cloud computing environment where computational power is allocated, utilized, and paid for entirely on demand. The systems and techniques enable a call to be made directly from a virtual machine out to a Public Switch Telephone Network (PSTN) via a common Session Interface Protocol (SIP) to PSTN Breakout service, and the audio to be delivered onward to one or more Content Delivery Network (CDN). An audio call capture interface is also provided to initiate and manage the digital streaming media formats.
US09600370B2

A server system is disclosed herein, which includes a first BIOS chip, a second BIOS chip, a platform controller, and a baseboard management controller. The platform controller and the baseboard management controller are electrically connected to a first multi-way selector and a second multi-way selector, respectively. The first multi-way selector and the second multi-way selector are individually electrically connected to both the first BIOS chip and the second BIOS chip. The disclosure can accomplish an aspect that when either of the first BIOS chip and the second BIOS chip fails in activating the server system, the server system can be automatically activated by the other BIOS chip. Further, by the baseboard management controller, a firmware of the fail-to-activate BIOS chip can be simultaneously updated, thereby improving security and reliability of the server system.
US09600360B2

An aspect includes receiving a fetch request for a data block at a cache memory system that includes cache memory that is partitioned into a plurality of cache data ways including a cache data way that contains the data block. The data block is fetched and it is determined whether the in-line ECC checking and correcting should be bypassed. The determining is based on a bypass indicator corresponding to the cache data way. Based on determining that in-line ECC checking and correcting should be bypassed, returning the fetched data block to the requestor and performing an ECC process for the fetched data block subsequent to returning the fetched data block to the requestor. Based on determining that in-line ECC checking and correcting should not be bypassed, performing the ECC process for the fetched data block and returning the fetched data block to the requestor subsequent to performing the ECC process.
US09600358B1

Example embodiments of the present invention provide a method, an apparatus, and a computer program product for scalable monitoring and error handling in multi-latency systems. The method includes gathering events from a multi-latency logical data store comprising a first data store having a first data latency and a second related data store having a second data latency substantially different than the first data latency. Processing then may be performed on the gathered events, with notification of the processed events provided toward downstream queues for consumption. In certain embodiments, consumption comprises holistic error handling; according, in those embodiments holistic error handling of the multi-latency logical data store may be performed according to the notification of the processed gathered events asynchronously from gathering events from the multi-latency logical data store.
US09600353B2

In the field of computing, many scenarios involve the execution of an application within a virtual environment (e.g., web applications executing within a web browser). In order to perform background processing, such applications may invoke worker processes within the virtual environment; however, this configuration couples the life cycle of worker processes to the life cycle of the application and/or virtual environment. Presented herein are techniques for executing worker processes outside of the virtual environment and independently of the life cycle of the application, such that background computation may persist after the application and/or virtual environment are terminated and even after a computing environment restart, and for notifying the application upon the worker process achieving an execution event (e.g., detecting device events even while the application is not executing). Such techniques may heighten the resiliency and persistence of worker processes and expand the capabilities of applications executing within virtual environments.
US09600352B2

At least certain embodiments of the present disclosure include a method for memory management of a view of an application displayed on a display of a device. The method includes constructing a data structure having a hierarchy of layers with at least one layer being associated with the view. The method further includes storing the data structure in memory. The method further includes maintaining a retained count of the number of references to the view from other objects. The method further includes deallocating the view from memory if the retained count is zero. As discussed above, the retained count of the view will be decremented if the layer is removed from the data structure. Removing the layer from the data structure may occur based on the view associated with the layer being removed from the display of the device.
US09600344B2

Techniques for enabling high-performance computing are provided. The techniques include resizing a logical partition in a non-dedicated compute cluster server to enable high-performance computing, wherein a high performance computing application is executed such that the high performance computing application is configured to complete execution of each of one or more application threads at a similar time as a slowest thread in the cluster, and wherein the non-dedicated compute cluster comprises one or more servers and the logical partition is created by partitioning one or more server resources.
US09600342B2

Various techniques are described herein for creating data partition process schedules and executing such partition schedules using multiple parallel process instances. Data processing tasks initiated by or for applications may be executed by creating and executing partition schedules, in which a number of different process instances are created and each assigned a subset of data to process. Partition schedules may be used to determine a number of process instances to be created, and each process instance may be assigned a unique set of run-time data values corresponding to a unique set of parameters within the data set to be processed by the application. The process instances may operate independently and in parallel to retrieve and process separate partitions of the data required for the overall data processing task initiated by/for the application.
US09600335B2

The present disclosure provides methods for concurrently executing ordered and unordered tasks using a plurality of processing units. Certain embodiments of the present disclosure may store the ordered and unordered tasks in the same processing queue. Further, processing tasks in the processing queue may comprise concurrently preprocessing ordered tasks, thereby reducing the amount of processing unit idle time and improving load balancing across processing units. Embodiments of the present disclosure may also dynamically manage the number of processing units based on a rate of unordered tasks being received in the processing queue, a processing rate of unordered tasks, a rate of ordered tasks being received in the processing queue, a processing rate of ordered tasks, and/or the number of sets of related ordered tasks in the processing queue. Also provided are related systems and non-transitory computer-readable media.
US09600330B2

A method and system for regulation and control of a multi-core CPU includes receiving an operating command associated with regulation and control of the multi-core CPU, responding to the operating command, and performing regulation and control on the CPU cores of the multi-core CPU via a bottom layer core interface according to a preset CPU regulation and control mode. Thereby, a working state of every CPU core of a multi-core CPU is regulated and controlled, processing capability of the multi-core CPU is improved, and energy and electric power are saved.
US09600329B2

The present invention provides a virtual machine migration method, a switch, a virtual machine system. A switch receives a message sent by a server, where the message is used to enable the switch to discover a connected virtual machine interface; obtains, from the message, an identifier for indicating whether a virtual machine is migrated; and determines whether the virtual machine is a virtual machine migrated to the server according to the identifier indicating whether the virtual machine is migrated. According to the embodiments of the present invention, it may be determined whether an added virtual machine on a server is a newly created one or a migrated one.
US09600327B2

Embodiments of the invention provide systems and methods for scheduling and executing user-restricted processes within distributed computing systems. More specifically, certain embodiments of the present invention describe systems and methods by which runtime requests to execute user-restricted processes may be received, processed, and scheduled via a user application of an enterprise system or other distributed computing system. Requests may be received via transaction pages of user applications to schedule and execute user-restricted processes. The user application, a process scheduler, and/or other components within the distributed computing system may determine user contexts associated with the requests, and may determine whether or not the requested processes may be scheduled and executed. Such processes may include, for example, report generation processes, processes to initiate system functions, and/or processes to perform system maintenance within the distributed computing environment.
US09600323B2

Execution of an application is suspended and the runtime state of the application is collected and persisted. Maintenance operations may then be performed on the computer that the application was executing upon. The runtime state might also be moved to another computer. In order to resume execution of the application, the runtime state of the application is restored. Once the runtime state of the application has been restored, execution of the application may be restarted from the point at which execution was suspended. A proxy layer might also be utilized to translate requests received from the application for resources that are modified after the runtime state of the application is persisted.
US09600321B1

Optimized placement of virtual machines in a cloud environment is based on factors that include processor-memory affinity. A smart migration mechanism (SMM) predicts an optimization score for multiple permutations of placing virtual machines on a target system to create an optimal move list. The optimization score is a theoretical score calculated using dynamic platform optimization (DPO). The SMM may allow the user to set initial parameters and change the parameters to create potential changes lists. The move lists are ranked to allow the user to select the optimal change list to provide the best affinity, quickest fulfillment of requirements and least disruption for a given set of parameters.
US09600305B2

A method and system for enhancing the execution performance of program code. An analysis of the program code is used to generate code usage information for each code module. For each module, the code usage information is used to determine whether the code module should be separated from its original module container. If so, the code module is migrated to a new module container, and the code module in the original module container is replaced with a reference to the code module in the new module container.
US09600302B2

A device may receive a digital voucher, a customer certificate, and configuration information for automatically configuring the device. The digital voucher may include a first customer identifier that identifies a customer associated with the device and a device identifier that identifies the device. The customer certificate may include a second customer identifier that identifies the customer and a customer public key associated with the customer. The configuration information may include information that identifies a configuration for automatically configuring the device. The device may validate at least one of the digital voucher, the customer certificate, or the configuration information. The device may configure the device, using the configuration, based on validating at least one of the digital voucher, the customer certificate, or the configuration information.
US09600301B2

Described are a method and system that remotely instructs and guides end users of mobile devices to navigate through its various functions and configurations. The system comprises a repository, a control center, and an intelligent client on the mobile device, where the control center and mobile device operate in a client-server relationship and are in communication during a help session. An administrator uses the system to create step by step navigational instructions called story boards and reference device navigational maps which are uploaded to a repository. The control center pulls the relevant story boards and device navigation maps from the repository and uses it to remotely and interactively direct the end user of the mobile device to navigate through its various applications and functions.
US09600292B2

A common boot sequence facility is provided that enables a control utility (e.g., operating system, control program, or other standalone tool, as examples) to be booted in a plurality of configurations without changing the boot sequence. An operating system or other control utility uses the common boot sequence to be able to be booted in either a first architecture configuration that initializes in one architecture, e.g., ESA/390 and then switches to, for instance, another architecture, e.g., z/Architecture, for processing; or in a second architectural configuration that initializes and processes in the another architecture, e.g., z/Architecture.
US09600286B2

An instruction stream includes a transactional code region. The transactional code region includes a latent modification instruction (LMI), a next sequential instruction (NSI) following the LMI, and a set of target instructions following the NSI in program order. Each target instruction has an associated function, and the LMI at least partially specifies a substitute function for the associated function. A processor executes the LMI, the NSI, and at least one of the target instructions, employing the substitute function at least partially specified by the LMI. The LMI, the NSI, and the target instructions may be executed by the processor in sequential program order or out of order.
US09600278B1

A specialized processing block on a programmable integrated circuit device includes a first floating-point arithmetic operator stage, and a floating-point adder stage having at least one floating-point binary adder. Configurable interconnect within the specialized processing block routes signals into and out of each of the first floating-point arithmetic operator stage and the floating-point adder stage. The block has a plurality of block inputs, at least one block output, a direct-connect input for connection to a first other instance of the specialized processing block, and a direct-connect output for connection to a second other instance of the specialized processing block. A plurality of instances of the specialized processing block are together configurable as a binary or ternary recursive adder tree.
US09600265B2

A sequence for distributing at least one of a plurality of code packages to the at least one facility according to different states of a fixed state machine is set. The at least one of the plurality of code packages is maintained in at least one staging area in a valid, dormant mode while the fixed state machine is stopped. Pursuant to a resumption of the fixed state machine at a subsequent time, a current code package is swapped with the at least one of the plurality of code packages in the at least one staging area to activate the at least one of the plurality of code packages.
US09600257B2

A method, system and computer program product for generating a list of applications available for installation on a user terminal is disclosed. In one aspect, a catalogue server identifies a first and a second installation control setting corresponding to an application on the basis of user identification data from a data store comprising entries for a plurality of applications and their corresponding installation control settings. Subsequently, the catalogue server determines installation control data for at least one of the first and second application on the basis of the first and the second installation control setting. The determined installation control data is used to generate the list of application available for installation on the user terminal.
US09600255B2

An execution environment in a computer system provides dynamic data and compute resources elasticity for user code to improve execution efficiency. The execution environment translates the user code into a runtime agnostic representation with a set of tasks. For each task, the execution environment determines a level of concurrency for executing the task based on the size of the set of input data for the task, the amount of compute resources available at the time of invocation of the task, and any context-sensitive heuristics provided by the user code.
US09600252B2

A compilation system for at least one instruction flow to be executed on a target circuit comprises a hardware acceleration circuit performing the functions of loading a set of at least one portion of said flow to a memory internal to the circuit and of decoding the set; the instructions resulting from the loading and from the decoding being transmitted to a programmable core operating in parallel to the hardware acceleration circuit, the programmable core producing the transcription of the decoded instructions into a machine code suitable for execution on the target circuit.
US09600245B2

A computer-implemented method for generating control unit program code. The control unit program code or an intermediate representation in the generation of the control unit program code is generated from at least one first data object with at least one first software tool. The first software tool outputs at least one message about the generation process during the generation of the control unit program code or the intermediate representation, and a computer-implemented message management environment acquires the message output by the software tool. The evaluation of the messages output by the software tools during the generation process is achieved in a more effective manner in that a qualification for the acquired message at least as open or approved is acquired by the message management environment and in that a qualification precondition for a message qualified as approved is also acquired by the message management environment.
US09600242B2

The present invention addresses the development of software applications for multiple domains and users. The application framework of the present invention includes a collection of mutually compatible software components, technologies and capabilities that can be assembled using object-oriented techniques to build custom software applications.
US09600236B2

Mathematical functions are computed in a single pipeline performing a polynomial approximation (e.g. a quadratic approximation, or the like); and one or more data tables corresponding to at least one of the RCP, SQRT, EXP or LOG functions operable to be coupled to the single pipeline according to one or more opcodes; wherein the single pipeline is operable for computing at least one of RCP, SQRT, EXP or LOG functions according to the one or more opcodes. SIN and COS are also computed using the pipeline according to the approximation ((−1)^IntX)*Sin(π*Min(FracX, 1.0−FracX)/Min(FracX, 1.0−FracX). A pipeline portion approximates Sin(π*FracX) using tables and interpolation and a subsequent stage multiplies this approximation by FracX. For input arguments of x close 1.0. LOG 2(x−1)/(x−1) is computed using a first pipeline portion using tables and interpolation and subsequently multiplied by (x−1). A DIV operation may also be performed with input arguments scaled up to avoid underflow as needed.
US09600228B2

A system and method for static query generation and input, comprising a set of auto-complete and auto-suggest rules, based on a template derived from at least one of an initial user input and context, is used to elicit a more complete query from said user, said auto-complete and auto-suggest values being offered in the form of widgets that offer a visual indicia receptive for user interaction, and wherein depending on at least one of context and status and user input, more than one such widget may be offered concurrently.
US09600223B2

A method and an apparatus for sharing a screen with a counterpart electronic device in an electronic device are provided. In the method, connection with at least one counterpart electronic device is performed. Data to display on the electronic device or data to transmit to the counterpart electronic device are determined. Data is transmitted to the counterpart electronic device. Data transmission to the counterpart electronic device is stopped based on state information of the electronic device or the counterpart electronic device.
US09600218B2

Systems and methods are provided for generating document-specific histories for multi-document print jobs. One system is a workflow server with an interface and a controller. The interface receives a print job that defines multiple documents, and the controller directs devices of a print shop in accordance with a print workflow. The controller identifies properties of each of the documents to track while the print job is being processed in the workflow, receives progress information from the devices, and analyzes the progress information to detect a triggering event indicating that a document in the workflow has transitioned to a new state at an activity. When recording criteria direct the controller to update the history, the controller adds an entry to a history file while the document is in the workflow. The entry indicates values of the properties of the document, as well as a current workflow activity for the document.
US09600215B2

An apparatus, method, and computer-readable storage medium including displaying a plurality of device groups, each of the plurality of device groups including a plurality of devices, receiving a selection of a device group of the plurality of device groups and a request to add a driver package to the device group, and assigning the driver package to the device group by associating the driver package with the device group.
US09600210B2

Virtual setting values for a specific image forming apparatus are generated using a model-dependent setting value schema which defines a schema of model-dependent setting values in each of a plurality of image forming apparatuses and tenant setting values required to commonly set setting values for the plurality of image forming apparatuses. The virtual setting values are held and managed.
US09600209B2

In some example embodiments, a method of organizing an address mapping table of a flash storage device based on Logical Block Address (LBA) size may comprise: identifying an extent of correlation between the LBA and flash page sizes, wherein the extent of correlation indicates greater or lesser extent; computing a total number of entries in each meta page of the table; and/or organizing the table with the total number of entries. In some example embodiments, a method of organizing an address mapping table of a flash storage device based on LBA size may comprise: determining flash page size of the flash storage device; determining the LBA size; and/or comparing the flash page and LBA sizes. When the flash page size is greater, the table may be organized based on flash page size. When the flash page size is less, the table may be organized based on LBA size.
US09600206B2

Storage access requests, such as write requests, are received from a virtual machine. A storage request processing module updates one of multiple virtual disks as directed by each of the storage access requests, and a replication management module stores information associated with each storage access request in one of multiple logs. The logs can be transferred to a recovery device at various intervals and/or in response to various events, which results in switching logs so that the replication management module stores the information associated with each storage access request in a new log and the previous (old) log is transferred to the recovery device. During this switching, request ordering for write order dependent requests is maintained at least in part by blocking processing of the information associated with each storage access request.
US09600205B1

Embodiments described herein relate to systems and methods for decreasing power consumption of a storage device. More specifically, embodiments disclosed herein are directed to reducing power consumption of a data storage device by enabling a command buffer associated with the data storage device to store received commands without executing the commands until a predetermined number of commands have been stored in the buffer.
US09600200B1

Exemplary methods for caching data in a cache device include determining characteristics of a plurality of file extents associated with a plurality of files stored in a random access memory (RAM) device. In one embodiment, the methods include deferring caching of the stored plurality of file extents in a cache device until a predetermined condition has occurred. According to one embodiment, the methods include, in response to determining the predetermined condition has occurred, packing a first portion of the plurality of file extents into a first cache unit based on the characteristics of the file extents, wherein file extents of the first cache unit are likely to be accessed within a predetermined period of time and evicted together from the cache device. The methods further include caching the first cache unit in the cache device and removing the cached file extents from the RAM device.
US09600198B2

A method for frame choosing in a computing system during a storage constraint condition is provided. The method includes calculating, with a processor, a use-grouped-threshold, comparing a number of available grouped frames to the calculated use-grouped-threshold, returning a decision to use a grouped frame in an event that the number of the available grouped frames exceeds the calculated use-grouped-threshold and returning a decision to use an above-the-bar frame in an event that the number of the available grouped frames is less than or equal to the calculated use-grouped-threshold.
US09600195B2

As disclosed herein, a method, executed by a computer, for migrating executing applications and associated stored data includes executing one or more applications in a source system environment that access data stored on a source storage device that is directly accessible within the source system environment, migrating the data to a target storage device that is directly accessible within a target system environment but is not directly accessible within the source system environment, wherein migrating the data comprises copying the data from the source storage device to the target storage device using a remote storage access protocol. A computer system and computer program product corresponding to the method are also disclosed herein.
US09600193B2

A source storage system replicates snapshots stored on the source storage system to a target storage system. The source storage system stores a plurality of snapshots. The source storage system also stores parent child relationships between snapshots. The source storage system allows child snapshots of a parent snapshot to be modified independent of each other. The source storage system determines changed blocks of a snapshot compared to a previously transmitted snapshot and sends only the changed blocks to the target storage system. The source storage system determines the changed blocks of a snapshot compared to a previously replicated snapshot based on time of creation of a common ancestor of two snapshots. The source storage system transmits a data block of a snapshot if either the data block or a corresponding data block of the previously replicated snapshot was modified after the creation of the common ancestor snapshot.
US09600177B2

An electronic device (100) includes a display (102). The electronic device can also include a user interface (110) to detect gesture input. One or more control circuits (116), operable with the display and the user interface, can detect a predefined gesture input (401) and alter a timer (122) controlling a duration in which the display is in an operational mode. This allows a user (300) to make a quick gesture to extend the time the display will be active without interaction so that the user can read long documents or other items without the display turning OFF.
US09600176B2

A method is provided for causing a display of content with the content that is displayed being divided into at least two groups having a predefined spatial relationship therebetween. The method also enabling movement of the content and causes the spatial relationship of the at least two groups of content to change from the predefined spatial relationship while the content is moved. The method also causes the at least two groups of content to return to the predefined spatial relationship following the movement of the content. A corresponding apparatus and computer program product are also provided.
US09600164B2

A media application of some embodiments includes a timeline, which is a composite display area for displaying media clips that are part of the composite media presentation. The timeline of some embodiments includes a primary lane called a spine as well as one or more anchor lanes. The spine represents a primary sequence of media, which, in some embodiments, does not have any gaps. When a clip is deleted or removed from the timeline, the media-editing applications automatically closes the gap created in place of the clip. The clips in the anchor lanes are anchored to a particular position along the spine. Anchor lanes may be used for compositing (e.g., removing portions of one video and showing a different video in those portions), B-roll cuts (i.e., cutting away from the primary video to a different video whose clip is in the anchor lane), audio clips, or other composite presentation techniques.
US09600162B2

An information processing apparatus comprises an operating module to which a touch operation performed with a pointing tool is entered; a calculating module that calculates a reference distance that is a distance between a reference point on an image display area of an operation display surface and a point on the image display area defined by a first operation performed on the operating module with a single piece of the pointing tool, calculates a control distance that is a distance between the reference point and a point on the image display area defined by a second operation performed on the operating module with a single piece of the pointing tool, and calculates a magnification ratio based on the reference distance and the control distance; and a magnification/reduction module that generates a scaled image by magnifying or reducing a display image displayed on the image display area by the magnification ratio.
US09600161B2

A method displays a copy of a specified display area on a computer display. A first signal is received from a user. The first signal specifies a display area on a display as a specified display area. The specified display area presents a dynamic activity being performed on a computer. A second signal is received from the user to identify a particular object in the specified display area. A copy of the specified display area, which includes only the particular object, is generated. The copy of the specified display area has a same shape as the specified display area, presents the dynamic activity being performed on the computer, and is displayed on the display.
US09600153B2

A mobile terminal and a method for controlling the same are disclosed. According to one embodiment, the mobile terminal and method for controlling the same are capable of adjusting the magnification of a web page being displayed on a web browser to an optimal level or assigning an access key to a link so as to provide a more convenient web browsing environment.
US09600147B2

Multi-layer user interfaces are provided. A user may traverse a hierarchy of information by accessing information in different branches of the hierarchy without having to traverse back up the current branch to access the new branch. A multi-layer user interface (UI) may comprise a set of UIs, each of which corresponds to a navigation layer and a level of the hierarchy. Each UI may comprise a set of UI controls that allow the user to traverse within a level or to a different level of the hierarchy. The UI controls may be configured such that a visual clue as a breadcrumb and user path history may also be provided.
US09600131B2

A method and system for providing an integrated application that includes software modules coupled to a message bus. The software modules include applications of different degrees of complexity and different number of components, such as management applications, service applications, and other similar applications. A computer system receives a first input that selects a user interface (UI) to access the integrated application. The selected UI can be a specific UI associated with a software module, or an orchestrator UI that unifies individual styles of the specific UIs. The computer system receives, via the selected UI, a second input to access a destination module among the software modules. If the selected UI is the orchestrator UI, the second input is forwarded to the destination module via the message bus. If the selected UI is a specific UI, the second input is sent to the destination module via the selected specific UI.
US09600129B2

According to one embodiment, a display device includes a plurality of first lines, a plurality of second lines, a plurality of switch elements, a plurality of pixel electrodes, a plurality of third lines, a display layer, and a controller. The plurality of first lines extend in a first direction. The plurality of second lines extend in a second direction. The plurality of third lines extend in the second direction. The switch elements are electrically connected to the first lines and the second lines. The pixel electrodes are connected to the switch elements. The display layer performs an optical operation based on an electrical signal applied to the pixel electrodes. The controller includes at least one switch connected between the second lines and the third lines.
US09600128B2

The present disclosure relates to a touch control device and touch determination method thereof. When a processor determines a capacitive coupling variation of a sensing point at a sensing panel of the touch sensitive device is smaller than a predetermined negative threshold or larger than a predetermined positive threshold, the processor then computes from local 2D sensing information of second 2D sensing information measured at the sensing point, to obtain a flatness index, The processor determine that the sensing point is not touched by any external object if the flatness index is between a predetermined flatness index negative reference value and a predetermined flatness index positive reference value that indicates the capacitive coupling amount at the sensing point is changed by the sensing point is not touched by any external object, whereby a false touch control determination due to removing water drop on the touch sensing panel can be prevented.
US09600121B2

In an example, a processing system for a capacitive sensing device includes a sensor module and a determination module. The sensor module includes sensor circuitry coupled to a plurality of transmitter electrodes and a plurality of receiver electrodes. The sensor module is configured to receive resulting signals from the plurality of receiver electrodes during a plurality of noise acquisition bursts while suspending transmission with the plurality of transmitter electrodes. The resulting signals include the effects of noise. The sensor module is further configured to introduce at least one time delay between a respective at least one pair of the plurality of noise acquisition bursts. The determination module is configured to determine an interference measurement for a first frequency based on the resulting signals.
US09600115B2

A haptic device includes a substrate that is subjected to lateral motion such as lateral oscillation with one or more degrees of freedom together with modulation of a friction reducing oscillation in a manner that can create a shear force on the user's finger or on an object on the device.
US09600112B2

A flexible substrate may have one or more bends. A bend in a flexible substrate may be made along a bend axis. Conductive traces in the flexible substrate may have elongated shapes. Each conductive trace may extend along a longitudinal axis that is perpendicular to the bend axis. Metal or other conductive materials may form the conductive traces. The traces may be formed from a chain of linked segments. Each segment may have patterned trace portions that surround one, two, or more than two openings. Traces may also be formed that have multiple layers of metal or other conductive material interconnected using vias. A polymer layer may cover the traces to align a neutral stress plane with the traces and to serve as a moisture barrier layer.
US09600111B2

A display device includes: a substrate on which a display unit is formed and an encapsulation unit for sealing the substrate; a touch screen panel formed on the encapsulation unit; a window cover provided on the touch screen panel; an alignment key for aligning positions of the display panel and the window cover; and a sealing portion disposed between the substrate and encapsulation unit. An area expansion portion is formed in a position of the sealing portion corresponding to the alignment key.
US09600109B2

A touch sensing type liquid crystal display device includes an array substrate includes a first substrate, a common electrode, a pixel electrode, and a touch sensing unit; a color filter substrate including a second substrate and facing the array substrate; an anti-static layer on an outer side of the second substrate and including an organic material and a carbon nano-tube; and a liquid crystal layer between the first substrate and an inner side of the second substrate.
US09600108B2

A touch input device and method for a portable device that is capable of inputting various user commands with diversified touch events detected on a touch screen is provided. A touch input method for a mobile terminal having a touch screen may include displaying a plurality of representative images representing content objects on the touch screen, selecting at least one representative image in response to a first command designated for a first touch event on the touch screen, and executing a second command designated for a second touch event on the touch screen. The second touch event may be defined by a movement direction, speed, a lift position of a touch, and the representative images selected by the first command.
US09600103B1

A method for facilitating the validation of an action by a user utilizing a touch screen device having a processor executing software commands includes providing an initial screen via a GUI displaying certain data fields and functional icons of a particular application. On the touch screen an initial active area is designated in association with certain data fields and functional icons. An end user interacts with the touch screen device generating an input signal. The input signal is received from the touch screen active area by the processor requesting an action. Upon receipt of the input signal, a validation active area on the touch screen is visually displayed. The validation active area is monitored for a secondary input signal generated by an end user interacting with the validation active area. The initial active area is monitored for determining an input signal in association with the initial active area is present.
US09600101B2

An interactive board comprises an interactive surface; at least one user selectable element; and processing structure in communication with at least one imaging device and configured to process data received from said at least one imaging device to locate at least one pointer positioned in proximity with said interactive surface and update digital ink according to pointer location, said processing structure being further configured to send said digital ink to one or more devices in communication with the interactive board in response to selection of said at least one user selectable element.
US09600092B2

An accessory device for e-reader devices that allows a user to turn pages on the electronic book without having to touch the e-reader device with hands or fingers. The accessory includes a clip that attaches to the front periphery of the e-reader device, with an electrically conductive tip end or soft-tip end that engages the page-turning surface of the e-reader device. The electrically conductive tip end or soft-tip end is operated by a finger push button on the other end of a cable release.
US09600091B2

A projector displays an image supplied by a PC on a screen using a projection unit, detects a pointed location on the screen using a location detection unit, calculates first coordinates as coordinates of the pointed location in a displayable area of the screen using a coordinate calculation part, converts the calculated first coordinates into second coordinates as coordinates in the supply image using a coordinate conversion part based on image location information indicating a location of the supply image on the screen, outputs the second coordinates obtained by the conversion from an output unit, and corrects the image location information by processing of displaying the image based on a correction image using a control unit.
US09600085B1

A computer keyboard is designed to accommodate a variety of security features that may be installed in the keyboard during manufacturing, whereby various combinations of devices that impart selected security features or other functions may be assembled. The keyboard assembly includes a base extension for accommodating the security devices, and a number of interchangeable modular tops supporting various discreet input technologies. This modular design is tooled to accommodate different combinations of technologies, such as biometric fingerprint readers, NFC-RFID receivers, auto locking sonar, game cartridges, and connector-supporting modules. Each interchangeable modular top can hold independent modular technology that can be used to construct an integrated device that meets the customer requirements without any substantial modification of the keyboard base or extension.
US09600075B2

A method of generating a haptic effect on a device includes detecting a position of an object relative to the device. The method further includes, based at least on the position, determining a gesture indicated by the object, and generating the haptic effect on the device based on the determined gesture, where the haptic effect is generated without the object contacting the device.
US09600072B2

A wearable tactile display device is disclosed wherein vibrating stimulation pins are located close to each other by means of underlying vibratory actuation piezoelectric bending elements arranged in a cantilever configuration partially overlapping over each other. Optionally, the plane in which the tips of stimulation pins protrude may be a curved surface providing with the ability to comply with a curved human body part such as a finger. Vibratory stimulation can be achieved at close spatial resolution by advantageously reducing the space between adjacent stimulation pins through their ability to engage with different adjacent piezoelectric cantilever bending elements when they are placed at different planes and at additional closer spatial resolution when they are placed at an angle to each other. The programmable controller employed in order to program the pattern of stimulation pin vibrations can be used for generating different amplitudes and frequencies of vibration.
US09600069B2

Apparatus, systems, and methods are provided for substantially continuous biometric identification (CBID) of an individual using eye signals in real time. The apparatus is included within a wearable computing device with identification of the device wearer based on iris recognition within one or more cameras directed at one or both eyes, and/or other physiological, anatomical and/or behavioral measures. Verification of device user identity can be used to enable or disable the display of secure information. Identity verification can also be included within information that is transmitted from the device in order to determine appropriate security measures by remote processing units. The apparatus may be incorporated within wearable computing that performs other functions including vision correction, head-mounted display, viewing the surrounding environment using scene camera(s), recording audio data via a microphone, and/or other sensing equipment.
US09600063B2

A system, switching regulators, and methods of control for enhanced peak current-mode PWM switching regulators are disclosed. For example, a switching regulator is disclosed, which includes a master controller circuit and a slave controller circuit coupled to the master controller circuit, wherein the slave controller circuit is configured to generate a ripple current at a first ripple node, and a sensor circuit is configured to sense the ripple current at the first ripple node and convey the sensed ripple current to a second ripple node in the master controller circuit. In some implementations, the switching regulator is part of a power subsystem formed on one or more semiconductor ICs, wafers, chips or dies.
US09600062B2

Methods and apparatus relating to a single capacitor multi-phase three-level buck Voltage Regulator (VR) are described. In an embodiment, voltage regulator logic includes a first phase portion and a second phase portion. The voltage regulator logic also includes a single capacitor coupled between switches of the first phase portion and the second phase portion. Other embodiments are also disclosed and claimed.
US09600051B2

A control method of a display apparatus includes displaying image content, in response to a power-off command being input, determining whether the display apparatus operates in an instant-on mode, and in response to determining that the display apparatus operates in the instant-on mode, storing information regarding image content displayed when the power-off command is input, and outputting an indicator that indicates the instant-on mode.
US09600048B2

In various embodiments, devices and methods for controlling the operation of at least one arithmetic and logic unit are disclosed. In various embodiments, methods and devices for controlling an arithmetic logic unit are disclosed. More particularly, devices may comprise at least one arithmetic and logic unit for processing a task, and a processor for controlling the arithmetic and logic unit according to an electric current consumed by the arithmetic and logic unit at an operating frequency of the arithmetic and logic unit.
US09600046B2

In a multiphase electrical power construction and assignment, a processor: determines a phase and voltage configuration for bi-directional power device pairs; determines a given bi-directional power device pair is to be coupled to a given phase connection based on the configuration; determines whether the given bi-directional power devices in the given bi-directional power device pair are to be coupled to each other; confirms that the given bi-directional power device pair is not coupled to any of the plurality of phase connections; couples the given bi-directional power device pair to the given phase connections, where power signals of the given bi-directional power device pair are synchronized with a power signal of the given phase connection; and in response to determining that the given bi-directional power devices are to be coupled to each other, couples each of the bi-directional power devices to a short bus.
US09600044B2

A portable electronic device using a fixed main heat-dissipating module and a detachable auxiliary heat-dissipating module for contacting the fixed main heat-dissipating module. The detachable auxiliary heat-dissipating module includes an outer casing structure and an inside mounted heat-dissipating structure. The outer casing structure includes a detachable casing detachably disposed inside a predetermined receiving groove of the portable electronic device and an electrical connector electrically connected to the portable electronic device. The inside mounted heat-dissipating structure is disposed inside the detachable casing. The inside mounted heat-dissipating structure includes an inside mounted heat-dissipating fan, a plurality of inside mounted heat-dissipating fins, a pump, and a circulation pipe. The circulation pipe has a contact portion exposed from the detachable casing to directly contact the fixed main heat-dissipating module, such that heat generated by the fixed main heat-dissipating module is partially transmitted to the circulation pipe through the contact portion.
US09600042B2

An electronic device includes: a heating element; a casing including a tightly sealed waterproof compartment where the heating element is disposed and a ventilation chamber being disposed adjacent to the waterproof compartment to allow outside air to flow; and a heat dissipation member provided at a side of the waterproof compartment of a partition wall partitioning the waterproof compartment and the ventilation chamber, wherein the heating element is disposed on the heat dissipation member and a thickness of the partition wall at a position where at least the heating element is disposed is thinner than that of other portions of the partition wall.
US09600030B2

Systems, articles, and methods for elastic electrical cables are described. An elastic electrical cable includes a molded band of elastomer with a length that follows a tortuous path including a number of semi-rigidly set changes in direction. The elastomer band is formed by an overmolding process to enclose or at least partially contain a flexible printed circuit board, with various access points provided to electrically couple to/from the flexible printed circuit board. An annular wearable electric device employing at least one such elastic electrical cable as an adaptive coupler that simultaneously provides both electrically conductive coupling and adaptive physical coupling is described. Methods of preparing/manufacturing such elastic electrical cables are also described.
US09600021B2

An operating clock synchronization adjusting method, for an induction type power supply system, includes receiving a plurality of data pulses, by a supplying-end module, according to a clock of a microprocessor of the supplying-end module, for generating a plurality of data frames. A period between first data pulses corresponding to starting bits of a first detecting data frame and a second detecting frame among the plurality of data frame is calculated, for acquiring a data frame period. A period between the first data pulse of the second data frame and a second data pulse of the second data frame is calculated, for acquiring a bit period. The bit period and a bit time threshold are compared for determining whether to adjust the clock of the microprocessor according to the data frame period and a frame time threshold.
US09600018B1

Methods and circuits for performing a clock-stop process of a circuit are disclosed. For example, a circuit includes a clock group having a first clock domain, a first clock multiplexer, a first synchronizer and a controller. The controller is configured to initiate a clock stop process of the circuit by sending an alternative mode signal to the first synchronizer. The first synchronizer is configured to synchronize the alternative mode signal to a clock of the first clock domain and is further configured to output, to a select line of the first clock multiplexer, the alternative mode signal that is synchronized to the clock of the first clock domain. The select line of the first clock multiplexer is for selecting from between an input of the first clock multiplexer for the clock of the first clock domain and an alternative clock input of the first clock multiplexer for an alternative clock signal from the controller.
US09600014B2

The present disclosure relates to a method and apparatus for generating a voltage reference. More particularly the present disclosure relates to a methodology and circuitry configured to provide an output signal that combines a proportional to absolute temperature component with a complimentary to absolute temperature component to generate a stable output which is not temperature dependent.
US09600012B2

A device connectable to a three-phase network, wherein the device includes a capacitor, a secondary coil, a diode and, per phase, a conductor and a circuit, where a secondary-side coil is connected in parallel to the capacitor via the diode, the circuit is configured such that a resistor is located in a conductor, a first capacitor is connected parallel to the resistor, a serial circuit of a first primary-side coil is connected in parallel to the first capacitor, energy transfer occurs from a first primary-side coil to a second primary-side coil and to the secondary-side coil, a second capacitor is connected in parallel to the second primary-side coil, the second capacitor is connected to the source connection of a self-conducting field effect transistor, and the gate connection of the self-conducting field effect transistor is connected to the second capacitor to provide an improved internal power supply for the device.
US09600009B1

A method and system for managing an energy supply of a utility provider include calibrating one or more climate controlled spaces for a controller. The calibrating may include calculating a heating/cooling ratio for the one or more climate controlled spaces. After this calibration occurs, the system may determine if an energy supply surplus exists. If an energy supply surplus exists, then the system may start using the one or more climate controlled spaces as energy sinks for expending energy according to the heating/cooling ratio. The system may also determine if an energy supply deficit exists and if an energy supply deficit exists, then the system may start using the one or more climate controlled spaces as energy “sources,” in which a direct load control algorithm is used to reduce energy consumption by the one or more climate controlled spaces.
US09600004B2

An electric power system including an on-load tap changing (OLTC) transformer is provided. The OLTC transformer includes a primary winding and a secondary winding. A portion of the at least one primary winding and at least one of the secondary windings are inductively coupled to each other. Further, the electric power system includes at least one on-load tap changer coupled to the at least one primary winding or the at least one secondary winding of the OLTC transformer. The on-load tap changer is configured to regulate the portion of the at least one primary winding or the at least one secondary winding that are inductively coupled to each other. Furthermore, the system includes at least one controller coupled to the on-load tap changer. The controller is configured to determine a permissible voltage range defined by a bandwidth around a voltage set-point at the at least one on-load tap changer, where the bandwidth is a function of one or more electrical network states.
US09599997B2

A feedback-controlled fluid valve and methods of using the same are described herein. One feedback-controlled fluid device includes piston within a valve associated with a conduit, a position sensor to determine a position of the piston relative to a metering cone, a coil to generate a magnetic field within the valve, wherein the magnetic field moves the piston, and wherein a rate of fluid flow through the valve is configured to adjust based on the position of the piston relative to the metering cone.
US09599996B2

A method to be used for controlling a screen (1) including a load bar (2), a flexible element (4) supporting the load bar, and at least one controlled member for winding the flexible member, in order to move the load bar (2) between a first high or low position and a second low or high position, the movement resulting from an angular movement of the winding member. The method includes at least one step in which the angular movement of the of the winding member (52) is controlled with a temporal set value (θ(t)) of the instantaneous angular position (γ(t)) of the winding member (52).
US09599990B2

A power-saving robot system includes at least one peripheral device and a mobile robot. The peripheral device includes a controller having an active mode and a hibernation mode, and a wireless communication component capable of activation in the hibernation mode. A controller of the robot has an activating routine that communicates with and temporarily activates the peripheral device, via wireless communication, from the hibernation mode. In another aspect, a robot system includes a network data bridge and a mobile robot. The network data bridge includes a broadband network interface, a wireless command interface, and a data bridge component. The data bridge component extracts serial commands received via the broadband network interface from an internet protocol, applies a command protocol thereto, and broadcasts the serial commands via the wireless interface. The mobile robot includes a wireless command communication component that receives the serial command; transmitted from the network data bridge.
US09599981B2

A method of notifying a user of a status of an electronic appliance is presented. Examples of the electronic appliance may include, but are not limited to, refrigerators, freezers, dishwashers, ovens, and clothes washers and dryers. In the method, an entertainment system device receives a message from the appliance via a communication link, wherein the message indicates the status of the appliance. In response to receiving the message, the device transmits a command to a second device of the entertainment system to select an input of the second device associated with the first device. The first device transmits data indicating the status over a media content interface to the selected input of the second device for presentation to the user.
US09599978B2

In a canned cycle, a straight path is set from a cutting completion position in a cycle to a cutting start position in a next cycle. Furthermore, when there is a possibility that the set straight path interferes with a workpiece, a region for which the workpiece has been already cut is determined, and a path not interfering with the workpiece is set with as short length as possible.
US09599958B2

In the specification and drawings, a collinear holographic storage medium is described and shown with a recording layer, wherein the lateral linear thermal expansion coefficient of the recording layer is substantially the same as the linear thermal expansion coefficient of the material of the recording layer.
US09599957B2

An image forming apparatus includes: a supporting member supporting multiple cartridges and movable between an inside position inside an apparatus main body and an outside position, in which the cartridges are supported arrayed in a direction of extracting the supporting member from the inside position to the outside position, with the multiple cartridges being detachably attachable at the outside position; a first cartridge; a second cartridge adjacent to the first cartridge; and a third cartridge adjacent to the second cartridge. The first cartridge has a greater protrusion amount from the supporting member compared to the second cartridge and the third cartridge, in a direction orthogonal to the extracting direction and to a longitudinal direction of the cartridges. When viewed from the orthogonal direction, the amount of overlapping between the first cartridge and the second cartridge is greater than the amount of overlapping between the second cartridge and the third cartridge.
US09599955B2

A developer storage unit includes a receiving portion which is provided on a rotating shaft, and configured to receive a developer falling from a conveyance member.
US09599953B2

A cartridge including a housing, a driving receiving part, a rotary member configured to rotate, and move in an axis direction thereof while rotating, and a detected member configured to move in the axis direction by receiving a driving force from the rotary member, wherein the rotary member includes a main body part having a first surface facing the detected member in the axis direction and a second surface positioned at an opposite side of the first surface in the axis direction, an operating part arranged on the first surface and configured to apply a force for moving the detected member in the axis direction to the detected member, and an operated part arranged on the second surface and configured to receive a force for moving the main body part in the axis direction.
US09599946B2

An image forming apparatus includes a latent image bearer, a developing device, a supplier, and a controller. The controller controls the supplier according to a detection result of a toner density by the toner density sensor and a toner density target value to adjust the toner density of developer in the developing device. The controller is configured to correct the toner density target value and an imaging condition affecting a toner adhesion amount of an output image separately from the toner density, according to a component adhesion deterioration degree being a deterioration degree of carrier due to adhesion of a toner component, obtained based on at least an average image area ratio of the output image, and a coating abrasion deterioration degree being a progression degree of deterioration due to coating abrasion of the carrier, obtained based on at least the average image area ratio of the output image.
US09599944B2

The circuit substrate includes at least two lands formed on a substrate, wherein one electrode is to be mounted on the at least two lands, an electronic part having electrodes, one of the electrodes is soldered on the at least two lands with solders whose amounts are adjusted by a metal mask having at least two opening parts, positions of the at least two opening parts corresponding to the at least two lands when the solders are applied and melted, areas of the at least two opening parts being different with each other, wherein a height of one of the solders is different from a height of the other of the solders according to the difference of the areas of the at least two opening parts of the metal mask, whereby the electronic part is mounted on the circuit substrate in an inclined state.
US09599940B2

A fixing device includes: a fixing member that is rotatable and in an endless shape; a heat source that heats the fixing member; a nip forming member that is arranged inside the fixing member; and a pressurizing member that is pressurized to be in contact with the nip forming member through the fixing member, to form a fixing nip. The fixing device fixes an unfixed image on a recording medium by passing the recording medium that carries the unfixed image through the fixing nip. The nip forming member includes a base layer, and a high thermal-conductive layer that is arranged on a surface layer of the base layer on a fixing nip side, and that has higher thermal conductivity than the base layer, and in the high thermal-conductive layer, a low thermal-conductive portion is arranged near an end portion in an axial direction of the fixing member.
US09599930B2

A fixing portion 18c for suppressing movement of a developer bag 16 when the developer bag 16 is unsealed by moving a sealing member 19 is provided. By this, unsealing becomes easy.
US09599928B2

A powder transport member includes a rotary member that rotates around an axis inside a container in which powder is contained, a contact member that has one end secured to the rotary member and another end that is a free end, the contact member flexing upon contact of the other end with an inner wall of the container, the contact member having multiple cuts provided in an axial direction of the rotary member, the cuts extending from the other end obliquely with respect to the rotary member, and multiple projections that are provided on the rotary member in the axial direction, the projections projecting from the rotary member toward the inner wall of the container, the projections having a distal end portion that is located at a different position from a starting edge of the cuts with respect to the axial direction.
US09599927B2

An information storage device installed in a removable device configured to be removably installed in an image forming apparatus body, includes: an information storage unit that stores information communicated between the image forming apparatus body and the removable device; a terminal that comes in contact with a body side terminal; and a substrate that holds the information storage unit and the terminal and includes a hole configured to be engaged with a protruding section installed in the image forming apparatus body. The terminal includes a plurality of terminals each including one of a plurality of metallic plates arranged in a transverse direction thereof. An earth terminal, which comes in contact with a body side earth terminal formed in the protruding section, is formed in the hole. The hole is disposed at a position sandwiched between two metallic plates among the plurality of metallic plates.
US09599917B2

An electrophotographic photosensitive member that abuts with a charging member and/or a developer carrying member with an abutting member interposed therebetween, wherein the electrophotographic photosensitive member has a first portion and a second portion abutting with the abutting member along the longitudinal direction thereof, the electrophotographic photosensitive member has a support, a charge generation layer containing a charge generating material and a polyacetal resin, and a surface layer in this order, the electrophotographic photosensitive member has, in the first portion, an undercoat layer containing a polymerized product of a composition including an electron transporting material and a cross-linking agent, the layer being adjacent to a surface of the charge generation layer, facing the support, and the electrophotographic photosensitive member has, in the second portion, an intermediate layer containing a metal oxide particle and a phenol resin, the layer being between and adjacent to the support and the charge generation layer.
US09599914B2

The electrophotographic member includes an electro-conductive substrate and an electro-conductive resin layer as the surface layer on the substrate. The electro-conductive resin layer contains a binder and a bowl-shaped resin particle; the surface of electrophotographic member has a concavity derived from the opening of the bowl-shaped resin particle, a protrusion derived from the edge portion of the opening and the electro-conductive resin layer; and when the surface of the member is observed using a scanning electron microscope at an accelerating voltage (1 kV) and a magnification (×2000) while applying a DC voltage (50 to 100 V) between an electrode disposed opposite to the electrophotographic member and the substrate, the brightness of the protrusion, K1, the brightness of the bottom of the concavity, K2, and the brightness of the exposed surface of the electro-conductive resin layer, K3, satisfy K2
US09599912B2

A reflector includes a reflecting surface or structure provided with a cap layer formed from Silicene or a Silicene derivative. The reflector may be provided in a lithographic apparatus.
US09599911B2

A temperature adjusting apparatus of a mask substrate according to an embodiment is used in a mask drawing apparatus drawing a desired pattern by irradiating a charged particle beam to a mask substrate after a temperature of the mask substrate is adjusted in advance. The temperature adjusting apparatus includes a supporting member supporting the mask substrate; and first and second temperature adjusting plates facing each other with sandwiching the supporting member, the plates having a plurality of first and second regions respectively, and each temperatures of the first and second regions being capable to be independently adjusted.
US09599902B2

Laminate comprising a) a photopolymerizable relief-forming layer, at least containing an elastomeric binder, ethylenically unsaturated monomers and a photoinitiator and optionally further additives, b) an optionally photopolymerizable elastomeric substrate layer, at least containing an elastomeric binder, optionally ethylenically unsaturated monomers and a photoinitiator and optionally further additives, the relief-forming layer a) having a hardness of 30 to 70° Shore A and the elastomeric substrate layer b) having a hardness of 75° Shore A to 70° Shore D in each case in the photopolymerized state, and the layer b) having a hardness of at least 5° Shore A greater than the layer a).
US09599901B2

Provided is a photosensitive resin composition from which a cured product having thin film thickness, excellent light-shielding properties, and high surface hardness is obtained. A a cured film and a method for producing the same, a method for producing a resin pattern, and an LCD device, an organic EL display device, an infrared cut filter, or a solid-state imaging device are also provided. The photosensitive resin composition includes a polymer component including at least one of categories (1) or (2), a photoacid generator, a solvent, and titanium black, wherein (1) includes (a1) a constitutional unit containing a group in which an acid group is protected by an acid-decomposable group, and (a2) a constitutional unit containing a crosslinkable group, and (2) includes (a1) a constitutional unit containing a group in which an acid group is protected by an acid-decomposable group, and (a2) a constitutional unit containing a crosslinkable group.
US09599898B2

A black photosensitive resin composition includes (A) pigment dispersion including at least two kinds of carbon black having different oil absorption from each other; (B) a binder resin; (C) a photopolymerizable monomer; (D) a photopolymerization initiator; and (E) a solvent. A light-blocking layer can be formed using the same.
US09599880B2

A projection display apparatus includes: a substantially box-shaped enclosure having a bottom surface portion, the bottom surface portion having an ventilation groove and an air inlet formed through a wall of the ventilation groove; an air sucking fan provided in the enclosure and forming an air flow flowing through the air inlet into the enclosure, and a filter through which the air flowing through the air inlet into the enclosure passes.
US09599876B2

A periodic polarization reversal electrode, periodic polarization reversal structure forming method and periodic polarization reversal element. The element includes a plurality of stripe electrode sections with a stripe shape extending in parallel at a gap from each other, arranged in contact with the +Z surface of a ferroelectric crystal substrate; an insulation film arranged over the +Z surface so as to cover the plurality of stripe electrode sections; and an equipotential electrode section which has a portion that opposes at least a part of each of the plurality of stripe electrode sections across the insulation film and is arranged over the insulation film without contacting the ferroelectric crystal substrate or the plurality of stripe electrode sections, wherein an electric field is generated in the area of the ferroelectric crystal substrate directly below the plurality of stripe electrode sections by applying a voltage to the equipotential electrode section.
US09599869B2

A display apparatus includes a backlight assembly which generates a light and a display panel which receives the light to display an image, the display panel including a first substrate, a second substrate which faces the first substrate and is disposed closer to the backlight assembly than the first substrate, a gate line disposed on the first substrate, a data line disposed on the gate line and insulated from the gate line, a thin film transistor disposed on the first substrate and electrically connected to the gate line and the data line, and a reflection preventing layer disposed between the first substrate and the gate line to reduce an amount of a reflected light reflected by the gate line.
US09599865B2

A display may have upper and lower display layers. A layer of liquid crystal material may be interposed between the upper and lower display layers. The display layers may have substrates. A thin-film transistor layer may have a layer of thin-film transistor structures on a substrate such as a clear glass layer. A planarization layer may be formed on the thin-film transistor structures. A transparent conductive layer may be formed on the planarization layer. The display may have a dielectric layer on the transparent conductive layer. Pixels may be formed in the display layers. The pixels may include pixel electrodes having fingers. The fingers may be formed on the dielectric layer. Trenches in the dielectric layer may be formed between the fingers. The trenches may extend to the transparent conductive layer or may be formed only partway into the dielectric layer.
US09599862B2

A display apparatus includes a first substrate including a display area in which a plurality of pixels is disposed and a non-display area disposed adjacent to the display area, a second substrate which faces the first substrate, an image display layer between the first substrate and the second substrate, and a sealing member which is in the non-display area and attaches the first substrate and the second substrate. The first and second substrates have a curved surface in a first direction, and a flat surface in a second direction crossing the first direction A width of the sealing member extended in the first direction is greater than a width of the sealing member extended in the second direction.
US09599861B2

A method of manufacturing a liquid crystal device having a first substrate and a second substrate facing each other with a liquid crystal layer interposed therebetween, and a sealing member formed in a peripheral portion of at least one of the substrates. The method includes forming the sealing member, disposing the liquid crystal layer inside the sealing member, and bonding the first substrate to the second substrate. In forming the sealing member, a ring-shaped portion that seals the liquid crystal layer inside the sealing member, a first sealing layer and a second sealing layer that face each other to be separated from each other are formed. In the bonding of the first substrate to the second substrate, a junction portion is formed in which the first and second sealing layers are pressed and joined outside the sealing member so as to form the ring-shaped portion.
US09599859B2

A liquid crystal lens panel includes a plurality of lens electrodes, an alignment layer, a sealant and a light blocking pattern. The lens electrodes are arranged in an active region. The alignment layer is disposed in an alignment region which overlaps an entire of the active region and extends further than the active region. The sealant is disposed in a seal line region which is outside the alignment region. The light blocking pattern is disposed in the light blocking region which is between the seal line region and the alignment region.
US09599854B2

According an aspect, a liquid crystal display device includes: a first substrate on which a reflective electrode is arranged for each of a plurality of pixels; a second substrate; a liquid crystal layer arranged between the first substrate and the second substrate; and a wave plate in which liquid crystals are fixed so that an alignment direction of the liquid crystals is opposite to an alignment direction of the liquid crystal layer. The wave plate is arranged on a second substrate side of the liquid crystal layer.
US09599853B2

In order to provide a display device capable of improving the display quality at the time of 2D display and 3D display, the present invention provides a display device that includes: a display panel that displays an image; and a liquid crystal lens panel that is arranged on the display surface side of the display panel, controls a refractive index in a cylindrical lens manner to form parallax barriers, and switches 2D display and 3D display, and the liquid crystal lens panel includes: a first transparent substrate that is arranged on the display panel side; a second transparent substrate that is arranged to face the first substrate through a liquid crystal layer; and a first polarizing plate that is formed on the display surface side of the second transparent substrate to control a polarization direction of light transmitting through the liquid crystal lens panel.
US09599849B2

According to one embodiment, a display device includes a first substrate including a first insulating substrate, a second substrate including a second insulating substrate, a light modulation layer, a first electrode of a strip shape extending in a first direction, a plurality of conductive wiring lines extending in a second direction crossing the first direction, configured to selectively transmit a desired polarized light component of incident light, a second electrode configured to optically change the light modulation layer in cooperation with the first electrode, and a detection circuit configured to detect a change in capacitance between the first electrode and the conductive wiring lines.
US09599846B2

Provided are methods of switching guest-host dual frequency liquid crystals by using a back flow. In the case of a shutter having a dual frequency liquid crystal layer between two transparent substrates, such a method includes: applying a first voltage having a first frequency to the dual frequency liquid crystal layer; and applying a second voltage having a second frequency to the dual frequency liquid crystal, the second frequency being higher than the first frequency, wherein the second voltage is higher than a threshold voltage that generates a back flow around liquid crystals of the dual frequency liquid crystal layer, and the first voltage is lower than the threshold voltage.
Patent Agency Ranking