An n-spread area (5) to be a drain area is formed in an n-shaped semiconductor area (3), a p spread area (7) and a n+spread area (8) to be a drain area are formed at one side of the n-spread area (5).A recess part (10) for filling insulator (12) is formed at the other side of the n-spread area (5). A p-burying layer (13) is formed at right lower part of the n-spread area (5). An n+spread area (14), which is electrically connected by a wiring (20) with a resistance (R) and the n-spread area (5) and used for exerting high potential, is formed in the area of the n-shaped semiconductor area (3).A grid electrode (17) is formed, separating from a grid insulation film (19), on part of surface of the p spread area (7) clamped by the n+spread area (8) and the n-spread area (5).