The control circuit comprises: a detecting portion COMP 1 for detecting a status transition of a first signal FR at the connecting point P which changes at a constant cycle corresponding to current flowing through the antiparallel diode D when the main switch device FET is turned OFF; and a phase difference adjusting portion 30, 40 for adjusting the phase difference by adjusting the output timingof the second signal FP corresponding to a phase difference between the phase of the first signal FR detected by the detecting portion COMP 1 and the phase of the second signal FP generated based on the first signal of one cycle before and the rectification switch device FET 2 is turned ON corresponding to the second signal FP whose output timing is adjusted by the phase difference adjusting portion 30, 40.