The invention provides a programmable system on a field programmable gate array chip based on a DW8051 core, the programmable system on the chip takes the DW8051 core as a core, comprising a memory, an external interface circuit and a clock reset circuit to provide a clock and a reset signal to the whole system; the memory comprises three memory spaces of a ROM program memory, an expanding data memory and an internal data memory; the external interface circuit comprises three small modules of an SFR decoding module, an IIC bus interface and an external small system; the clock reset circuit comprises two modules of a clock signal generation module and a reset generation module. The programmable system on the chip of the invention improves the operation speed of the control system due to the integration of the DW8051 core at the interior; as the FPGA realizes the internal control logic, thus enhancing the anti-interference and the stability of the system. The programmable system can modify the corresponding logic algorithm according to the actual needs of the system, thus having great flexibility and configurability.