The invention relates to a linear voltage regulator which pertains to the field of electronic technology. The linear voltage regulator comprises an error amplifier, an output amplifying circuit and a frequency compensating circuit, wherein the error amplifier consists of a first-stage folding cascade amplifier and is used for comparing a reference voltage Vref with a feedback voltage of a knot NETF and generating a first output voltage; the output amplifying circuit consists of a power tube PMOS and a divider resistor, wherein the power tube PMOS generates a second output voltage Vout under the action of the first output voltage, and the divider resistor generates the feedback voltage; and the frequency compensating circuit consists of a voltage-controlled current source and a compensation capacitor, and is used for receiving the feedback voltage and the second output voltage Vout and generating a zero point matched with the pole of the output amplifying circuit. The linear voltage regulator reduces the complexity of the linear voltage regulator and the number of capacitor needed in frequency compensation, and has small value for compensation capacitor, thus leading the linear voltage regulator to be suitable for full chip integration.