A reusable verification device and a verification method of an SOC chip based on a DW8051 core belong to the technical field of integrated circuits. The device comprises a PC principal computer, a Field Programmable Gate Array (FPGA) and a peripheral circuit, the FPGA and the peripheral circuit are both connected with the PC principal computer; the FPGA is used for simulating an SOC chip logical model which comprises the follow six software modules: a memorizer selector, an inner ROM memorizer, an ISP controller, an external interface controller, a clock reset module and the DW8051 core; the SOC chip logical model is implemented by encoding codes programmed by a hardware description language, and downloading the encoded codes to the FPGA; and the peripheral circuit comprises an expanded external non-volatile ROM module, a volatile SRAM module, a serial communication port module and an SPI interface module, and a JTAG module. With support of software, the reusable verification device and the verification method can finish verification of the SOC chip based on the DW8051 core, and have certain generality, flexibility and reusability.