The invention discloses a low power consumption integrated circuit testing device with compressible data and a method using the same. The device comprises a scanning forest, an XOR gate network, an output selection circuit, a first control register and a second control register, wherein the scanning forest comprises a plurality of scanning input ends and a plurality of mutually connected scanning trigger groups; the scanning input ends are connected to all scanning triggers in the first scanning trigger group; all scanning triggers in each scanning trigger group are connected with the output ends of the scanning triggers in the previous scanning trigger group; the input end of each XOR gate in the XOR gate network is connected with the output ends of the scanning triggers in the last group of scanning trigger group; and the output selection circuit is connected with the XOR gate network. According to the low power consumption integrated circuit testing device, node hop in the circuit can be reduced, energy consumption is lowered, and meanwhile compression of test response data can be achieved.