Provided is a sigma-delta modulator (SDM) with stable chopped wave. The SDM employs a switched capacitor integrator for sampling, maintaining, and integral analog input, thus to influence a non-overlapping multi-phase clock. A chopping multiplying unit is added to the input and output of an operational amplifier in the first stage integrator. The chopping multiplying unit exchange and transmission are input via difference, thus to respond to the non-overlapping chopping clock. The major clock is operated upon the frequency of the multi-phase clock, which generates a chopping clock after decreasing. A delay line ensures that the chopping clock edge appears ahead of the multi-phase clock edge. When the multi-phase clock changes, the chopping multiplying unit has switched and thus stabilized. Therefore, the charge injection upon the switch controlled by the multi-phase clock can not be instantly modulated by the chopping multiplying unit. Such timing arrangement prolongs the time to respond to the charge injection upon the switch and improves the linear features.