Provided is a signal output circuit capable of outputting a normal signal in accordance with an input signal, even when part of the circuit fails. A signal output circuit includes a CPU (3), a switching circuit (100), and an output terminal (T). The switching circuit (100) includes: a first switching unit (U1) having a first switching element (11) and a second switching element (12), and a second switching unit (U2) having a third switching element (13)and a fourth switching element (14). The drain (d), source,(s) and gate (g) of each of the first and second switching elements (11, 12) are connected to a power source (Vb), drains (d)of the third and fourth switching elements (13,14), and a first output port (6) of the CPU (3), respectively. The source (s) and gate (g)of each of the third and fourth switching elements (13,14) are connected to the output terminal (T) and a second output port (7) of the CPU (3).