The invention discloses a high-speed decoding circuit based on data transmission. The high-speed decoding circuit based mainly solves the problem that a circuit of an existing decoder is complex. A basic circuit of the high-speed decoding circuit is composed of 16 MOS transistors, S (1) and Sv (1), and S (0) and Sv (0) are two complementary high-low phase address selection signals, and the correct decoding function is achieved in a manner that correlated MOS transistors are controlled to be conducted or disconnected sequentially. The basic circuit of the high-speed decoding circuit is divided into an upper structure and a lower structure, M0-M3 NMOS tubes are introduced into the second structure, and therefore voltage swing losses of the signals on a transmission path are reduced effectively. The high-speed decoding circuit has the advantages of being simple in structure, high in speed, small in area, low in power consumption, and the like, in addition, the advantages can be more obvious along with the increase of the number of decoding addresses, and the high-speed decoding circuit can be used for storer address decoding and high-speed data selection circuits.