A method for improving the writing-in redundancy rate of a static random access memory comprises the first step of providing a silicon-based substrate and forming a shallow-channel isolator, the second step of forming an NMOS device and a PMOS device serving as an upwards-pull transistor, the third step of carrying out source-drain injection in source electrode areas and drain electrode areas of the NMOS device and the PMOS device serving as the upwards-pull transistor and depositing a silicon nitride protective layer, the fourth step of carrying out source-drain annealing process on the NMOS device and the PMOS device serving as the upwards-pull transistor, and the fifth step of etching and removing the silicon nitride protective layer. When a stress memory effect process photolithography mask is manufactured, the PMOS device area of the upwards-pull transistor and the NMOS device are covered; in the stress memory effect process, the upwards-pull transistor and the NMOS device are both covered with the silicon nitride protective layer, then the source-drain annealing process is carried out, the hole mobility of the upwards-pull transistor is reduced, and then the equivalent resistance of the upwards-pull transistor is increased; in the writing-in process, the electric potential of a second node is lowered and then the writing-in redundancy rate can be improved.