The invention discloses a wafer-level chip encapsulation structure and a manufacturing method thereof. The method includes the following steps that: first openings are formed at positions corresponding to electric conduction pads through etching, and a second protruding portion of which the upper part is cut off is formed between two adjacent first openings at two sides of a predetermined cutting path; mechanical cutting is performed on a portion of the second protruding portion which directly faces the predetermined cutting path, so that a second opening can be formed through cutting, and the bottom of the second opening enters a supporting layer; and an insulating layer, a metal wiring layer and a circuit protective layer are laid sequentially. According to the encapsulation structure formed through adopting the processing method, the supporting layer is directly connected with the circuit protective layer, so that the electric conduction pads and a dielectric layer can be wrapped inside the encapsulation structure, and therefore, liquid can be prevented from entering the electric conduction pads along the side wall of the dielectric layer, and the electric conduction pads will not be corroded by the liquid, and the risk of reliability failure can be decreased, and the reliability of products can be improved; and in a cutting process, only the circuit protective layer, the supporting layer and a substrate layer are required to be cut, and therefore, problems of tool breaking and edge collapse in the cutting manufacture process can be decreased.