The invention discloses a side wall structure for an embedded SONOS memory integration technology. An SONOS region side wall comprises two layers, which sequentially are a silicon nitride layer with the thickness of 300-400angstrom and a silicon oxide layer with the thickness of 500-600angstrom from bottom to top. The invention discloses a manufacturing method of the side wall structure for the embedded SONOS memory integration technology. According to the side wall structure for the embedded SONOS memory integration technology, electric leakage of an SONOS device can be effectively lowered when the condition that an implementation process of a logic region is fixed is ensured; and the product yield and the reliability are improved.