The invention relates to a LDO (linear drop out) circuit, a power supply method thereof and an FPGA (field programmable gate array) chip. In one embodiment, the power supply method is applied to the FPGA chip comprising the LDO circuit and a configuration memory, wherein the FPGA chip comprises a first working state and a second working state, and the LDO circuit is provided with first output voltage and second output voltage. The method includes the steps: determining the working state of the FPGA chip; outputting the first output voltage to a first external functional module through a first output branch of the LDO circuit when the FPGA chip is in the first working state; outputting the second output voltage to the first external functional module through a second output branch of the LDO circuit when the FPGA chip is in the second working state. Power consumption in the dormant state of the FPGA chip is effectively reduced, so that the service life of a power supply is prolonged.