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发明公开
CN107896096A 采样保持电路前端宽带放大器 无效 - 驳回

采样保持电路前端宽带放大器
摘要：
本发明涉及一种采样保持电路，实施例具体公开一种采样保持电路前端宽带放大器。该采样保持电路前端宽带放大器，包括输入放大器和带宽放大器，输入放大器和带宽放大器均为差分电路结构，输入放大器的正信号输出端连接宽带放大器的正信号输入端，输入放大器的负信号输出端连接所述带宽放大电路的负信号输入端；输入放大器采用PMOS源极跟随器，或者正负电源供电情况下的NMOS共漏极放大器，或者正负极电源供电情况下的NPN共射极放大器，解决了小功率输入信号不能驱动放大器的问题，实现了在输入直流偏置接近0V时，放大器仍能正常工作，同时由于没有使用无源电感或有源电感作为负载，减小了芯片面积，降低了成本，减小了功耗。
摘要（英）：

The invention relates to a sample and hold circuit. The embodiment specifically discloses a sample and hold circuit front-end wide-band amplifier. The sample and hold circuit front-end wide-band amplifier comprises an input amplifier and a bandwidth amplifier, wherein the input amplifier and the bandwidth amplifier are both differential circuit structures, the positive signal output end of the input amplifier is connected with the positive signal input end of the wide-band amplifier, and the negative signal output end of the input amplifier is connected with the negative signal input end of abandwidth amplifier circuit; and the input amplifier adopts a PMOS source follower, or an NMOS common drain amplifier under positive and negative power supply conditions, or an NPN common emitter amplifier under the positive and negative power supply conditions. The problem that low-power input signals cannot drive the amplifier can be solved, the phenomenon that the amplifier can still work normally when the input DC bias is close to 0V can be realized, and meanwhile, since no passive inductor or active inductor is used as the load, the chip area can be reduced, the cost can be lowered, and the power consumption can be reduced.

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