A semiconductor circuit of the present disclosure is provided with: a first circuit configured to be able to generate, on the basis of a voltage at a first node, an inverted voltage of the voltage atthe first node and to apply the inverted voltage to a second node; a second circuit configured to be able to generate, on the basis of a voltage at the second node, an inverted voltage of the voltageat the second node and to apply the inverted voltage to the first node; a first transistor which connects the first node to a third node; a second transistor which supplies a first direct current voltage to the third node; a third transistor which has a drain or a source connected to the third node and has a gate connected to the first node or the second node; and a first memory element which is connected to the third node and can take a first resistive state or a second resistive state. The first and second circuits are configured such that the voltage at the first node easily becomes a prescribed initial voltage after electric power is supplied.