The invention belongs to the technical field of electronic information, and particularly relates to a two-stage threshold polling system based on an FPGA. The FPGA-based two-stage threshold polling system comprises an information source module, a station module, a control module and a data receiving module which are connected in sequence. The invention discloses a two-stage threshold polling system based on an FPGA. in order to further improve the delay performance of the WSN under basic threshold service rules, a two-stage threshold service scheduling strategy is provided; the advantages of FPGA parallel processing and time sequence control are fully exerted; Hardware implementation is conducted on the two-stage threshold service polling system for the first time by referring to the design thought of Buxton to the polling system, the design correctness is verified, WSN communication delay is further reduced on an MAC layer, better QoS characteristics are achieved, and great practicalvalue is achieved for WSN real-time service processing.