The utility model discloses a parameterized FHT (frequency hopping transmitter) realizing circuit in a spaceborne WCDMA (wideband code division multiple access) receiver, wherein the parametrization is mainly embodied as follows: word length input and output parametrization (Word_len), hadarma/walsh transformation (Hadarma) parametrization, FHT point number parametrization (NFTT) and positive-negative FHT (FHT_INV) parametrization. The circuit is realized in an FPGA (field programmable gate array) and comprises a logic control unit, a data cache, a selector and n-stage butterfly-shaped operation units; each stage of butterfly-shaped operation unit comprises a positive butterfly-shaped operator, a negative butterfly-shaped operator, an overflow detector and an overflow processor; and the logic control unit is realized by adopting a state machine. The circuit is concise in design; in addition, by adopting a simple overflow detection circuit, the complex overflow detection and overflow processing operation can be avoided; and the circuit is especially suitable for being realized in the spaceborne WCDMA receiver.