具有信号采样器（采样频率为fA），第一通过与电荷包的信号采样器提供的时钟控制的MIS-电荷转移系统（CCD与H（w）的）和下游的这个MIS电荷传输系统中，服务于一个时间连续信号，时钟控制输出级的恢复（单片集成采样电路S + H）。 这是相对于它们的传输特性和易于集成的改进这种类型的常规半导体器件的任务。 为了这个目的，多个由相同的时钟控制MIS（米）进行充电地连接到所述第一MIS电荷转移系统的并行操作的输出传输系统。 这形成由它们发出相同或不同类型的过滤器的电荷转移系统电荷包被不同地延迟，然后转换成电压。 在相比于第一采样器的采样频率（f¹A）更高的该电压进行采样。 的采样和保持的电压最终通过一个简单的低通滤波器（TP）平滑。 还应当指出的是，电荷包从第一电荷转移MIS系统由加权分割转移到下游的电荷转移系统发生。

Monolithic integrated sampling a signal sampler (sampling frequency f _A), a first by the signal sampler with charge packets supplied clocked MIS charge transfer system (CCD with H (w)) and this MIS charge transfer system downstream, serving the restoration of a continuous-time signal, clock-controlled output stage ( S + H). It is an object to improve the known semiconductor devices of this type with respect to their transmission characteristics and ease of integration. For this purpose, a plurality of (m) are turned on, controlled by the same clock MIS charge transfer systems operating in parallel to the output of the first MIS charge transfer system. This charge transfer systems form filter similar or different kind. The votes of them charge packets are delayed differently and then converted into a voltage. This voltage is sampled at a first scanner relative to the higher sampling frequency (F'a). The sampled and held voltage is finally smoothed by a simple low-pass filter (TP). Should also be noted that the transfer of charge packets of the first MIS charge transfer system is at the downstream charge transfer systems by weighted division.